feat[err_proc]: Add a new command: DIS_ERR_CLR_MARK

Platform: General
Spec: h264/h265/avs2/avs2d/m2vd

MPP_DEC_SET_DISABLE_ERROR:
Comes with an error mark by default.

MPP_DEC_SET_DIS_ERR_CLR_MARK:
Takes effect when MPP_DEC_SET_DISABLE_ERROR is enabled and
is used to clear the error mark.

Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
Change-Id: I82b00c737bb72bdc420267d36c28752a5e3ee9a6

inc/rk_mpi_cmd.h

@@ -111,8 +111,8 @@ typedef enum {
     MPP_DEC_SET_ENABLE_MVC,             /* enable MVC decoding*/
     MPP_DEC_GET_THUMBNAIL_FRAME_INFO,   /* update thumbnail frame info to user, for MPP_FRAME_THUMBNAIL_ONLY mode */
     MPP_DEC_SET_DISABLE_DPB_CHECK,      /* disable dpb discontinuous check */
-    /* select codec mode */
-    MPP_DEC_SET_CODEC_MODE              = CMD_MODULE_CODEC | CMD_CTX_ID_DEC | 0x14,
+    MPP_DEC_SET_CODEC_MODE,             /* select codec mode */
+    MPP_DEC_SET_DIS_ERR_CLR_MARK,
 
     MPP_DEC_CMD_QUERY                   = CMD_MODULE_CODEC | CMD_CTX_ID_DEC | CMD_DEC_QUERY,
     /* query decoder runtime information for decode stage */

inc/vpu_api.h

@@ -108,6 +108,7 @@ typedef enum VPU_API_CMD {
     VPU_API_DEC_EN_FBC_HDR_256_ODD,
     VPU_API_SET_INPUT_BLOCK,
     VPU_API_SET_DISABLE_ERROR,
+    VPU_API_SET_DIS_ERR_CLR_MARK,
 
     /* set pkt/frm ready callback */
     VPU_API_SET_PKT_RDY_CB = 0x1100,

mpp/base/mpp_dec_cfg.cpp

@@ -107,6 +107,7 @@ public:
     ENTRY(base, disable_dpb_chk,    U32,    MPP_DEC_CFG_CHANGE_DISABLE_DPB_CHECK,   base, disable_dpb_chk) \
     ENTRY(base, disable_thread,     U32,    MPP_DEC_CFG_CHANGE_DISABLE_THREAD,      base, disable_thread) \
     ENTRY(base, codec_mode,         U32,    MPP_DEC_CFG_CHANGE_CODEC_MODE,          base, codec_mode) \
+    ENTRY(base, dis_err_clr_mark,   U32,    MPP_DEC_CFG_CHANGE_DIS_ERR_CLR_MARK,    base, dis_err_clr_mark) \
     ENTRY(cb, pkt_rdy_cb,           Ptr,    MPP_DEC_CB_CFG_CHANGE_PKT_RDY,          cb, pkt_rdy_cb) \
     ENTRY(cb, pkt_rdy_ctx,          Ptr,    MPP_DEC_CB_CFG_CHANGE_PKT_RDY,          cb, pkt_rdy_ctx) \
     ENTRY(cb, pkt_rdy_cmd,          S32,    MPP_DEC_CB_CFG_CHANGE_PKT_RDY,          cb, pkt_rdy_cmd) \

mpp/codec/dec/avs/avsd_api.c

@@ -182,6 +182,9 @@ static MPP_RET avsd_control(void *decoder, MpiCmd cmd_type, void *param)
     case MPP_DEC_SET_DISABLE_ERROR: {
         p_dec->disable_error = *((RK_U32 *)param);
     } break;
+    case MPP_DEC_SET_DIS_ERR_CLR_MARK: {
+        p_dec->dis_err_clr_mark = *((RK_U32 *)param);
+    } break;
     default : {
     } break;
     }
@@ -312,10 +315,6 @@ static MPP_RET avsd_parse(void *decoder, HalDecTask *task)
         avsd_commit_syntaxs(p_dec->syn, task);
         avsd_update_dpb(p_dec);
     }
-    if (p_dec->disable_error) {
-        task->flags.ref_err = 0;
-        task->flags.parse_err = 0;
-    }
     AVSD_PARSE_TRACE("Out.");
 
     return ret = MPP_OK;
@@ -331,20 +330,18 @@ static MPP_RET avsd_callback(void *decoder, void *info)
     MPP_RET ret = MPP_ERR_UNKNOW;
     AvsdCtx_t *p_dec = (AvsdCtx_t *)decoder;
     DecCbHalDone *ctx = (DecCbHalDone *)info;
+    MppFrame mframe = NULL;
+    HalDecTask *task_dec = (HalDecTask *)ctx->task;
 
     AVSD_PARSE_TRACE("In.");
-    if (!p_dec->disable_error) {
-        MppFrame mframe = NULL;
-        HalDecTask *task_dec = (HalDecTask *)ctx->task;
-
-        mpp_buf_slot_get_prop(p_dec->frame_slots, task_dec->output, SLOT_FRAME_PTR, &mframe);
-        if (mframe) {
-            if (ctx->hard_err || task_dec->flags.ref_err) {
-                if (task_dec->flags.used_for_ref) {
-                    mpp_frame_set_errinfo(mframe, MPP_FRAME_FLAG_PAIRED_FIELD);
-                } else {
-                    mpp_frame_set_discard(mframe, MPP_FRAME_FLAG_PAIRED_FIELD);
-                }
+
+    mpp_buf_slot_get_prop(p_dec->frame_slots, task_dec->output, SLOT_FRAME_PTR, &mframe);
+    if (mframe) {
+        if (ctx->hard_err || task_dec->flags.ref_err) {
+            if (task_dec->flags.used_for_ref) {
+                mpp_frame_set_errinfo(mframe, MPP_FRAME_FLAG_PAIRED_FIELD);
+            } else {
+                mpp_frame_set_discard(mframe, MPP_FRAME_FLAG_PAIRED_FIELD);
             }
         }
     }

mpp/codec/dec/avs/avsd_parse.h

@@ -239,6 +239,7 @@ typedef struct avs_dec_ctx_t {
     RK_U32                   vec_flag; //!< video_edit_code_flag
 
     RK_U32                   disable_error;
+    RK_U32                   dis_err_clr_mark;
 } AvsdCtx_t;
 
 #ifdef  __cplusplus

mpp/codec/dec/h264/h264d_api.c

@@ -659,8 +659,7 @@ MPP_RET h264d_parse(void *decoder, HalDecTask *in_task)
         in_task->syntax.number = p_Dec->dxva_ctx->syn.num;
         in_task->syntax.data   = (void *)p_Dec->dxva_ctx->syn.buf;
         in_task->flags.used_for_ref = p_err->used_ref_flag;
-        in_task->flags.ref_err |= (!p_Dec->cfg->base.disable_error
-                                   && (p_err->dpb_err_flag | p_err->cur_err_flag)) ? 1 : 0;
+        in_task->flags.ref_err |= (p_err->dpb_err_flag | p_err->cur_err_flag) ? 1 : 0;
     }
 
     return ret;

mpp/codec/inc/mpp_dec_impl.h

@@ -129,6 +129,7 @@ struct MppDecImpl_t {
     // work mode flags
     RK_U32              parser_fast_mode;
     RK_U32              disable_error;
+    RK_U32              dis_err_clr_mark;
     RK_U32              enable_deinterlace;
 
     // dec parser thread runtime resource context

mpp/codec/mpp_dec.cpp

@@ -75,6 +75,7 @@ static MPP_RET mpp_dec_update_cfg(MppDecImpl *p)
     p->parser_fast_mode     = base->fast_parse;
     p->enable_deinterlace   = base->enable_vproc;
     p->disable_error        = base->disable_error;
+    p->dis_err_clr_mark     = base->dis_err_clr_mark;
 
     mpp_env_get_u32("enable_deinterlace", &p->enable_deinterlace, base->enable_vproc);
 
@@ -140,6 +141,7 @@ MPP_RET mpp_dec_proc_cfg(MppDecImpl *dec, MpiCmd cmd, void *param)
     case MPP_DEC_SET_IMMEDIATE_OUT :
     case MPP_DEC_SET_OUTPUT_FORMAT :
     case MPP_DEC_SET_DISABLE_ERROR :
+    case MPP_DEC_SET_DIS_ERR_CLR_MARK :
     case MPP_DEC_SET_ENABLE_DEINTERLACE :
     case MPP_DEC_SET_ENABLE_FAST_PLAY :
     case MPP_DEC_SET_ENABLE_MVC :
@@ -293,7 +295,7 @@ void mpp_dec_put_frame(Mpp *mpp, RK_S32 index, HalDecTaskFlag flags)
     mpp_assert(index >= 0);
     mpp_assert(frame);
 
-    if (dec->cfg.base.disable_error) {
+    if (dec->cfg.base.disable_error && dec->cfg.base.dis_err_clr_mark) {
         mpp_frame_set_errinfo(frame, 0);
         mpp_frame_set_discard(frame, 0);
     }
@@ -521,6 +523,9 @@ MPP_RET mpp_dec_set_cfg(MppDecCfgSet *dst, MppDecCfgSet *src)
         if (change & MPP_DEC_CFG_CHANGE_DISABLE_ERROR)
             dst_base->disable_error = src_base->disable_error;
 
+        if (change & MPP_DEC_CFG_CHANGE_DIS_ERR_CLR_MARK)
+            dst_base->dis_err_clr_mark = src_base->dis_err_clr_mark;
+
         if (change & MPP_DEC_CFG_CHANGE_ENABLE_VPROC)
             dst_base->enable_vproc = src_base->enable_vproc;
 
@@ -1048,6 +1053,11 @@ MPP_RET mpp_dec_set_cfg_by_cmd(MppDecCfgSet *set, MpiCmd cmd, void *param)
         cfg->change |= MPP_DEC_CFG_CHANGE_DISABLE_ERROR;
         dec_dbg_func("disable error %d\n", cfg->disable_error);
     } break;
+    case MPP_DEC_SET_DIS_ERR_CLR_MARK: {
+        cfg->dis_err_clr_mark = (param) ? (*((RK_U32 *)param)) : (1);
+        cfg->change |= MPP_DEC_CFG_CHANGE_DIS_ERR_CLR_MARK;
+        dec_dbg_func("disable error not mark%d\n", cfg->dis_err_clr_mark);
+    } break;
     case MPP_DEC_SET_IMMEDIATE_OUT : {
         cfg->fast_out = (param) ? (*((RK_U32 *)param)) : (0);
         cfg->change |= MPP_DEC_CFG_CHANGE_FAST_OUT;

mpp/hal/rkdec/avs2d/hal_avs2d_rkv.c

@@ -613,7 +613,8 @@ MPP_RET hal_avs2d_rkv_gen_regs(void *hal, HalTaskInfo *task)
 
     INP_CHECK(ret, NULL == p_hal);
 
-    if (task->dec.flags.parse_err || task->dec.flags.ref_err) {
+    if ((task->dec.flags.parse_err || task->dec.flags.ref_err) &&
+        !p_hal->cfg->base.disable_error) {
         ret = MPP_NOK;
         goto __RETURN;
     }
@@ -806,7 +807,8 @@ MPP_RET hal_avs2d_rkv_start(void *hal, HalTaskInfo *task)
     AVS2D_HAL_TRACE("In.");
     INP_CHECK(ret, NULL == p_hal);
 
-    if (task->dec.flags.parse_err || task->dec.flags.ref_err) {
+    if ((task->dec.flags.parse_err || task->dec.flags.ref_err) &&
+        !p_hal->cfg->base.disable_error) {
         ret = MPP_NOK;
         goto __RETURN;
     }
@@ -1034,7 +1036,8 @@ MPP_RET hal_avs2d_rkv_wait(void *hal, HalTaskInfo *task)
     reg_ctx = (Avs2dRkvRegCtx_t *)p_hal->reg_ctx;
     p_regs = p_hal->fast_mode ? reg_ctx->reg_buf[task->dec.reg_index].regs : reg_ctx->regs;
 
-    if (task->dec.flags.parse_err || task->dec.flags.ref_err) {
+    if ((task->dec.flags.parse_err || task->dec.flags.ref_err) &&
+        !p_hal->cfg->base.disable_error) {
         AVS2D_HAL_DBG(AVS2D_HAL_DBG_ERROR, "found task error.\n");
         ret = MPP_NOK;
         goto __RETURN;

mpp/hal/rkdec/avs2d/hal_avs2d_vdpu382.c

@@ -680,7 +680,8 @@ MPP_RET hal_avs2d_vdpu382_gen_regs(void *hal, HalTaskInfo *task)
 
     INP_CHECK(ret, NULL == p_hal);
 
-    if (task->dec.flags.parse_err || task->dec.flags.ref_err) {
+    if ((task->dec.flags.parse_err || task->dec.flags.ref_err) &&
+        !p_hal->cfg->base.disable_error) {
         ret = MPP_NOK;
         goto __RETURN;
     }
@@ -872,7 +873,8 @@ MPP_RET hal_avs2d_vdpu382_start(void *hal, HalTaskInfo *task)
     AVS2D_HAL_TRACE("In.");
     INP_CHECK(ret, NULL == p_hal);
 
-    if (task->dec.flags.parse_err || task->dec.flags.ref_err) {
+    if ((task->dec.flags.parse_err || task->dec.flags.ref_err) &&
+        !p_hal->cfg->base.disable_error) {
         ret = MPP_NOK;
         goto __RETURN;
     }
@@ -1100,7 +1102,8 @@ MPP_RET hal_avs2d_vdpu382_wait(void *hal, HalTaskInfo *task)
     reg_ctx = (Avs2dVdpu382RegCtx_t *)p_hal->reg_ctx;
     p_regs = p_hal->fast_mode ? reg_ctx->reg_buf[task->dec.reg_index].regs : reg_ctx->regs;
 
-    if (task->dec.flags.parse_err || task->dec.flags.ref_err) {
+    if ((task->dec.flags.parse_err || task->dec.flags.ref_err) &&
+        !p_hal->cfg->base.disable_error) {
         AVS2D_HAL_DBG(AVS2D_HAL_DBG_ERROR, "found task error.\n");
         ret = MPP_NOK;
         goto __RETURN;

mpp/hal/rkdec/avs2d/hal_avs2d_vdpu383.c

@@ -638,7 +638,8 @@ MPP_RET hal_avs2d_vdpu383_gen_regs(void *hal, HalTaskInfo *task)
     AVS2D_HAL_TRACE("In.");
 
     INP_CHECK(ret, NULL == p_hal);
-    if (task->dec.flags.parse_err || task->dec.flags.ref_err) {
+    if ((task->dec.flags.parse_err || task->dec.flags.ref_err) &&
+        !p_hal->cfg->base.disable_error) {
         ret = MPP_NOK;
         goto __RETURN;
     }
@@ -717,8 +718,8 @@ MPP_RET hal_avs2d_vdpu383_start(void *hal, HalTaskInfo *task)
     AVS2D_HAL_TRACE("In.");
     INP_CHECK(ret, NULL == p_hal);
 
-    if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+    if ((task->dec.flags.parse_err || task->dec.flags.ref_err) &&
+        !p_hal->cfg->base.disable_error) {
         goto __RETURN;
     }
 
@@ -891,7 +892,8 @@ MPP_RET hal_avs2d_vdpu383_wait(void *hal, HalTaskInfo *task)
     reg_ctx = (Avs2dRkvRegCtx_t *)p_hal->reg_ctx;
     regs = p_hal->fast_mode ? reg_ctx->reg_buf[task->dec.reg_index].regs : reg_ctx->regs;
 
-    if (task->dec.flags.parse_err || task->dec.flags.ref_err) {
+    if ((task->dec.flags.parse_err || task->dec.flags.ref_err) &&
+        !p_hal->cfg->base.disable_error) {
         AVS2D_HAL_DBG(AVS2D_HAL_DBG_ERROR, "found task error.\n");
         ret = MPP_NOK;
         goto __RETURN;

mpp/hal/rkdec/avsd/hal_avsd_api.c

@@ -166,6 +166,7 @@ MPP_RET hal_avsd_init(void *decoder, MppHalCfg *cfg)
 
     FUN_CHECK(ret = init_hard_platform(p_hal, cfg->coding));
     cfg->dev = p_hal->dev;
+    p_hal->dec_cfg = cfg->cfg;
 
     //!< run init funtion
     FUN_CHECK(ret = p_hal->hal_api.init(decoder, cfg));

mpp/hal/rkdec/avsd/hal_avsd_base.h

@@ -107,6 +107,7 @@ typedef struct avsd_hal_ctx_t {
     MppCodingType            coding;
     MppCbCtx                 *dec_cb;
     MppDev                   dev;
+    MppDecCfgSet             *dec_cfg;
 
     AvsdSyntax_t             syn;
     RK_U32                   *p_regs;

mpp/hal/rkdec/avsd/hal_avsd_plus.c

@@ -653,7 +653,8 @@ MPP_RET hal_avsd_plus_gen_regs(void *decoder, HalTaskInfo *task)
     AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder;
 
     AVSD_HAL_TRACE("In.");
-    if (task->dec.flags.parse_err || task->dec.flags.ref_err) {
+    if ((task->dec.flags.parse_err || task->dec.flags.ref_err) &&
+        !p_hal->dec_cfg->base.disable_error) {
         goto __RETURN;
     }
     p_hal->data_offset = p_hal->syn.bitstream_offset;
@@ -680,7 +681,8 @@ MPP_RET hal_avsd_plus_start(void *decoder, HalTaskInfo *task)
     AVSD_HAL_TRACE("In.");
     INP_CHECK(ret, NULL == decoder);
 
-    if (task->dec.flags.parse_err || task->dec.flags.ref_err) {
+    if ((task->dec.flags.parse_err || task->dec.flags.ref_err) &&
+        !p_hal->dec_cfg->base.disable_error) {
         goto __RETURN;
     }
 
@@ -755,8 +757,8 @@ MPP_RET hal_avsd_plus_wait(void *decoder, HalTaskInfo *task)
     AVSD_HAL_TRACE("In.");
     INP_CHECK(ret, NULL == decoder);
 
-    if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+    if ((task->dec.flags.parse_err || task->dec.flags.ref_err) &&
+        !p_hal->dec_cfg->base.disable_error) {
         goto __SKIP_HARD;
     }
 
@@ -777,7 +779,8 @@ __SKIP_HARD:
     update_parameters(p_hal);
     memset(&p_hal->p_regs[1], 0, sizeof(RK_U32));
     if (!p_hal->first_field && p_hal->syn.pp.pictureStructure == FIELDPICTURE &&
-        !task->dec.flags.parse_err && !task->dec.flags.ref_err) {
+        ((!task->dec.flags.parse_err && !task->dec.flags.ref_err) ||
+         p_hal->dec_cfg->base.disable_error)) {
         repeat_other_field(p_hal, task);
     }
 

mpp/hal/rkdec/avsd/hal_avsd_vdpu1.c

@@ -545,7 +545,8 @@ MPP_RET hal_avsd_vdpu1_gen_regs(void *decoder, HalTaskInfo *task)
     AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder;
 
     AVSD_HAL_TRACE("In.");
-    if (task->dec.flags.parse_err || task->dec.flags.ref_err) {
+    if ((task->dec.flags.parse_err || task->dec.flags.ref_err) &&
+        !p_hal->dec_cfg->base.disable_error) {
         goto __RETURN;
     }
     p_hal->data_offset = p_hal->syn.bitstream_offset;
@@ -572,7 +573,8 @@ MPP_RET hal_avsd_vdpu1_start(void *decoder, HalTaskInfo *task)
 
     AVSD_HAL_TRACE("In.");
 
-    if (task->dec.flags.parse_err || task->dec.flags.ref_err) {
+    if ((task->dec.flags.parse_err || task->dec.flags.ref_err) &&
+        !p_hal->dec_cfg->base.disable_error) {
         goto __RETURN;
     }
 
@@ -626,7 +628,8 @@ MPP_RET hal_avsd_vdpu1_wait(void *decoder, HalTaskInfo *task)
 
     AVSD_HAL_TRACE("In.");
 
-    if (task->dec.flags.parse_err || task->dec.flags.ref_err) {
+    if ((task->dec.flags.parse_err || task->dec.flags.ref_err) &&
+        !p_hal->dec_cfg->base.disable_error) {
         goto __SKIP_HARD;
     }
 
@@ -653,7 +656,8 @@ __SKIP_HARD:
     update_parameters(p_hal);
     memset(&p_hal->p_regs[1], 0, sizeof(RK_U32));
     if (!p_hal->first_field && p_hal->syn.pp.pictureStructure == FIELDPICTURE &&
-        !task->dec.flags.parse_err && !task->dec.flags.ref_err) {
+        ((!task->dec.flags.parse_err && !task->dec.flags.ref_err) ||
+         p_hal->dec_cfg->base.disable_error)) {
         repeat_other_field(p_hal, task);
     }
     p_hal->frame_no++;

mpp/hal/rkdec/avsd/hal_avsd_vdpu2.c

@@ -542,7 +542,8 @@ MPP_RET hal_avsd_vdpu2_gen_regs(void *decoder, HalTaskInfo *task)
     AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder;
 
     AVSD_HAL_TRACE("In.");
-    if (task->dec.flags.parse_err || task->dec.flags.ref_err) {
+    if ((task->dec.flags.parse_err || task->dec.flags.ref_err) &&
+        !p_hal->dec_cfg->base.disable_error) {
         goto __RETURN;
     }
     p_hal->data_offset = p_hal->syn.bitstream_offset;
@@ -570,7 +571,8 @@ MPP_RET hal_avsd_vdpu2_start(void *decoder, HalTaskInfo *task)
 
     AVSD_HAL_TRACE("In.");
 
-    if (task->dec.flags.parse_err || task->dec.flags.ref_err) {
+    if ((task->dec.flags.parse_err || task->dec.flags.ref_err) &&
+        !p_hal->dec_cfg->base.disable_error) {
         goto __RETURN;
     }
 
@@ -624,7 +626,8 @@ MPP_RET hal_avsd_vdpu2_wait(void *decoder, HalTaskInfo *task)
 
     AVSD_HAL_TRACE("In.");
 
-    if (task->dec.flags.parse_err || task->dec.flags.ref_err) {
+    if ((task->dec.flags.parse_err || task->dec.flags.ref_err) &&
+        !p_hal->dec_cfg->base.disable_error) {
         goto __SKIP_HARD;
     }
 
@@ -652,7 +655,8 @@ __SKIP_HARD:
     update_parameters(p_hal);
     memset(&p_hal->p_regs[55], 0, sizeof(RK_U32));
     if (!p_hal->first_field && p_hal->syn.pp.pictureStructure == FIELDPICTURE &&
-        !task->dec.flags.parse_err && !task->dec.flags.ref_err) {
+        ((!task->dec.flags.parse_err && !task->dec.flags.ref_err) ||
+         p_hal->dec_cfg->base.disable_error)) {
         repeat_other_field(p_hal, task);
     }
     p_hal->frame_no++;

mpp/hal/rkdec/h264d/hal_h264d_rkv_reg.c

@@ -632,7 +632,7 @@ MPP_RET rkv_h264d_gen_regs(void *hal, HalTaskInfo *task)
     INP_CHECK(ret, NULL == p_hal);
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __RETURN;
     }
     H264dRkvRegCtx_t *reg_ctx = (H264dRkvRegCtx_t *)p_hal->reg_ctx;
@@ -694,7 +694,7 @@ MPP_RET rkv_h264d_start(void *hal, HalTaskInfo *task)
     INP_CHECK(ret, NULL == p_hal);
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __RETURN;
     }
 
@@ -767,7 +767,7 @@ MPP_RET rkv_h264d_wait(void *hal, HalTaskInfo *task)
                              reg_ctx->regs;
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __SKIP_HARD;
     }
 

mpp/hal/rkdec/h264d/hal_h264d_vdpu1.c

@@ -826,7 +826,7 @@ MPP_RET vdpu1_h264d_gen_regs(void *hal, HalTaskInfo *task)
     INP_CHECK(ret, NULL == p_hal);
     p_hal->in_task = &task->dec;
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __RETURN;
     }
     priv = p_hal->priv;
@@ -880,7 +880,7 @@ MPP_RET vdpu1_h264d_start(void *hal, HalTaskInfo *task)
                                                     reg_ctx->regs);
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __RETURN;
     }
 
@@ -945,7 +945,7 @@ MPP_RET vdpu1_h264d_wait(void *hal, HalTaskInfo *task)
                                                     reg_ctx->regs);
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __SKIP_HARD;
     }
 

mpp/hal/rkdec/h264d/hal_h264d_vdpu2.c

@@ -886,7 +886,7 @@ MPP_RET vdpu2_h264d_gen_regs(void *hal, HalTaskInfo *task)
     p_hal->in_task = &task->dec;
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __RETURN;
     }
     priv = p_hal->priv;
@@ -943,7 +943,7 @@ MPP_RET vdpu2_h264d_start(void *hal, HalTaskInfo *task)
     RockchipSocType soc_type = mpp_get_soc_type();
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __RETURN;
     }
 
@@ -1033,7 +1033,7 @@ MPP_RET vdpu2_h264d_wait(void *hal, HalTaskInfo *task)
                                                   reg_ctx->regs);
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __SKIP_HARD;
     }
 

mpp/hal/rkdec/h264d/hal_h264d_vdpu34x.c

@@ -930,7 +930,7 @@ MPP_RET vdpu34x_h264d_gen_regs(void *hal, HalTaskInfo *task)
     INP_CHECK(ret, NULL == p_hal);
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __RETURN;
     }
 
@@ -1008,7 +1008,7 @@ MPP_RET vdpu34x_h264d_start(void *hal, HalTaskInfo *task)
     INP_CHECK(ret, NULL == p_hal);
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __RETURN;
     }
 
@@ -1120,7 +1120,7 @@ MPP_RET vdpu34x_h264d_wait(void *hal, HalTaskInfo *task)
                                  reg_ctx->regs;
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __SKIP_HARD;
     }
 

mpp/hal/rkdec/h264d/hal_h264d_vdpu382.c

@@ -958,7 +958,7 @@ MPP_RET vdpu382_h264d_gen_regs(void *hal, HalTaskInfo *task)
     INP_CHECK(ret, NULL == p_hal);
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __RETURN;
     }
 
@@ -1062,7 +1062,7 @@ MPP_RET vdpu382_h264d_start(void *hal, HalTaskInfo *task)
     INP_CHECK(ret, NULL == p_hal);
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __RETURN;
     }
 
@@ -1235,7 +1235,7 @@ MPP_RET vdpu382_h264d_wait(void *hal, HalTaskInfo *task)
                                  reg_ctx->regs;
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __SKIP_HARD;
     }
 

mpp/hal/rkdec/h264d/hal_h264d_vdpu383.c

@@ -823,7 +823,7 @@ MPP_RET vdpu383_h264d_gen_regs(void *hal, HalTaskInfo *task)
     INP_CHECK(ret, NULL == p_hal);
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __RETURN;
     }
 
@@ -925,7 +925,7 @@ MPP_RET vdpu383_h264d_start(void *hal, HalTaskInfo *task)
     INP_CHECK(ret, NULL == p_hal);
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __RETURN;
     }
 
@@ -1011,7 +1011,7 @@ MPP_RET vdpu383_h264d_wait(void *hal, HalTaskInfo *task)
                                  reg_ctx->regs;
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __SKIP_HARD;
     }
 

mpp/hal/rkdec/h264d/hal_h264d_vdpu384a.c

@@ -770,7 +770,7 @@ MPP_RET vdpu384a_h264d_gen_regs(void *hal, HalTaskInfo *task)
     INP_CHECK(ret, NULL == p_hal);
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __RETURN;
     }
 
@@ -866,7 +866,7 @@ MPP_RET vdpu384a_h264d_start(void *hal, HalTaskInfo *task)
     INP_CHECK(ret, NULL == p_hal);
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __RETURN;
     }
 
@@ -952,7 +952,7 @@ MPP_RET vdpu384a_h264d_wait(void *hal, HalTaskInfo *task)
                                   reg_ctx->regs;
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {
         goto __SKIP_HARD;
     }
 

mpp/hal/rkdec/h265d/hal_h265d_rkv.c

@@ -738,16 +738,16 @@ MPP_RET hal_h265d_rkv_gen_regs(void *hal,  HalTaskInfo *syn)
     MppBuffer framebuf = NULL;
     RK_U32 sw_ref_valid = 0;
     RK_U32 stream_buf_size = 0;
+    HalH265dCtx *reg_ctx = ( HalH265dCtx *)hal;
 
     if (syn->dec.flags.parse_err ||
-        syn->dec.flags.ref_err) {
+        (syn->dec.flags.ref_err && !reg_ctx->cfg->base.disable_error)) {
         h265h_dbg(H265H_DBG_TASK_ERR, "%s found task error\n", __FUNCTION__);
         return MPP_OK;
     }
 
     h265d_dxva2_picture_context_t *dxva_cxt =
         (h265d_dxva2_picture_context_t *)syn->dec.syntax.data;
-    HalH265dCtx *reg_ctx = ( HalH265dCtx *)hal;
 
     void *rps_ptr = NULL;
     if (reg_ctx ->fast_mode) {
@@ -922,7 +922,7 @@ MPP_RET hal_h265d_rkv_start(void *hal, HalTaskInfo *task)
     RK_U32 i;
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !reg_ctx->cfg->base.disable_error)) {
         h265h_dbg(H265H_DBG_TASK_ERR, "%s found task error\n", __FUNCTION__);
         return MPP_OK;
     }
@@ -998,7 +998,7 @@ MPP_RET hal_h265d_rkv_wait(void *hal, HalTaskInfo *task)
     }
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !reg_ctx->cfg->base.disable_error)) {
         h265h_dbg(H265H_DBG_TASK_ERR, "%s found task error\n", __FUNCTION__);
         goto ERR_PROC;
     }

mpp/hal/rkdec/h265d/hal_h265d_vdpu34x.c

@@ -861,7 +861,7 @@ static MPP_RET hal_h265d_vdpu34x_gen_regs(void *hal,  HalTaskInfo *syn)
                            pp->log2_min_luma_coding_block_size_minus3 + 3);
 
     if (syn->dec.flags.parse_err ||
-        syn->dec.flags.ref_err) {
+        (syn->dec.flags.ref_err && !reg_ctx->cfg->base.disable_error)) {
         h265h_dbg(H265H_DBG_TASK_ERR, "%s found task error\n", __FUNCTION__);
         return MPP_OK;
     }
@@ -1119,7 +1119,7 @@ static MPP_RET hal_h265d_vdpu34x_gen_regs(void *hal,  HalTaskInfo *syn)
     }
 
     if ((reg_ctx->error_index[syn->dec.reg_index] == dxva_cxt->pp.CurrPic.Index7Bits) &&
-        !dxva_cxt->pp.IntraPicFlag && !reg_ctx->cfg->base.disable_error) {
+        !dxva_cxt->pp.IntraPicFlag) {
         h265h_dbg(H265H_DBG_TASK_ERR, "current frm may be err, should skip process");
         syn->dec.flags.ref_err = 1;
         return MPP_OK;
@@ -1161,7 +1161,7 @@ static MPP_RET hal_h265d_vdpu34x_start(void *hal, HalTaskInfo *task)
     RK_U32 i;
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !reg_ctx->cfg->base.disable_error)) {
         h265h_dbg(H265H_DBG_TASK_ERR, "%s found task error\n", __FUNCTION__);
         return MPP_OK;
     }
@@ -1293,7 +1293,7 @@ static MPP_RET hal_h265d_vdpu34x_wait(void *hal, HalTaskInfo *task)
     p = (RK_U8*)hw_regs;
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !reg_ctx->cfg->base.disable_error)) {
         h265h_dbg(H265H_DBG_TASK_ERR, "%s found task error\n", __FUNCTION__);
         goto ERR_PROC;
     }

mpp/hal/rkdec/h265d/hal_h265d_vdpu382.c

@@ -667,7 +667,7 @@ static MPP_RET hal_h265d_vdpu382_gen_regs(void *hal,  HalTaskInfo *syn)
     RK_U32 stream_buf_size = 0;
 
     if (syn->dec.flags.parse_err ||
-        syn->dec.flags.ref_err) {
+        (syn->dec.flags.ref_err && !reg_ctx->cfg->base.disable_error)) {
         h265h_dbg(H265H_DBG_TASK_ERR, "%s found task error\n", __FUNCTION__);
         return MPP_OK;
     }
@@ -872,7 +872,7 @@ static MPP_RET hal_h265d_vdpu382_gen_regs(void *hal,  HalTaskInfo *syn)
     }
 
     if ((reg_ctx->error_index[syn->dec.reg_index] == dxva_cxt->pp.CurrPic.Index7Bits) &&
-        !dxva_cxt->pp.IntraPicFlag && !reg_ctx->cfg->base.disable_error) {
+        !dxva_cxt->pp.IntraPicFlag) {
         h265h_dbg(H265H_DBG_TASK_ERR, "current frm may be err, should skip process");
         syn->dec.flags.ref_err = 1;
         return MPP_OK;
@@ -954,7 +954,7 @@ static MPP_RET hal_h265d_vdpu382_start(void *hal, HalTaskInfo *task)
     RK_U32 i;
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !reg_ctx->cfg->base.disable_error)) {
         h265h_dbg(H265H_DBG_TASK_ERR, "%s found task error\n", __FUNCTION__);
         return MPP_OK;
     }
@@ -1083,7 +1083,7 @@ static MPP_RET hal_h265d_vdpu382_wait(void *hal, HalTaskInfo *task)
     p = (RK_U8*)hw_regs;
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !reg_ctx->cfg->base.disable_error)) {
         h265h_dbg(H265H_DBG_TASK_ERR, "%s found task error\n", __FUNCTION__);
         goto ERR_PROC;
     }

mpp/hal/rkdec/h265d/hal_h265d_vdpu383.c

@@ -869,16 +869,16 @@ static MPP_RET hal_h265d_vdpu383_gen_regs(void *hal,  HalTaskInfo *syn)
     RK_S32 fd = -1;
     RK_U32 mv_size = 0;
     RK_S32 distance = INT_MAX;
+    HalH265dCtx *reg_ctx = (HalH265dCtx *)hal;
 
     (void) fd;
     if (syn->dec.flags.parse_err ||
-        syn->dec.flags.ref_err) {
+        (syn->dec.flags.ref_err && !reg_ctx->cfg->base.disable_error)) {
         h265h_dbg(H265H_DBG_TASK_ERR, "%s found task error\n", __FUNCTION__);
         return MPP_OK;
     }
 
     h265d_dxva2_picture_context_t *dxva_ctx = (h265d_dxva2_picture_context_t *)syn->dec.syntax.data;
-    HalH265dCtx *reg_ctx = (HalH265dCtx *)hal;
     HalBuf *origin_buf = NULL;
 
     void *rps_ptr = NULL;
@@ -1144,7 +1144,7 @@ static MPP_RET hal_h265d_vdpu383_gen_regs(void *hal,  HalTaskInfo *syn)
     }
 
     if ((reg_ctx->error_index[syn->dec.reg_index] == dxva_ctx->pp.CurrPic.Index7Bits) &&
-        !dxva_ctx->pp.IntraPicFlag && !reg_ctx->cfg->base.disable_error) {
+        !dxva_ctx->pp.IntraPicFlag) {
         h265h_dbg(H265H_DBG_TASK_ERR, "current frm may be err, should skip process");
         syn->dec.flags.ref_err = 1;
         return MPP_OK;
@@ -1241,7 +1241,7 @@ static MPP_RET hal_h265d_vdpu383_start(void *hal, HalTaskInfo *task)
     RK_U32 i;
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !reg_ctx->cfg->base.disable_error)) {
         h265h_dbg(H265H_DBG_TASK_ERR, "%s found task error\n", __FUNCTION__);
         return MPP_OK;
     }
@@ -1346,7 +1346,7 @@ static MPP_RET hal_h265d_vdpu383_wait(void *hal, HalTaskInfo *task)
     p = (RK_U8*)hw_regs;
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !reg_ctx->cfg->base.disable_error)) {
         h265h_dbg(H265H_DBG_TASK_ERR, "%s found task error\n", __FUNCTION__);
         goto ERR_PROC;
     }

mpp/hal/rkdec/h265d/hal_h265d_vdpu384a.c

@@ -788,16 +788,16 @@ static MPP_RET hal_h265d_vdpu384a_gen_regs(void *hal,  HalTaskInfo *syn)
     RK_S32 fd = -1;
     RK_U32 mv_size = 0;
     RK_S32 distance = INT_MAX;
+    HalH265dCtx *reg_ctx = (HalH265dCtx *)hal;
 
     (void) fd;
     if (syn->dec.flags.parse_err ||
-        syn->dec.flags.ref_err) {
+        (syn->dec.flags.ref_err && !reg_ctx->cfg->base.disable_error)) {
         h265h_dbg(H265H_DBG_TASK_ERR, "%s found task error\n", __FUNCTION__);
         return MPP_OK;
     }
 
     h265d_dxva2_picture_context_t *dxva_ctx = (h265d_dxva2_picture_context_t *)syn->dec.syntax.data;
-    HalH265dCtx *reg_ctx = (HalH265dCtx *)hal;
     HalBuf *origin_buf = NULL;
 
     if (reg_ctx ->fast_mode) {
@@ -1080,7 +1080,7 @@ static MPP_RET hal_h265d_vdpu384a_gen_regs(void *hal,  HalTaskInfo *syn)
     }
 
     if ((reg_ctx->error_index[syn->dec.reg_index] == dxva_ctx->pp.CurrPic.Index7Bits) &&
-        !dxva_ctx->pp.IntraPicFlag && !reg_ctx->cfg->base.disable_error) {
+        !dxva_ctx->pp.IntraPicFlag) {
         h265h_dbg(H265H_DBG_TASK_ERR, "current frm may be err, should skip process");
         syn->dec.flags.ref_err = 1;
         return MPP_OK;
@@ -1177,7 +1177,7 @@ static MPP_RET hal_h265d_vdpu384a_start(void *hal, HalTaskInfo *task)
     RK_U32 i;
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !reg_ctx->cfg->base.disable_error)) {
         h265h_dbg(H265H_DBG_TASK_ERR, "%s found task error\n", __FUNCTION__);
         return MPP_OK;
     }
@@ -1282,7 +1282,7 @@ static MPP_RET hal_h265d_vdpu384a_wait(void *hal, HalTaskInfo *task)
     p = (RK_U8*)hw_regs;
 
     if (task->dec.flags.parse_err ||
-        task->dec.flags.ref_err) {
+        (task->dec.flags.ref_err && !reg_ctx->cfg->base.disable_error)) {
         h265h_dbg(H265H_DBG_TASK_ERR, "%s found task error\n", __FUNCTION__);
         goto ERR_PROC;
     }

mpp/inc/mpp_dec_cfg.h

@@ -43,6 +43,7 @@ typedef enum MppDecCfgChange_e {
     /* reserve high bit for global config */
     MPP_DEC_CFG_CHANGE_DISABLE_THREAD    = (1 << 28),
     MPP_DEC_CFG_CHANGE_CODEC_MODE        = (1 << 29),
+    MPP_DEC_CFG_CHANGE_DIS_ERR_CLR_MARK  = (1 << 30),
 
     MPP_DEC_CFG_CHANGE_ALL               = (0xFFFFFFFF),
 } MppDecCfgChange;
@@ -95,6 +96,7 @@ typedef struct MppDecBaseCfg_t {
     RK_U32              disable_dpb_chk;
     RK_U32              disable_thread;
     RK_U32              codec_mode;
+    RK_U32              dis_err_clr_mark;
 } MppDecBaseCfg;
 
 typedef enum MppDecCbCfgChange_e {

mpp/legacy/vpu_api_legacy.cpp

@@ -1723,6 +1723,9 @@ RK_S32 VpuApiLegacy::control(VpuCodecContext *ctx, VPU_API_CMD cmd, void *param)
     case VPU_API_SET_DISABLE_ERROR: {
         mpicmd = MPP_DEC_SET_DISABLE_ERROR;
     } break;
+    case VPU_API_SET_DIS_ERR_CLR_MARK: {
+        mpicmd = MPP_DEC_SET_DIS_ERR_CLR_MARK;
+    } break;
     case VPU_API_SET_IMMEDIATE_OUT: {
         mpicmd = MPP_DEC_SET_IMMEDIATE_OUT;
     } break;

mpp/mpp.cpp

@@ -1322,6 +1322,7 @@ MPP_RET Mpp::control_dec(MpiCmd cmd, MppParam param)
     case MPP_DEC_SET_PARSER_FAST_MODE :
     case MPP_DEC_SET_IMMEDIATE_OUT :
     case MPP_DEC_SET_DISABLE_ERROR :
+    case MPP_DEC_SET_DIS_ERR_CLR_MARK :
     case MPP_DEC_SET_ENABLE_DEINTERLACE :
     case MPP_DEC_SET_ENABLE_FAST_PLAY :
     case MPP_DEC_SET_ENABLE_MVC :