rockchip_timer.c 4.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
  4. */
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <dm/ofnode.h>
  8. #include <mapmem.h>
  9. #include <asm/arch/timer.h>
  10. #include <dt-structs.h>
  11. #include <timer.h>
  12. #include <asm/io.h>
  13. DECLARE_GLOBAL_DATA_PTR;
  14. #if CONFIG_IS_ENABLED(OF_PLATDATA)
  15. struct rockchip_timer_plat {
  16. struct dtd_rockchip_rk3368_timer dtd;
  17. };
  18. #endif
  19. /* Driver private data. Contains timer id. Could be either 0 or 1. */
  20. struct rockchip_timer_priv {
  21. struct rk_timer *timer;
  22. };
  23. static inline int64_t rockchip_timer_get_curr_value(struct rk_timer *timer)
  24. {
  25. uint64_t timebase_h, timebase_l;
  26. uint64_t cntr;
  27. timebase_l = readl(&timer->timer_curr_value0);
  28. timebase_h = readl(&timer->timer_curr_value1);
  29. cntr = timebase_h << 32 | timebase_l;
  30. return cntr;
  31. }
  32. #if CONFIG_IS_ENABLED(BOOTSTAGE)
  33. ulong timer_get_boot_us(void)
  34. {
  35. uint64_t ticks = 0;
  36. uint32_t rate;
  37. uint64_t us;
  38. int ret;
  39. ret = dm_timer_init();
  40. if (!ret) {
  41. /* The timer is available */
  42. rate = timer_get_rate(gd->timer);
  43. timer_get_count(gd->timer, &ticks);
  44. #if !CONFIG_IS_ENABLED(OF_PLATDATA)
  45. } else if (ret == -EAGAIN) {
  46. /* We have been called so early that the DM is not ready,... */
  47. ofnode node = offset_to_ofnode(-1);
  48. struct rk_timer *timer = NULL;
  49. /*
  50. * ... so we try to access the raw timer, if it is specified
  51. * via the tick-timer property in /chosen.
  52. */
  53. node = ofnode_get_chosen_node("tick-timer");
  54. if (!ofnode_valid(node)) {
  55. debug("%s: no /chosen/tick-timer\n", __func__);
  56. return 0;
  57. }
  58. timer = (struct rk_timer *)ofnode_get_addr(node);
  59. /* This timer is down-counting */
  60. ticks = ~0uLL - rockchip_timer_get_curr_value(timer);
  61. if (ofnode_read_u32(node, "clock-frequency", &rate)) {
  62. debug("%s: could not read clock-frequency\n", __func__);
  63. return 0;
  64. }
  65. #endif
  66. } else {
  67. return 0;
  68. }
  69. us = (ticks * 1000) / rate;
  70. return us;
  71. }
  72. #endif
  73. static int rockchip_timer_get_count(struct udevice *dev, u64 *count)
  74. {
  75. struct rockchip_timer_priv *priv = dev_get_priv(dev);
  76. uint64_t cntr = rockchip_timer_get_curr_value(priv->timer);
  77. /* timers are down-counting */
  78. *count = ~0ull - cntr;
  79. return 0;
  80. }
  81. static int rockchip_clk_ofdata_to_platdata(struct udevice *dev)
  82. {
  83. #if !CONFIG_IS_ENABLED(OF_PLATDATA)
  84. struct rockchip_timer_priv *priv = dev_get_priv(dev);
  85. priv->timer = dev_read_addr_ptr(dev);
  86. if (!priv->timer)
  87. return -ENOENT;
  88. #endif
  89. return 0;
  90. }
  91. static int rockchip_timer_start(struct udevice *dev)
  92. {
  93. struct rockchip_timer_priv *priv = dev_get_priv(dev);
  94. const uint64_t reload_val = ~0uLL;
  95. const uint32_t reload_val_l = reload_val & 0xffffffff;
  96. const uint32_t reload_val_h = reload_val >> 32;
  97. /* don't reinit, if the timer is already running and set up */
  98. if ((readl(&priv->timer->timer_ctrl_reg) & 1) == 1 &&
  99. (readl(&priv->timer->timer_load_count0) == reload_val_l) &&
  100. (readl(&priv->timer->timer_load_count1) == reload_val_h))
  101. return 0;
  102. /* disable timer and reset all control */
  103. writel(0, &priv->timer->timer_ctrl_reg);
  104. /* write reload value */
  105. writel(reload_val_l, &priv->timer->timer_load_count0);
  106. writel(reload_val_h, &priv->timer->timer_load_count1);
  107. /* enable timer */
  108. writel(1, &priv->timer->timer_ctrl_reg);
  109. return 0;
  110. }
  111. static int rockchip_timer_probe(struct udevice *dev)
  112. {
  113. #if CONFIG_IS_ENABLED(OF_PLATDATA)
  114. struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
  115. struct rockchip_timer_priv *priv = dev_get_priv(dev);
  116. struct rockchip_timer_plat *plat = dev_get_platdata(dev);
  117. priv->timer = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
  118. uc_priv->clock_rate = plat->dtd.clock_frequency;
  119. #endif
  120. return rockchip_timer_start(dev);
  121. }
  122. static const struct timer_ops rockchip_timer_ops = {
  123. .get_count = rockchip_timer_get_count,
  124. };
  125. static const struct udevice_id rockchip_timer_ids[] = {
  126. { .compatible = "rockchip,rk3188-timer" },
  127. { .compatible = "rockchip,rk3288-timer" },
  128. { .compatible = "rockchip,rk3368-timer" },
  129. {}
  130. };
  131. U_BOOT_DRIVER(rockchip_rk3368_timer) = {
  132. .name = "rockchip_rk3368_timer",
  133. .id = UCLASS_TIMER,
  134. .of_match = rockchip_timer_ids,
  135. .probe = rockchip_timer_probe,
  136. .ops = &rockchip_timer_ops,
  137. .priv_auto_alloc_size = sizeof(struct rockchip_timer_priv),
  138. #if CONFIG_IS_ENABLED(OF_PLATDATA)
  139. .platdata_auto_alloc_size = sizeof(struct rockchip_timer_plat),
  140. #endif
  141. .ofdata_to_platdata = rockchip_clk_ofdata_to_platdata,
  142. };