serial_pxa.c 7.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
  4. *
  5. * (C) Copyright 2002
  6. * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
  7. *
  8. * (C) Copyright 2002
  9. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  10. * Marius Groeger <mgroeger@sysgo.de>
  11. *
  12. * (C) Copyright 2002
  13. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  14. * Alex Zuepke <azu@sysgo.de>
  15. *
  16. * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
  17. *
  18. * Modified to add driver model (DM) support
  19. * (C) Copyright 2016 Marcel Ziswiler <marcel.ziswiler@toradex.com>
  20. */
  21. #include <common.h>
  22. #include <asm/arch/pxa-regs.h>
  23. #include <asm/arch/regs-uart.h>
  24. #include <asm/io.h>
  25. #include <dm.h>
  26. #include <dm/platform_data/serial_pxa.h>
  27. #include <linux/compiler.h>
  28. #include <serial.h>
  29. #include <watchdog.h>
  30. DECLARE_GLOBAL_DATA_PTR;
  31. static uint32_t pxa_uart_get_baud_divider(int baudrate)
  32. {
  33. return 921600 / baudrate;
  34. }
  35. static void pxa_uart_toggle_clock(uint32_t uart_index, int enable)
  36. {
  37. uint32_t clk_reg, clk_offset, reg;
  38. clk_reg = UART_CLK_REG;
  39. clk_offset = UART_CLK_BASE << uart_index;
  40. reg = readl(clk_reg);
  41. if (enable)
  42. reg |= clk_offset;
  43. else
  44. reg &= ~clk_offset;
  45. writel(reg, clk_reg);
  46. }
  47. /*
  48. * Enable clock and set baud rate, parity etc.
  49. */
  50. void pxa_setbrg_common(struct pxa_uart_regs *uart_regs, int port, int baudrate)
  51. {
  52. uint32_t divider = pxa_uart_get_baud_divider(baudrate);
  53. if (!divider)
  54. hang();
  55. pxa_uart_toggle_clock(port, 1);
  56. /* Disable interrupts and FIFOs */
  57. writel(0, &uart_regs->ier);
  58. writel(0, &uart_regs->fcr);
  59. /* Set baud rate */
  60. writel(LCR_WLS0 | LCR_WLS1 | LCR_DLAB, &uart_regs->lcr);
  61. writel(divider & 0xff, &uart_regs->dll);
  62. writel(divider >> 8, &uart_regs->dlh);
  63. writel(LCR_WLS0 | LCR_WLS1, &uart_regs->lcr);
  64. /* Enable UART */
  65. writel(IER_UUE, &uart_regs->ier);
  66. }
  67. #ifndef CONFIG_DM_SERIAL
  68. static struct pxa_uart_regs *pxa_uart_index_to_regs(uint32_t uart_index)
  69. {
  70. switch (uart_index) {
  71. case FFUART_INDEX: return (struct pxa_uart_regs *)FFUART_BASE;
  72. case BTUART_INDEX: return (struct pxa_uart_regs *)BTUART_BASE;
  73. case STUART_INDEX: return (struct pxa_uart_regs *)STUART_BASE;
  74. case HWUART_INDEX: return (struct pxa_uart_regs *)HWUART_BASE;
  75. default:
  76. return NULL;
  77. }
  78. }
  79. /*
  80. * Enable clock and set baud rate, parity etc.
  81. */
  82. void pxa_setbrg_dev(uint32_t uart_index)
  83. {
  84. struct pxa_uart_regs *uart_regs = pxa_uart_index_to_regs(uart_index);
  85. if (!uart_regs)
  86. panic("Failed getting UART registers\n");
  87. pxa_setbrg_common(uart_regs, uart_index, gd->baudrate);
  88. }
  89. /*
  90. * Initialise the serial port with the given baudrate. The settings
  91. * are always 8 data bits, no parity, 1 stop bit, no start bits.
  92. */
  93. int pxa_init_dev(unsigned int uart_index)
  94. {
  95. pxa_setbrg_dev(uart_index);
  96. return 0;
  97. }
  98. /*
  99. * Output a single byte to the serial port.
  100. */
  101. void pxa_putc_dev(unsigned int uart_index, const char c)
  102. {
  103. struct pxa_uart_regs *uart_regs;
  104. /* If \n, also do \r */
  105. if (c == '\n')
  106. pxa_putc_dev(uart_index, '\r');
  107. uart_regs = pxa_uart_index_to_regs(uart_index);
  108. if (!uart_regs)
  109. hang();
  110. while (!(readl(&uart_regs->lsr) & LSR_TEMT))
  111. WATCHDOG_RESET();
  112. writel(c, &uart_regs->thr);
  113. }
  114. /*
  115. * Read a single byte from the serial port. Returns 1 on success, 0
  116. * otherwise. When the function is succesfull, the character read is
  117. * written into its argument c.
  118. */
  119. int pxa_tstc_dev(unsigned int uart_index)
  120. {
  121. struct pxa_uart_regs *uart_regs;
  122. uart_regs = pxa_uart_index_to_regs(uart_index);
  123. if (!uart_regs)
  124. return -1;
  125. return readl(&uart_regs->lsr) & LSR_DR;
  126. }
  127. /*
  128. * Read a single byte from the serial port. Returns 1 on success, 0
  129. * otherwise. When the function is succesfull, the character read is
  130. * written into its argument c.
  131. */
  132. int pxa_getc_dev(unsigned int uart_index)
  133. {
  134. struct pxa_uart_regs *uart_regs;
  135. uart_regs = pxa_uart_index_to_regs(uart_index);
  136. if (!uart_regs)
  137. return -1;
  138. while (!(readl(&uart_regs->lsr) & LSR_DR))
  139. WATCHDOG_RESET();
  140. return readl(&uart_regs->rbr) & 0xff;
  141. }
  142. void pxa_puts_dev(unsigned int uart_index, const char *s)
  143. {
  144. while (*s)
  145. pxa_putc_dev(uart_index, *s++);
  146. }
  147. #define pxa_uart(uart, UART) \
  148. int uart##_init(void) \
  149. { \
  150. return pxa_init_dev(UART##_INDEX); \
  151. } \
  152. \
  153. void uart##_setbrg(void) \
  154. { \
  155. return pxa_setbrg_dev(UART##_INDEX); \
  156. } \
  157. \
  158. void uart##_putc(const char c) \
  159. { \
  160. return pxa_putc_dev(UART##_INDEX, c); \
  161. } \
  162. \
  163. void uart##_puts(const char *s) \
  164. { \
  165. return pxa_puts_dev(UART##_INDEX, s); \
  166. } \
  167. \
  168. int uart##_getc(void) \
  169. { \
  170. return pxa_getc_dev(UART##_INDEX); \
  171. } \
  172. \
  173. int uart##_tstc(void) \
  174. { \
  175. return pxa_tstc_dev(UART##_INDEX); \
  176. } \
  177. #define pxa_uart_desc(uart) \
  178. struct serial_device serial_##uart##_device = \
  179. { \
  180. .name = "serial_"#uart, \
  181. .start = uart##_init, \
  182. .stop = NULL, \
  183. .setbrg = uart##_setbrg, \
  184. .getc = uart##_getc, \
  185. .tstc = uart##_tstc, \
  186. .putc = uart##_putc, \
  187. .puts = uart##_puts, \
  188. };
  189. #define pxa_uart_multi(uart, UART) \
  190. pxa_uart(uart, UART) \
  191. pxa_uart_desc(uart)
  192. #if defined(CONFIG_HWUART)
  193. pxa_uart_multi(hwuart, HWUART)
  194. #endif
  195. #if defined(CONFIG_STUART)
  196. pxa_uart_multi(stuart, STUART)
  197. #endif
  198. #if defined(CONFIG_FFUART)
  199. pxa_uart_multi(ffuart, FFUART)
  200. #endif
  201. #if defined(CONFIG_BTUART)
  202. pxa_uart_multi(btuart, BTUART)
  203. #endif
  204. __weak struct serial_device *default_serial_console(void)
  205. {
  206. #if CONFIG_CONS_INDEX == 1
  207. return &serial_hwuart_device;
  208. #elif CONFIG_CONS_INDEX == 2
  209. return &serial_stuart_device;
  210. #elif CONFIG_CONS_INDEX == 3
  211. return &serial_ffuart_device;
  212. #elif CONFIG_CONS_INDEX == 4
  213. return &serial_btuart_device;
  214. #else
  215. #error "Bad CONFIG_CONS_INDEX."
  216. #endif
  217. }
  218. void pxa_serial_initialize(void)
  219. {
  220. #if defined(CONFIG_FFUART)
  221. serial_register(&serial_ffuart_device);
  222. #endif
  223. #if defined(CONFIG_BTUART)
  224. serial_register(&serial_btuart_device);
  225. #endif
  226. #if defined(CONFIG_STUART)
  227. serial_register(&serial_stuart_device);
  228. #endif
  229. }
  230. #endif /* CONFIG_DM_SERIAL */
  231. #ifdef CONFIG_DM_SERIAL
  232. static int pxa_serial_probe(struct udevice *dev)
  233. {
  234. struct pxa_serial_platdata *plat = dev->platdata;
  235. pxa_setbrg_common((struct pxa_uart_regs *)plat->base, plat->port,
  236. plat->baudrate);
  237. return 0;
  238. }
  239. static int pxa_serial_putc(struct udevice *dev, const char ch)
  240. {
  241. struct pxa_serial_platdata *plat = dev->platdata;
  242. struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base;
  243. /* Wait for last character to go. */
  244. if (!(readl(&uart_regs->lsr) & LSR_TEMT))
  245. return -EAGAIN;
  246. writel(ch, &uart_regs->thr);
  247. return 0;
  248. }
  249. static int pxa_serial_getc(struct udevice *dev)
  250. {
  251. struct pxa_serial_platdata *plat = dev->platdata;
  252. struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base;
  253. /* Wait for a character to arrive. */
  254. if (!(readl(&uart_regs->lsr) & LSR_DR))
  255. return -EAGAIN;
  256. return readl(&uart_regs->rbr) & 0xff;
  257. }
  258. int pxa_serial_setbrg(struct udevice *dev, int baudrate)
  259. {
  260. struct pxa_serial_platdata *plat = dev->platdata;
  261. struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base;
  262. int port = plat->port;
  263. pxa_setbrg_common(uart_regs, port, baudrate);
  264. return 0;
  265. }
  266. static int pxa_serial_pending(struct udevice *dev, bool input)
  267. {
  268. struct pxa_serial_platdata *plat = dev->platdata;
  269. struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base;
  270. if (input)
  271. return readl(&uart_regs->lsr) & LSR_DR ? 1 : 0;
  272. else
  273. return readl(&uart_regs->lsr) & LSR_TEMT ? 0 : 1;
  274. return 0;
  275. }
  276. static const struct dm_serial_ops pxa_serial_ops = {
  277. .putc = pxa_serial_putc,
  278. .pending = pxa_serial_pending,
  279. .getc = pxa_serial_getc,
  280. .setbrg = pxa_serial_setbrg,
  281. };
  282. U_BOOT_DRIVER(serial_pxa) = {
  283. .name = "serial_pxa",
  284. .id = UCLASS_SERIAL,
  285. .probe = pxa_serial_probe,
  286. .ops = &pxa_serial_ops,
  287. .flags = DM_FLAG_PRE_RELOC,
  288. };
  289. #endif /* CONFIG_DM_SERIAL */