k3_arsan_sdhci.c 2.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
  4. *
  5. * Texas Instruments' K3 SD Host Controller Interface
  6. */
  7. #include <clk.h>
  8. #include <common.h>
  9. #include <dm.h>
  10. #include <malloc.h>
  11. #include <power-domain.h>
  12. #include <sdhci.h>
  13. #define K3_ARASAN_SDHCI_MIN_FREQ 0
  14. struct k3_arasan_sdhci_plat {
  15. struct mmc_config cfg;
  16. struct mmc mmc;
  17. unsigned int f_max;
  18. };
  19. static int k3_arasan_sdhci_probe(struct udevice *dev)
  20. {
  21. struct k3_arasan_sdhci_plat *plat = dev_get_platdata(dev);
  22. struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
  23. struct sdhci_host *host = dev_get_priv(dev);
  24. struct power_domain sdhci_pwrdmn;
  25. struct clk clk;
  26. unsigned long clock;
  27. int ret;
  28. ret = power_domain_get_by_index(dev, &sdhci_pwrdmn, 0);
  29. if (ret) {
  30. dev_err(dev, "failed to get power domain\n");
  31. return ret;
  32. }
  33. ret = power_domain_on(&sdhci_pwrdmn);
  34. if (ret) {
  35. dev_err(dev, "Power domain on failed\n");
  36. return ret;
  37. }
  38. ret = clk_get_by_index(dev, 0, &clk);
  39. if (ret) {
  40. dev_err(dev, "failed to get clock\n");
  41. return ret;
  42. }
  43. clock = clk_get_rate(&clk);
  44. if (IS_ERR_VALUE(clock)) {
  45. dev_err(dev, "failed to get rate\n");
  46. return clock;
  47. }
  48. host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD |
  49. SDHCI_QUIRK_BROKEN_R1B;
  50. host->max_clk = clock;
  51. ret = sdhci_setup_cfg(&plat->cfg, host, plat->f_max,
  52. K3_ARASAN_SDHCI_MIN_FREQ);
  53. host->mmc = &plat->mmc;
  54. if (ret)
  55. return ret;
  56. host->mmc->priv = host;
  57. host->mmc->dev = dev;
  58. upriv->mmc = host->mmc;
  59. return sdhci_probe(dev);
  60. }
  61. static int k3_arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
  62. {
  63. struct k3_arasan_sdhci_plat *plat = dev_get_platdata(dev);
  64. struct sdhci_host *host = dev_get_priv(dev);
  65. host->name = dev->name;
  66. host->ioaddr = (void *)dev_read_addr(dev);
  67. host->bus_width = dev_read_u32_default(dev, "bus-width", 4);
  68. plat->f_max = dev_read_u32_default(dev, "max-frequency", 0);
  69. return 0;
  70. }
  71. static int k3_arasan_sdhci_bind(struct udevice *dev)
  72. {
  73. struct k3_arasan_sdhci_plat *plat = dev_get_platdata(dev);
  74. return sdhci_bind(dev, &plat->mmc, &plat->cfg);
  75. }
  76. static const struct udevice_id k3_arasan_sdhci_ids[] = {
  77. { .compatible = "arasan,sdhci-5.1" },
  78. { }
  79. };
  80. U_BOOT_DRIVER(k3_arasan_sdhci_drv) = {
  81. .name = "k3_arasan_sdhci",
  82. .id = UCLASS_MMC,
  83. .of_match = k3_arasan_sdhci_ids,
  84. .ofdata_to_platdata = k3_arasan_sdhci_ofdata_to_platdata,
  85. .ops = &sdhci_ops,
  86. .bind = k3_arasan_sdhci_bind,
  87. .probe = k3_arasan_sdhci_probe,
  88. .priv_auto_alloc_size = sizeof(struct sdhci_host),
  89. .platdata_auto_alloc_size = sizeof(struct k3_arasan_sdhci_plat),
  90. };