i2c-uclass.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2014 Google, Inc
  4. */
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <errno.h>
  8. #include <i2c.h>
  9. #include <malloc.h>
  10. #include <dm/device-internal.h>
  11. #include <dm/lists.h>
  12. #include <dm/pinctrl.h>
  13. #ifdef CONFIG_DM_GPIO
  14. #include <asm/gpio.h>
  15. #endif
  16. #define I2C_MAX_OFFSET_LEN 4
  17. enum {
  18. PIN_SDA = 0,
  19. PIN_SCL,
  20. PIN_COUNT,
  21. };
  22. /* Useful debugging function */
  23. void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs)
  24. {
  25. int i;
  26. for (i = 0; i < nmsgs; i++) {
  27. struct i2c_msg *m = &msg[i];
  28. printf(" %s %x len=%x", m->flags & I2C_M_RD ? "R" : "W",
  29. msg->addr, msg->len);
  30. if (!(m->flags & I2C_M_RD))
  31. printf(": %x", m->buf[0]);
  32. printf("\n");
  33. }
  34. }
  35. /**
  36. * i2c_setup_offset() - Set up a new message with a chip offset
  37. *
  38. * @chip: Chip to use
  39. * @offset: Byte offset within chip
  40. * @offset_buf: Place to put byte offset
  41. * @msg: Message buffer
  42. * @return 0 if OK, -EADDRNOTAVAIL if the offset length is 0. In that case the
  43. * message is still set up but will not contain an offset.
  44. */
  45. static int i2c_setup_offset(struct dm_i2c_chip *chip, uint offset,
  46. uint8_t offset_buf[], struct i2c_msg *msg)
  47. {
  48. int offset_len;
  49. msg->addr = chip->chip_addr;
  50. msg->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
  51. msg->len = chip->offset_len;
  52. msg->buf = offset_buf;
  53. if (!chip->offset_len)
  54. return -EADDRNOTAVAIL;
  55. assert(chip->offset_len <= I2C_MAX_OFFSET_LEN);
  56. offset_len = chip->offset_len;
  57. while (offset_len--)
  58. *offset_buf++ = offset >> (8 * offset_len);
  59. return 0;
  60. }
  61. static int i2c_read_bytewise(struct udevice *dev, uint offset,
  62. uint8_t *buffer, int len)
  63. {
  64. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  65. struct udevice *bus = dev_get_parent(dev);
  66. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  67. struct i2c_msg msg[2], *ptr;
  68. uint8_t offset_buf[I2C_MAX_OFFSET_LEN];
  69. int ret;
  70. int i;
  71. for (i = 0; i < len; i++) {
  72. if (i2c_setup_offset(chip, offset + i, offset_buf, msg))
  73. return -EINVAL;
  74. ptr = msg + 1;
  75. ptr->addr = chip->chip_addr;
  76. ptr->flags = msg->flags | I2C_M_RD;
  77. ptr->len = 1;
  78. ptr->buf = &buffer[i];
  79. ptr++;
  80. ret = ops->xfer(bus, msg, ptr - msg);
  81. if (ret)
  82. return ret;
  83. }
  84. return 0;
  85. }
  86. static int i2c_write_bytewise(struct udevice *dev, uint offset,
  87. const uint8_t *buffer, int len)
  88. {
  89. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  90. struct udevice *bus = dev_get_parent(dev);
  91. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  92. struct i2c_msg msg[1];
  93. uint8_t buf[I2C_MAX_OFFSET_LEN + 1];
  94. int ret;
  95. int i;
  96. for (i = 0; i < len; i++) {
  97. if (i2c_setup_offset(chip, offset + i, buf, msg))
  98. return -EINVAL;
  99. buf[msg->len++] = buffer[i];
  100. ret = ops->xfer(bus, msg, 1);
  101. if (ret)
  102. return ret;
  103. }
  104. return 0;
  105. }
  106. int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len)
  107. {
  108. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  109. struct udevice *bus = dev_get_parent(dev);
  110. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  111. struct i2c_msg msg[2], *ptr;
  112. uint8_t offset_buf[I2C_MAX_OFFSET_LEN];
  113. int msg_count;
  114. if (!ops->xfer)
  115. return -ENOSYS;
  116. if (chip->flags & DM_I2C_CHIP_RD_ADDRESS)
  117. return i2c_read_bytewise(dev, offset, buffer, len);
  118. ptr = msg;
  119. if (!i2c_setup_offset(chip, offset, offset_buf, ptr))
  120. ptr++;
  121. if (len) {
  122. ptr->addr = chip->chip_addr;
  123. ptr->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
  124. ptr->flags |= I2C_M_RD;
  125. ptr->len = len;
  126. ptr->buf = buffer;
  127. ptr++;
  128. }
  129. msg_count = ptr - msg;
  130. return ops->xfer(bus, msg, msg_count);
  131. }
  132. int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
  133. int len)
  134. {
  135. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  136. struct udevice *bus = dev_get_parent(dev);
  137. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  138. struct i2c_msg msg[1];
  139. if (!ops->xfer)
  140. return -ENOSYS;
  141. if (chip->flags & DM_I2C_CHIP_WR_ADDRESS)
  142. return i2c_write_bytewise(dev, offset, buffer, len);
  143. /*
  144. * The simple approach would be to send two messages here: one to
  145. * set the offset and one to write the bytes. However some drivers
  146. * will not be expecting this, and some chips won't like how the
  147. * driver presents this on the I2C bus.
  148. *
  149. * The API does not support separate offset and data. We could extend
  150. * it with a flag indicating that there is data in the next message
  151. * that needs to be processed in the same transaction. We could
  152. * instead add an additional buffer to each message. For now, handle
  153. * this in the uclass since it isn't clear what the impact on drivers
  154. * would be with this extra complication. Unfortunately this means
  155. * copying the message.
  156. *
  157. * Use the stack for small messages, malloc() for larger ones. We
  158. * need to allow space for the offset (up to 4 bytes) and the message
  159. * itself.
  160. */
  161. if (len < 64) {
  162. uint8_t buf[I2C_MAX_OFFSET_LEN + len];
  163. i2c_setup_offset(chip, offset, buf, msg);
  164. msg->len += len;
  165. memcpy(buf + chip->offset_len, buffer, len);
  166. return ops->xfer(bus, msg, 1);
  167. } else {
  168. uint8_t *buf;
  169. int ret;
  170. buf = malloc(I2C_MAX_OFFSET_LEN + len);
  171. if (!buf)
  172. return -ENOMEM;
  173. i2c_setup_offset(chip, offset, buf, msg);
  174. msg->len += len;
  175. memcpy(buf + chip->offset_len, buffer, len);
  176. ret = ops->xfer(bus, msg, 1);
  177. free(buf);
  178. return ret;
  179. }
  180. }
  181. int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)
  182. {
  183. struct udevice *bus = dev_get_parent(dev);
  184. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  185. if (!ops->xfer)
  186. return -ENOSYS;
  187. return ops->xfer(bus, msg, nmsgs);
  188. }
  189. int dm_i2c_reg_read(struct udevice *dev, uint offset)
  190. {
  191. uint8_t val;
  192. int ret;
  193. ret = dm_i2c_read(dev, offset, &val, 1);
  194. if (ret < 0)
  195. return ret;
  196. return val;
  197. }
  198. int dm_i2c_reg_write(struct udevice *dev, uint offset, uint value)
  199. {
  200. uint8_t val = value;
  201. return dm_i2c_write(dev, offset, &val, 1);
  202. }
  203. /**
  204. * i2c_probe_chip() - probe for a chip on a bus
  205. *
  206. * @bus: Bus to probe
  207. * @chip_addr: Chip address to probe
  208. * @flags: Flags for the chip
  209. * @return 0 if found, -ENOSYS if the driver is invalid, -EREMOTEIO if the chip
  210. * does not respond to probe
  211. */
  212. static int i2c_probe_chip(struct udevice *bus, uint chip_addr,
  213. enum dm_i2c_chip_flags chip_flags)
  214. {
  215. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  216. struct i2c_msg msg[1];
  217. int ret;
  218. if (ops->probe_chip) {
  219. ret = ops->probe_chip(bus, chip_addr, chip_flags);
  220. if (!ret || ret != -ENOSYS)
  221. return ret;
  222. }
  223. if (!ops->xfer)
  224. return -ENOSYS;
  225. /* Probe with a zero-length message */
  226. msg->addr = chip_addr;
  227. msg->flags = chip_flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
  228. msg->len = 0;
  229. msg->buf = NULL;
  230. return ops->xfer(bus, msg, 1);
  231. }
  232. static int i2c_bind_driver(struct udevice *bus, uint chip_addr, uint offset_len,
  233. struct udevice **devp)
  234. {
  235. struct dm_i2c_chip *chip;
  236. char name[30], *str;
  237. struct udevice *dev;
  238. int ret;
  239. snprintf(name, sizeof(name), "generic_%x", chip_addr);
  240. str = strdup(name);
  241. if (!str)
  242. return -ENOMEM;
  243. ret = device_bind_driver(bus, "i2c_generic_chip_drv", str, &dev);
  244. debug("%s: device_bind_driver: ret=%d\n", __func__, ret);
  245. if (ret)
  246. goto err_bind;
  247. /* Tell the device what we know about it */
  248. chip = dev_get_parent_platdata(dev);
  249. chip->chip_addr = chip_addr;
  250. chip->offset_len = offset_len;
  251. ret = device_probe(dev);
  252. debug("%s: device_probe: ret=%d\n", __func__, ret);
  253. if (ret)
  254. goto err_probe;
  255. *devp = dev;
  256. return 0;
  257. err_probe:
  258. /*
  259. * If the device failed to probe, unbind it. There is nothing there
  260. * on the bus so we don't want to leave it lying around
  261. */
  262. device_unbind(dev);
  263. err_bind:
  264. free(str);
  265. return ret;
  266. }
  267. int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
  268. struct udevice **devp)
  269. {
  270. struct udevice *dev;
  271. debug("%s: Searching bus '%s' for address %02x: ", __func__,
  272. bus->name, chip_addr);
  273. for (device_find_first_child(bus, &dev); dev;
  274. device_find_next_child(&dev)) {
  275. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  276. int ret;
  277. if (chip->chip_addr == chip_addr) {
  278. ret = device_probe(dev);
  279. debug("found, ret=%d\n", ret);
  280. if (ret)
  281. return ret;
  282. *devp = dev;
  283. return 0;
  284. }
  285. }
  286. debug("not found\n");
  287. return i2c_bind_driver(bus, chip_addr, offset_len, devp);
  288. }
  289. int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
  290. struct udevice **devp)
  291. {
  292. struct udevice *bus;
  293. int ret;
  294. ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus);
  295. if (ret) {
  296. debug("Cannot find I2C bus %d\n", busnum);
  297. return ret;
  298. }
  299. ret = i2c_get_chip(bus, chip_addr, offset_len, devp);
  300. if (ret) {
  301. debug("Cannot find I2C chip %02x on bus %d\n", chip_addr,
  302. busnum);
  303. return ret;
  304. }
  305. return 0;
  306. }
  307. int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
  308. struct udevice **devp)
  309. {
  310. int ret;
  311. *devp = NULL;
  312. /* First probe that chip */
  313. ret = i2c_probe_chip(bus, chip_addr, chip_flags);
  314. debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name,
  315. chip_addr, ret);
  316. if (ret)
  317. return ret;
  318. /* The chip was found, see if we have a driver, and probe it */
  319. ret = i2c_get_chip(bus, chip_addr, 1, devp);
  320. debug("%s: i2c_get_chip: ret=%d\n", __func__, ret);
  321. return ret;
  322. }
  323. int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
  324. {
  325. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  326. struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus);
  327. int ret;
  328. /*
  329. * If we have a method, call it. If not then the driver probably wants
  330. * to deal with speed changes on the next transfer. It can easily read
  331. * the current speed from this uclass
  332. */
  333. if (ops->set_bus_speed) {
  334. ret = ops->set_bus_speed(bus, speed);
  335. if (ret)
  336. return ret;
  337. }
  338. i2c->speed_hz = speed;
  339. return 0;
  340. }
  341. int dm_i2c_get_bus_speed(struct udevice *bus)
  342. {
  343. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  344. struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus);
  345. if (!ops->get_bus_speed)
  346. return i2c->speed_hz;
  347. return ops->get_bus_speed(bus);
  348. }
  349. int i2c_set_chip_flags(struct udevice *dev, uint flags)
  350. {
  351. struct udevice *bus = dev->parent;
  352. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  353. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  354. int ret;
  355. if (ops->set_flags) {
  356. ret = ops->set_flags(dev, flags);
  357. if (ret)
  358. return ret;
  359. }
  360. chip->flags = flags;
  361. return 0;
  362. }
  363. int i2c_get_chip_flags(struct udevice *dev, uint *flagsp)
  364. {
  365. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  366. *flagsp = chip->flags;
  367. return 0;
  368. }
  369. int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len)
  370. {
  371. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  372. if (offset_len > I2C_MAX_OFFSET_LEN)
  373. return -EINVAL;
  374. chip->offset_len = offset_len;
  375. return 0;
  376. }
  377. int i2c_get_chip_offset_len(struct udevice *dev)
  378. {
  379. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  380. return chip->offset_len;
  381. }
  382. #ifdef CONFIG_DM_GPIO
  383. static void i2c_gpio_set_pin(struct gpio_desc *pin, int bit)
  384. {
  385. if (bit)
  386. dm_gpio_set_dir_flags(pin, GPIOD_IS_IN);
  387. else
  388. dm_gpio_set_dir_flags(pin, GPIOD_IS_OUT |
  389. GPIOD_ACTIVE_LOW |
  390. GPIOD_IS_OUT_ACTIVE);
  391. }
  392. static int i2c_gpio_get_pin(struct gpio_desc *pin)
  393. {
  394. return dm_gpio_get_value(pin);
  395. }
  396. static int i2c_deblock_gpio_loop(struct gpio_desc *sda_pin,
  397. struct gpio_desc *scl_pin)
  398. {
  399. int counter = 9;
  400. int ret = 0;
  401. i2c_gpio_set_pin(sda_pin, 1);
  402. i2c_gpio_set_pin(scl_pin, 1);
  403. udelay(5);
  404. /* Toggle SCL until slave release SDA */
  405. while (counter-- >= 0) {
  406. i2c_gpio_set_pin(scl_pin, 1);
  407. udelay(5);
  408. i2c_gpio_set_pin(scl_pin, 0);
  409. udelay(5);
  410. if (i2c_gpio_get_pin(sda_pin))
  411. break;
  412. }
  413. /* Then, send I2C stop */
  414. i2c_gpio_set_pin(sda_pin, 0);
  415. udelay(5);
  416. i2c_gpio_set_pin(scl_pin, 1);
  417. udelay(5);
  418. i2c_gpio_set_pin(sda_pin, 1);
  419. udelay(5);
  420. if (!i2c_gpio_get_pin(sda_pin) || !i2c_gpio_get_pin(scl_pin))
  421. ret = -EREMOTEIO;
  422. return ret;
  423. }
  424. static int i2c_deblock_gpio(struct udevice *bus)
  425. {
  426. struct gpio_desc gpios[PIN_COUNT];
  427. int ret, ret0;
  428. ret = gpio_request_list_by_name(bus, "gpios", gpios,
  429. ARRAY_SIZE(gpios), GPIOD_IS_IN);
  430. if (ret != ARRAY_SIZE(gpios)) {
  431. debug("%s: I2C Node '%s' has no 'gpios' property %s\n",
  432. __func__, dev_read_name(bus), bus->name);
  433. if (ret >= 0) {
  434. gpio_free_list(bus, gpios, ret);
  435. ret = -ENOENT;
  436. }
  437. goto out;
  438. }
  439. ret = pinctrl_select_state(bus, "gpio");
  440. if (ret) {
  441. debug("%s: I2C Node '%s' has no 'gpio' pinctrl state. %s\n",
  442. __func__, dev_read_name(bus), bus->name);
  443. goto out_no_pinctrl;
  444. }
  445. ret0 = i2c_deblock_gpio_loop(&gpios[PIN_SDA], &gpios[PIN_SCL]);
  446. ret = pinctrl_select_state(bus, "default");
  447. if (ret) {
  448. debug("%s: I2C Node '%s' has no 'default' pinctrl state. %s\n",
  449. __func__, dev_read_name(bus), bus->name);
  450. }
  451. ret = !ret ? ret0 : ret;
  452. out_no_pinctrl:
  453. gpio_free_list(bus, gpios, ARRAY_SIZE(gpios));
  454. out:
  455. return ret;
  456. }
  457. #else
  458. static int i2c_deblock_gpio(struct udevice *bus)
  459. {
  460. return -ENOSYS;
  461. }
  462. #endif // CONFIG_DM_GPIO
  463. int i2c_deblock(struct udevice *bus)
  464. {
  465. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  466. if (!ops->deblock)
  467. return i2c_deblock_gpio(bus);
  468. return ops->deblock(bus);
  469. }
  470. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  471. int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip)
  472. {
  473. int addr;
  474. chip->offset_len = dev_read_u32_default(dev, "u-boot,i2c-offset-len",
  475. 1);
  476. chip->flags = 0;
  477. addr = dev_read_u32_default(dev, "reg", -1);
  478. if (addr == -1) {
  479. debug("%s: I2C Node '%s' has no 'reg' property %s\n", __func__,
  480. dev_read_name(dev), dev->name);
  481. return -EINVAL;
  482. }
  483. chip->chip_addr = addr;
  484. return 0;
  485. }
  486. #endif
  487. static int i2c_post_probe(struct udevice *dev)
  488. {
  489. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  490. struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
  491. i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency", 100000);
  492. return dm_i2c_set_bus_speed(dev, i2c->speed_hz);
  493. #else
  494. return 0;
  495. #endif
  496. }
  497. static int i2c_child_post_bind(struct udevice *dev)
  498. {
  499. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  500. struct dm_i2c_chip *plat = dev_get_parent_platdata(dev);
  501. if (!dev_of_valid(dev))
  502. return 0;
  503. return i2c_chip_ofdata_to_platdata(dev, plat);
  504. #else
  505. return 0;
  506. #endif
  507. }
  508. UCLASS_DRIVER(i2c) = {
  509. .id = UCLASS_I2C,
  510. .name = "i2c",
  511. .flags = DM_UC_FLAG_SEQ_ALIAS,
  512. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  513. .post_bind = dm_scan_fdt_dev,
  514. #endif
  515. .post_probe = i2c_post_probe,
  516. .per_device_auto_alloc_size = sizeof(struct dm_i2c_bus),
  517. .per_child_platdata_auto_alloc_size = sizeof(struct dm_i2c_chip),
  518. .child_post_bind = i2c_child_post_bind,
  519. };
  520. UCLASS_DRIVER(i2c_generic) = {
  521. .id = UCLASS_I2C_GENERIC,
  522. .name = "i2c_generic",
  523. };
  524. U_BOOT_DRIVER(i2c_generic_chip_drv) = {
  525. .name = "i2c_generic_chip_drv",
  526. .id = UCLASS_I2C_GENERIC,
  527. };