realtek.c 6.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267
  1. /*
  2. * RealTek PHY drivers
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. *
  6. * Copyright 2010-2011, 2015 Freescale Semiconductor, Inc.
  7. * author Andy Fleming
  8. */
  9. #include <config.h>
  10. #include <common.h>
  11. #include <phy.h>
  12. #define PHY_AUTONEGOTIATE_TIMEOUT 5000
  13. /* RTL8211x PHY Status Register */
  14. #define MIIM_RTL8211x_PHY_STATUS 0x11
  15. #define MIIM_RTL8211x_PHYSTAT_SPEED 0xc000
  16. #define MIIM_RTL8211x_PHYSTAT_GBIT 0x8000
  17. #define MIIM_RTL8211x_PHYSTAT_100 0x4000
  18. #define MIIM_RTL8211x_PHYSTAT_DUPLEX 0x2000
  19. #define MIIM_RTL8211x_PHYSTAT_SPDDONE 0x0800
  20. #define MIIM_RTL8211x_PHYSTAT_LINK 0x0400
  21. /* RTL8211x PHY Interrupt Enable Register */
  22. #define MIIM_RTL8211x_PHY_INER 0x12
  23. #define MIIM_RTL8211x_PHY_INTR_ENA 0x9f01
  24. #define MIIM_RTL8211x_PHY_INTR_DIS 0x0000
  25. /* RTL8211x PHY Interrupt Status Register */
  26. #define MIIM_RTL8211x_PHY_INSR 0x13
  27. /* RTL8211F PHY Status Register */
  28. #define MIIM_RTL8211F_PHY_STATUS 0x1a
  29. #define MIIM_RTL8211F_AUTONEG_ENABLE 0x1000
  30. #define MIIM_RTL8211F_PHYSTAT_SPEED 0x0030
  31. #define MIIM_RTL8211F_PHYSTAT_GBIT 0x0020
  32. #define MIIM_RTL8211F_PHYSTAT_100 0x0010
  33. #define MIIM_RTL8211F_PHYSTAT_DUPLEX 0x0008
  34. #define MIIM_RTL8211F_PHYSTAT_SPDDONE 0x0800
  35. #define MIIM_RTL8211F_PHYSTAT_LINK 0x0004
  36. #define MIIM_RTL8211F_PAGE_SELECT 0x1f
  37. #define MIIM_RTL8211F_TX_DELAY 0x100
  38. #define MIIM_RTL8211F_LCR 0x10
  39. /* RealTek RTL8211x */
  40. static int rtl8211x_config(struct phy_device *phydev)
  41. {
  42. phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET);
  43. /* mask interrupt at init; if the interrupt is
  44. * needed indeed, it should be explicitly enabled
  45. */
  46. phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER,
  47. MIIM_RTL8211x_PHY_INTR_DIS);
  48. /* read interrupt status just to clear it */
  49. phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER);
  50. genphy_config_aneg(phydev);
  51. return 0;
  52. }
  53. static int rtl8211f_config(struct phy_device *phydev)
  54. {
  55. u16 reg;
  56. phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET);
  57. if (phydev->interface == PHY_INTERFACE_MODE_RGMII) {
  58. /* enable TXDLY */
  59. phy_write(phydev, MDIO_DEVAD_NONE,
  60. MIIM_RTL8211F_PAGE_SELECT, 0xd08);
  61. reg = phy_read(phydev, MDIO_DEVAD_NONE, 0x11);
  62. reg |= MIIM_RTL8211F_TX_DELAY;
  63. phy_write(phydev, MDIO_DEVAD_NONE, 0x11, reg);
  64. /* restore to default page 0 */
  65. phy_write(phydev, MDIO_DEVAD_NONE,
  66. MIIM_RTL8211F_PAGE_SELECT, 0x0);
  67. }
  68. /* Set green LED for Link, yellow LED for Active */
  69. phy_write(phydev, MDIO_DEVAD_NONE,
  70. MIIM_RTL8211F_PAGE_SELECT, 0xd04);
  71. phy_write(phydev, MDIO_DEVAD_NONE, 0x10, 0x617f);
  72. phy_write(phydev, MDIO_DEVAD_NONE,
  73. MIIM_RTL8211F_PAGE_SELECT, 0x0);
  74. genphy_config_aneg(phydev);
  75. return 0;
  76. }
  77. static int rtl8211x_parse_status(struct phy_device *phydev)
  78. {
  79. unsigned int speed;
  80. unsigned int mii_reg;
  81. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_STATUS);
  82. if (!(mii_reg & MIIM_RTL8211x_PHYSTAT_SPDDONE)) {
  83. int i = 0;
  84. /* in case of timeout ->link is cleared */
  85. phydev->link = 1;
  86. puts("Waiting for PHY realtime link");
  87. while (!(mii_reg & MIIM_RTL8211x_PHYSTAT_SPDDONE)) {
  88. /* Timeout reached ? */
  89. if (i > PHY_AUTONEGOTIATE_TIMEOUT) {
  90. puts(" TIMEOUT !\n");
  91. phydev->link = 0;
  92. break;
  93. }
  94. if ((i++ % 1000) == 0)
  95. putc('.');
  96. udelay(1000); /* 1 ms */
  97. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE,
  98. MIIM_RTL8211x_PHY_STATUS);
  99. }
  100. puts(" done\n");
  101. udelay(500000); /* another 500 ms (results in faster booting) */
  102. } else {
  103. if (mii_reg & MIIM_RTL8211x_PHYSTAT_LINK)
  104. phydev->link = 1;
  105. else
  106. phydev->link = 0;
  107. }
  108. if (mii_reg & MIIM_RTL8211x_PHYSTAT_DUPLEX)
  109. phydev->duplex = DUPLEX_FULL;
  110. else
  111. phydev->duplex = DUPLEX_HALF;
  112. speed = (mii_reg & MIIM_RTL8211x_PHYSTAT_SPEED);
  113. switch (speed) {
  114. case MIIM_RTL8211x_PHYSTAT_GBIT:
  115. phydev->speed = SPEED_1000;
  116. break;
  117. case MIIM_RTL8211x_PHYSTAT_100:
  118. phydev->speed = SPEED_100;
  119. break;
  120. default:
  121. phydev->speed = SPEED_10;
  122. }
  123. return 0;
  124. }
  125. static int rtl8211f_parse_status(struct phy_device *phydev)
  126. {
  127. unsigned int speed;
  128. unsigned int mii_reg;
  129. int i = 0;
  130. phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT, 0xa43);
  131. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PHY_STATUS);
  132. phydev->link = 1;
  133. while (!(mii_reg & MIIM_RTL8211F_PHYSTAT_LINK)) {
  134. if (i > PHY_AUTONEGOTIATE_TIMEOUT) {
  135. puts(" TIMEOUT !\n");
  136. phydev->link = 0;
  137. break;
  138. }
  139. if ((i++ % 1000) == 0)
  140. putc('.');
  141. udelay(1000);
  142. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE,
  143. MIIM_RTL8211F_PHY_STATUS);
  144. }
  145. if (mii_reg & MIIM_RTL8211F_PHYSTAT_DUPLEX)
  146. phydev->duplex = DUPLEX_FULL;
  147. else
  148. phydev->duplex = DUPLEX_HALF;
  149. speed = (mii_reg & MIIM_RTL8211F_PHYSTAT_SPEED);
  150. switch (speed) {
  151. case MIIM_RTL8211F_PHYSTAT_GBIT:
  152. phydev->speed = SPEED_1000;
  153. break;
  154. case MIIM_RTL8211F_PHYSTAT_100:
  155. phydev->speed = SPEED_100;
  156. break;
  157. default:
  158. phydev->speed = SPEED_10;
  159. }
  160. return 0;
  161. }
  162. static int rtl8211x_startup(struct phy_device *phydev)
  163. {
  164. /* Read the Status (2x to make sure link is right) */
  165. genphy_update_link(phydev);
  166. rtl8211x_parse_status(phydev);
  167. return 0;
  168. }
  169. static int rtl8211f_startup(struct phy_device *phydev)
  170. {
  171. /* Read the Status (2x to make sure link is right) */
  172. genphy_update_link(phydev);
  173. rtl8211f_parse_status(phydev);
  174. return 0;
  175. }
  176. /* Support for RTL8211B PHY */
  177. static struct phy_driver RTL8211B_driver = {
  178. .name = "RealTek RTL8211B",
  179. .uid = 0x1cc910,
  180. .mask = 0xffffff,
  181. .features = PHY_GBIT_FEATURES,
  182. .config = &rtl8211x_config,
  183. .startup = &rtl8211x_startup,
  184. .shutdown = &genphy_shutdown,
  185. };
  186. /* Support for RTL8211E-VB-CG, RTL8211E-VL-CG and RTL8211EG-VB-CG PHYs */
  187. static struct phy_driver RTL8211E_driver = {
  188. .name = "RealTek RTL8211E",
  189. .uid = 0x1cc915,
  190. .mask = 0xffffff,
  191. .features = PHY_GBIT_FEATURES,
  192. .config = &rtl8211x_config,
  193. .startup = &rtl8211x_startup,
  194. .shutdown = &genphy_shutdown,
  195. };
  196. /* Support for RTL8211DN PHY */
  197. static struct phy_driver RTL8211DN_driver = {
  198. .name = "RealTek RTL8211DN",
  199. .uid = 0x1cc914,
  200. .mask = 0xffffff,
  201. .features = PHY_GBIT_FEATURES,
  202. .config = &rtl8211x_config,
  203. .startup = &rtl8211x_startup,
  204. .shutdown = &genphy_shutdown,
  205. };
  206. /* Support for RTL8211F PHY */
  207. static struct phy_driver RTL8211F_driver = {
  208. .name = "RealTek RTL8211F",
  209. .uid = 0x1cc916,
  210. .mask = 0xffffff,
  211. .features = PHY_GBIT_FEATURES,
  212. .config = &rtl8211f_config,
  213. .startup = &rtl8211f_startup,
  214. .shutdown = &genphy_shutdown,
  215. };
  216. int phy_realtek_init(void)
  217. {
  218. phy_register(&RTL8211B_driver);
  219. phy_register(&RTL8211E_driver);
  220. phy_register(&RTL8211F_driver);
  221. phy_register(&RTL8211DN_driver);
  222. return 0;
  223. }