tpm_tis_st33zp24_spi.c 16 KB

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  1. /*
  2. * STMicroelectronics TPM ST33ZP24 SPI UBOOT driver
  3. *
  4. * Copyright (C) 2016 STMicroelectronics
  5. *
  6. * Description: Device driver for ST33ZP24 SPI TPM TCG.
  7. *
  8. * This device driver implements the TPM interface as defined in
  9. * the TCG TPM Interface Spec version 1.21, revision 1.0 and the
  10. * STMicroelectronics Protocol Stack Specification version 1.2.0.
  11. *
  12. * SPDX-License-Identifier: GPL-2.0+
  13. */
  14. #include <common.h>
  15. #include <dm.h>
  16. #include <fdtdec.h>
  17. #include <spi.h>
  18. #include <tpm.h>
  19. #include <errno.h>
  20. #include <linux/types.h>
  21. #include <asm/unaligned.h>
  22. #include <linux/compat.h>
  23. #include "tpm_tis.h"
  24. #include "tpm_internal.h"
  25. #define TPM_ACCESS 0x0
  26. #define TPM_STS 0x18
  27. #define TPM_DATA_FIFO 0x24
  28. #define LOCALITY0 0
  29. #define TPM_DATA_FIFO 0x24
  30. #define TPM_INTF_CAPABILITY 0x14
  31. #define TPM_DUMMY_BYTE 0x00
  32. #define TPM_WRITE_DIRECTION 0x80
  33. #define MAX_SPI_LATENCY 15
  34. #define LOCALITY0 0
  35. #define ST33ZP24_OK 0x5A
  36. #define ST33ZP24_UNDEFINED_ERR 0x80
  37. #define ST33ZP24_BADLOCALITY 0x81
  38. #define ST33ZP24_TISREGISTER_UKNOWN 0x82
  39. #define ST33ZP24_LOCALITY_NOT_ACTIVATED 0x83
  40. #define ST33ZP24_HASH_END_BEFORE_HASH_START 0x84
  41. #define ST33ZP24_BAD_COMMAND_ORDER 0x85
  42. #define ST33ZP24_INCORECT_RECEIVED_LENGTH 0x86
  43. #define ST33ZP24_TPM_FIFO_OVERFLOW 0x89
  44. #define ST33ZP24_UNEXPECTED_READ_FIFO 0x8A
  45. #define ST33ZP24_UNEXPECTED_WRITE_FIFO 0x8B
  46. #define ST33ZP24_CMDRDY_SET_WHEN_PROCESSING_HASH_END 0x90
  47. #define ST33ZP24_DUMMY_BYTES 0x00
  48. /*
  49. * TPM command can be up to 2048 byte, A TPM response can be up to
  50. * 1024 byte.
  51. * Between command and response, there are latency byte (up to 15
  52. * usually on st33zp24 2 are enough).
  53. *
  54. * Overall when sending a command and expecting an answer we need if
  55. * worst case:
  56. * 2048 (for the TPM command) + 1024 (for the TPM answer). We need
  57. * some latency byte before the answer is available (max 15).
  58. * We have 2048 + 1024 + 15.
  59. */
  60. #define ST33ZP24_SPI_BUFFER_SIZE (TPM_BUFSIZE + (TPM_BUFSIZE / 2) +\
  61. MAX_SPI_LATENCY)
  62. struct st33zp24_spi_phy {
  63. int latency;
  64. u8 tx_buf[ST33ZP24_SPI_BUFFER_SIZE];
  65. u8 rx_buf[ST33ZP24_SPI_BUFFER_SIZE];
  66. };
  67. static int st33zp24_spi_status_to_errno(u8 code)
  68. {
  69. switch (code) {
  70. case ST33ZP24_OK:
  71. return 0;
  72. case ST33ZP24_UNDEFINED_ERR:
  73. case ST33ZP24_BADLOCALITY:
  74. case ST33ZP24_TISREGISTER_UKNOWN:
  75. case ST33ZP24_LOCALITY_NOT_ACTIVATED:
  76. case ST33ZP24_HASH_END_BEFORE_HASH_START:
  77. case ST33ZP24_BAD_COMMAND_ORDER:
  78. case ST33ZP24_UNEXPECTED_READ_FIFO:
  79. case ST33ZP24_UNEXPECTED_WRITE_FIFO:
  80. case ST33ZP24_CMDRDY_SET_WHEN_PROCESSING_HASH_END:
  81. return -EPROTO;
  82. case ST33ZP24_INCORECT_RECEIVED_LENGTH:
  83. case ST33ZP24_TPM_FIFO_OVERFLOW:
  84. return -EMSGSIZE;
  85. case ST33ZP24_DUMMY_BYTES:
  86. return -ENOSYS;
  87. }
  88. return code;
  89. }
  90. /*
  91. * st33zp24_spi_send
  92. * Send byte to TPM register according to the ST33ZP24 SPI protocol.
  93. * @param: tpm, the chip description
  94. * @param: tpm_register, the tpm tis register where the data should be written
  95. * @param: tpm_data, the tpm_data to write inside the tpm_register
  96. * @param: tpm_size, The length of the data
  97. * @return: should be zero if success else a negative error code.
  98. */
  99. static int st33zp24_spi_write(struct udevice *dev, u8 tpm_register,
  100. const u8 *tpm_data, size_t tpm_size)
  101. {
  102. int total_length = 0, ret;
  103. struct spi_slave *slave = dev_get_parent_priv(dev);
  104. struct st33zp24_spi_phy *phy = dev_get_platdata(dev);
  105. u8 *tx_buf = (u8 *)phy->tx_buf;
  106. u8 *rx_buf = phy->rx_buf;
  107. tx_buf[total_length++] = TPM_WRITE_DIRECTION | LOCALITY0;
  108. tx_buf[total_length++] = tpm_register;
  109. if (tpm_size > 0 && tpm_register == TPM_DATA_FIFO) {
  110. tx_buf[total_length++] = tpm_size >> 8;
  111. tx_buf[total_length++] = tpm_size;
  112. }
  113. memcpy(tx_buf + total_length, tpm_data, tpm_size);
  114. total_length += tpm_size;
  115. memset(tx_buf + total_length, TPM_DUMMY_BYTE, phy->latency);
  116. total_length += phy->latency;
  117. ret = spi_claim_bus(slave);
  118. if (ret < 0)
  119. return ret;
  120. ret = spi_xfer(slave, total_length * 8, tx_buf, rx_buf,
  121. SPI_XFER_BEGIN | SPI_XFER_END);
  122. if (ret < 0)
  123. return ret;
  124. spi_release_bus(slave);
  125. if (ret == 0)
  126. ret = rx_buf[total_length - 1];
  127. return st33zp24_spi_status_to_errno(ret);
  128. }
  129. /*
  130. * spi_st33zp24_spi_read8_reg
  131. * Recv byte from the TIS register according to the ST33ZP24 SPI protocol.
  132. * @param: tpm, the chip description
  133. * @param: tpm_loc, the locality to read register from
  134. * @param: tpm_register, the tpm tis register where the data should be read
  135. * @param: tpm_data, the TPM response
  136. * @param: tpm_size, tpm TPM response size to read.
  137. * @return: should be zero if success else a negative error code.
  138. */
  139. static u8 st33zp24_spi_read8_reg(struct udevice *dev, u8 tpm_register,
  140. u8 *tpm_data, size_t tpm_size)
  141. {
  142. int total_length = 0, ret;
  143. struct spi_slave *slave = dev_get_parent_priv(dev);
  144. struct st33zp24_spi_phy *phy = dev_get_platdata(dev);
  145. u8 *tx_buf = (u8 *)phy->tx_buf;
  146. u8 *rx_buf = phy->rx_buf;
  147. /* Pre-Header */
  148. tx_buf[total_length++] = LOCALITY0;
  149. tx_buf[total_length++] = tpm_register;
  150. memset(&tx_buf[total_length], TPM_DUMMY_BYTE,
  151. phy->latency + tpm_size);
  152. total_length += phy->latency + tpm_size;
  153. ret = spi_claim_bus(slave);
  154. if (ret < 0)
  155. return 0;
  156. ret = spi_xfer(slave, total_length * 8, tx_buf, rx_buf,
  157. SPI_XFER_BEGIN | SPI_XFER_END);
  158. if (ret < 0)
  159. return 0;
  160. spi_release_bus(slave);
  161. if (tpm_size > 0 && ret == 0) {
  162. ret = rx_buf[total_length - tpm_size - 1];
  163. memcpy(tpm_data, rx_buf + total_length - tpm_size, tpm_size);
  164. }
  165. return ret;
  166. }
  167. /*
  168. * st33zp24_spi_recv
  169. * Recv byte from the TIS register according to the ST33ZP24 SPI protocol.
  170. * @param: phy_id, the phy description
  171. * @param: tpm_register, the tpm tis register where the data should be read
  172. * @param: tpm_data, the TPM response
  173. * @param: tpm_size, tpm TPM response size to read.
  174. * @return: number of byte read successfully: should be one if success.
  175. */
  176. static int st33zp24_spi_read(struct udevice *dev, u8 tpm_register,
  177. u8 *tpm_data, size_t tpm_size)
  178. {
  179. int ret;
  180. ret = st33zp24_spi_read8_reg(dev, tpm_register, tpm_data, tpm_size);
  181. if (!st33zp24_spi_status_to_errno(ret))
  182. return tpm_size;
  183. return ret;
  184. }
  185. static int st33zp24_spi_evaluate_latency(struct udevice *dev)
  186. {
  187. int latency = 1, status = 0;
  188. u8 data = 0;
  189. struct st33zp24_spi_phy *phy = dev_get_platdata(dev);
  190. while (!status && latency < MAX_SPI_LATENCY) {
  191. phy->latency = latency;
  192. status = st33zp24_spi_read8_reg(dev, TPM_INTF_CAPABILITY,
  193. &data, 1);
  194. latency++;
  195. }
  196. if (status < 0)
  197. return status;
  198. if (latency == MAX_SPI_LATENCY)
  199. return -ENODEV;
  200. return latency - 1;
  201. }
  202. /*
  203. * st33zp24_spi_release_locality release the active locality
  204. * @param: chip, the tpm chip description.
  205. */
  206. static void st33zp24_spi_release_locality(struct udevice *dev)
  207. {
  208. u8 data = TPM_ACCESS_ACTIVE_LOCALITY;
  209. st33zp24_spi_write(dev, TPM_ACCESS, &data, 1);
  210. }
  211. /*
  212. * st33zp24_spi_check_locality if the locality is active
  213. * @param: chip, the tpm chip description
  214. * @return: the active locality or -EACCES.
  215. */
  216. static int st33zp24_spi_check_locality(struct udevice *dev)
  217. {
  218. u8 data;
  219. u8 status;
  220. struct tpm_chip *chip = dev_get_priv(dev);
  221. status = st33zp24_spi_read(dev, TPM_ACCESS, &data, 1);
  222. if (status && (data &
  223. (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
  224. (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
  225. return chip->locality;
  226. return -EACCES;
  227. }
  228. /*
  229. * st33zp24_spi_request_locality request the TPM locality
  230. * @param: chip, the chip description
  231. * @return: the active locality or negative value.
  232. */
  233. static int st33zp24_spi_request_locality(struct udevice *dev)
  234. {
  235. unsigned long start, stop;
  236. long ret;
  237. u8 data;
  238. struct tpm_chip *chip = dev_get_priv(dev);
  239. if (st33zp24_spi_check_locality(dev) == chip->locality)
  240. return chip->locality;
  241. data = TPM_ACCESS_REQUEST_USE;
  242. ret = st33zp24_spi_write(dev, TPM_ACCESS, &data, 1);
  243. if (ret < 0)
  244. return ret;
  245. /* wait for locality activated */
  246. start = get_timer(0);
  247. stop = chip->timeout_a;
  248. do {
  249. if (st33zp24_spi_check_locality(dev) >= 0)
  250. return chip->locality;
  251. udelay(TPM_TIMEOUT_MS * 1000);
  252. } while (get_timer(start) < stop);
  253. return -EACCES;
  254. }
  255. /*
  256. * st33zp24_spi_status return the TPM_STS register
  257. * @param: chip, the tpm chip description
  258. * @return: the TPM_STS register value.
  259. */
  260. static u8 st33zp24_spi_status(struct udevice *dev)
  261. {
  262. u8 data;
  263. st33zp24_spi_read(dev, TPM_STS, &data, 1);
  264. return data;
  265. }
  266. /*
  267. * st33zp24_spi_get_burstcount return the burstcount address 0x19 0x1A
  268. * @param: chip, the chip description
  269. * return: the burstcount or -TPM_DRIVER_ERR in case of error.
  270. */
  271. static int st33zp24_spi_get_burstcount(struct udevice *dev)
  272. {
  273. struct tpm_chip *chip = dev_get_priv(dev);
  274. unsigned long start, stop;
  275. int burstcnt, status;
  276. u8 tpm_reg, temp;
  277. /* wait for burstcount */
  278. start = get_timer(0);
  279. stop = chip->timeout_d;
  280. do {
  281. tpm_reg = TPM_STS + 1;
  282. status = st33zp24_spi_read(dev, tpm_reg, &temp, 1);
  283. if (status < 0)
  284. return -EBUSY;
  285. tpm_reg = TPM_STS + 2;
  286. burstcnt = temp;
  287. status = st33zp24_spi_read(dev, tpm_reg, &temp, 1);
  288. if (status < 0)
  289. return -EBUSY;
  290. burstcnt |= temp << 8;
  291. if (burstcnt)
  292. return burstcnt;
  293. udelay(TIS_SHORT_TIMEOUT_MS * 1000);
  294. } while (get_timer(start) < stop);
  295. return -EBUSY;
  296. }
  297. /*
  298. * st33zp24_spi_cancel, cancel the current command execution or
  299. * set STS to COMMAND READY.
  300. * @param: chip, tpm_chip description.
  301. */
  302. static void st33zp24_spi_cancel(struct udevice *dev)
  303. {
  304. u8 data;
  305. data = TPM_STS_COMMAND_READY;
  306. st33zp24_spi_write(dev, TPM_STS, &data, 1);
  307. }
  308. /*
  309. * st33zp24_spi_wait_for_stat wait for a TPM_STS value
  310. * @param: chip, the tpm chip description
  311. * @param: mask, the value mask to wait
  312. * @param: timeout, the timeout
  313. * @param: status,
  314. * @return: the tpm status, 0 if success, -ETIME if timeout is reached.
  315. */
  316. static int st33zp24_spi_wait_for_stat(struct udevice *dev, u8 mask,
  317. unsigned long timeout, int *status)
  318. {
  319. unsigned long start, stop;
  320. /* Check current status */
  321. *status = st33zp24_spi_status(dev);
  322. if ((*status & mask) == mask)
  323. return 0;
  324. start = get_timer(0);
  325. stop = timeout;
  326. do {
  327. udelay(TPM_TIMEOUT_MS * 1000);
  328. *status = st33zp24_spi_status(dev);
  329. if ((*status & mask) == mask)
  330. return 0;
  331. } while (get_timer(start) < stop);
  332. return -ETIME;
  333. }
  334. /*
  335. * st33zp24_spi_recv_data receive data
  336. * @param: chip, the tpm chip description
  337. * @param: buf, the buffer where the data are received
  338. * @param: count, the number of data to receive
  339. * @return: the number of bytes read from TPM FIFO.
  340. */
  341. static int st33zp24_spi_recv_data(struct udevice *dev, u8 *buf, size_t count)
  342. {
  343. struct tpm_chip *chip = dev_get_priv(dev);
  344. int size = 0, burstcnt, len, ret, status;
  345. while (size < count &&
  346. st33zp24_spi_wait_for_stat(dev, TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  347. chip->timeout_c, &status) == 0) {
  348. burstcnt = st33zp24_spi_get_burstcount(dev);
  349. if (burstcnt < 0)
  350. return burstcnt;
  351. len = min_t(int, burstcnt, count - size);
  352. ret = st33zp24_spi_read(dev, TPM_DATA_FIFO, buf + size, len);
  353. if (ret < 0)
  354. return ret;
  355. size += len;
  356. }
  357. return size;
  358. }
  359. /*
  360. * st33zp24_spi_recv received TPM response through TPM phy.
  361. * @param: chip, tpm_chip description.
  362. * @param: buf, the buffer to store data.
  363. * @param: count, the number of bytes that can received (sizeof buf).
  364. * @return: Returns zero in case of success else -EIO.
  365. */
  366. static int st33zp24_spi_recv(struct udevice *dev, u8 *buf, size_t count)
  367. {
  368. struct tpm_chip *chip = dev_get_priv(dev);
  369. int size, expected;
  370. if (!chip)
  371. return -ENODEV;
  372. if (count < TPM_HEADER_SIZE) {
  373. size = -EIO;
  374. goto out;
  375. }
  376. size = st33zp24_spi_recv_data(dev, buf, TPM_HEADER_SIZE);
  377. if (size < TPM_HEADER_SIZE) {
  378. debug("TPM error, unable to read header\n");
  379. goto out;
  380. }
  381. expected = get_unaligned_be32(buf + 2);
  382. if (expected > count) {
  383. size = -EIO;
  384. goto out;
  385. }
  386. size += st33zp24_spi_recv_data(dev, &buf[TPM_HEADER_SIZE],
  387. expected - TPM_HEADER_SIZE);
  388. if (size < expected) {
  389. debug("TPM error, unable to read remaining bytes of result\n");
  390. size = -EIO;
  391. goto out;
  392. }
  393. out:
  394. st33zp24_spi_cancel(dev);
  395. st33zp24_spi_release_locality(dev);
  396. return size;
  397. }
  398. /*
  399. * st33zp24_spi_send send TPM commands through TPM phy.
  400. * @param: chip, tpm_chip description.
  401. * @param: buf, the buffer to send.
  402. * @param: len, the number of bytes to send.
  403. * @return: Returns zero in case of success else the negative error code.
  404. */
  405. static int st33zp24_spi_send(struct udevice *dev, const u8 *buf, size_t len)
  406. {
  407. struct tpm_chip *chip = dev_get_priv(dev);
  408. u32 i, size;
  409. int burstcnt, ret, status;
  410. u8 data, tpm_stat;
  411. if (!chip)
  412. return -ENODEV;
  413. if (len < TPM_HEADER_SIZE)
  414. return -EIO;
  415. ret = st33zp24_spi_request_locality(dev);
  416. if (ret < 0)
  417. return ret;
  418. tpm_stat = st33zp24_spi_status(dev);
  419. if ((tpm_stat & TPM_STS_COMMAND_READY) == 0) {
  420. st33zp24_spi_cancel(dev);
  421. if (st33zp24_spi_wait_for_stat(dev, TPM_STS_COMMAND_READY,
  422. chip->timeout_b, &status) < 0) {
  423. ret = -ETIME;
  424. goto out_err;
  425. }
  426. }
  427. for (i = 0; i < len - 1;) {
  428. burstcnt = st33zp24_spi_get_burstcount(dev);
  429. if (burstcnt < 0)
  430. return burstcnt;
  431. size = min_t(int, len - i - 1, burstcnt);
  432. ret = st33zp24_spi_write(dev, TPM_DATA_FIFO, buf + i, size);
  433. if (ret < 0)
  434. goto out_err;
  435. i += size;
  436. }
  437. tpm_stat = st33zp24_spi_status(dev);
  438. if ((tpm_stat & TPM_STS_DATA_EXPECT) == 0) {
  439. ret = -EIO;
  440. goto out_err;
  441. }
  442. ret = st33zp24_spi_write(dev, TPM_DATA_FIFO, buf + len - 1, 1);
  443. if (ret < 0)
  444. goto out_err;
  445. tpm_stat = st33zp24_spi_status(dev);
  446. if ((tpm_stat & TPM_STS_DATA_EXPECT) != 0) {
  447. ret = -EIO;
  448. goto out_err;
  449. }
  450. data = TPM_STS_GO;
  451. ret = st33zp24_spi_write(dev, TPM_STS, &data, 1);
  452. if (ret < 0)
  453. goto out_err;
  454. return len;
  455. out_err:
  456. st33zp24_spi_cancel(dev);
  457. st33zp24_spi_release_locality(dev);
  458. return ret;
  459. }
  460. static int st33zp24_spi_cleanup(struct udevice *dev)
  461. {
  462. st33zp24_spi_cancel(dev);
  463. /*
  464. * The TPM needs some time to clean up here,
  465. * so we sleep rather than keeping the bus busy
  466. */
  467. mdelay(2);
  468. st33zp24_spi_release_locality(dev);
  469. return 0;
  470. }
  471. static int st33zp24_spi_init(struct udevice *dev)
  472. {
  473. struct tpm_chip *chip = dev_get_priv(dev);
  474. struct st33zp24_spi_phy *phy = dev_get_platdata(dev);
  475. chip->is_open = 1;
  476. /* Default timeouts - these could move to the device tree */
  477. chip->timeout_a = TIS_SHORT_TIMEOUT_MS;
  478. chip->timeout_b = TIS_LONG_TIMEOUT_MS;
  479. chip->timeout_c = TIS_SHORT_TIMEOUT_MS;
  480. chip->timeout_d = TIS_SHORT_TIMEOUT_MS;
  481. chip->locality = LOCALITY0;
  482. phy->latency = st33zp24_spi_evaluate_latency(dev);
  483. if (phy->latency <= 0)
  484. return -ENODEV;
  485. /*
  486. * A timeout query to TPM can be placed here.
  487. * Standard timeout values are used so far
  488. */
  489. return 0;
  490. }
  491. static int st33zp24_spi_open(struct udevice *dev)
  492. {
  493. struct tpm_chip *chip = dev_get_priv(dev);
  494. int rc;
  495. debug("%s: start\n", __func__);
  496. if (chip->is_open)
  497. return -EBUSY;
  498. rc = st33zp24_spi_init(dev);
  499. if (rc < 0)
  500. chip->is_open = 0;
  501. return rc;
  502. }
  503. static int st33zp24_spi_close(struct udevice *dev)
  504. {
  505. struct tpm_chip *chip = dev_get_priv(dev);
  506. if (chip->is_open) {
  507. st33zp24_spi_release_locality(dev);
  508. chip->is_open = 0;
  509. chip->vend_dev = 0;
  510. }
  511. return 0;
  512. }
  513. static int st33zp24_spi_get_desc(struct udevice *dev, char *buf, int size)
  514. {
  515. struct tpm_chip *chip = dev_get_priv(dev);
  516. if (size < 50)
  517. return -ENOSPC;
  518. return snprintf(buf, size, "1.2 TPM (%s, chip type %s device-id 0x%x)",
  519. chip->is_open ? "open" : "closed",
  520. dev->name,
  521. chip->vend_dev >> 16);
  522. }
  523. const struct tpm_ops st33zp24_spi_tpm_ops = {
  524. .open = st33zp24_spi_open,
  525. .close = st33zp24_spi_close,
  526. .recv = st33zp24_spi_recv,
  527. .send = st33zp24_spi_send,
  528. .cleanup = st33zp24_spi_cleanup,
  529. .get_desc = st33zp24_spi_get_desc,
  530. };
  531. static int st33zp24_spi_probe(struct udevice *dev)
  532. {
  533. struct tpm_chip_priv *uc_priv = dev_get_uclass_priv(dev);
  534. uc_priv->duration_ms[TPM_SHORT] = TIS_SHORT_TIMEOUT_MS;
  535. uc_priv->duration_ms[TPM_MEDIUM] = TIS_LONG_TIMEOUT_MS;
  536. uc_priv->duration_ms[TPM_LONG] = TIS_LONG_TIMEOUT_MS;
  537. uc_priv->retry_time_ms = TPM_TIMEOUT_MS;
  538. debug("ST33ZP24 SPI TPM from STMicroelectronics found\n");
  539. return 0;
  540. }
  541. static int st33zp24_spi_remove(struct udevice *dev)
  542. {
  543. st33zp24_spi_release_locality(dev);
  544. return 0;
  545. }
  546. static const struct udevice_id st33zp24_spi_ids[] = {
  547. { .compatible = "st,st33zp24-spi" },
  548. { }
  549. };
  550. U_BOOT_DRIVER(st33zp24_spi_spi) = {
  551. .name = "st33zp24-spi",
  552. .id = UCLASS_TPM,
  553. .of_match = of_match_ptr(st33zp24_spi_ids),
  554. .probe = st33zp24_spi_probe,
  555. .remove = st33zp24_spi_remove,
  556. .ops = &st33zp24_spi_tpm_ops,
  557. .priv_auto_alloc_size = sizeof(struct tpm_chip),
  558. .platdata_auto_alloc_size = sizeof(struct st33zp24_spi_phy),
  559. };