serial_sti_asc.c 4.7 KB

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  1. /*
  2. * Support for Serial I/O using STMicroelectronics' on-chip ASC.
  3. *
  4. * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
  5. * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. #include <common.h>
  10. #include <dm.h>
  11. #include <serial.h>
  12. #include <asm/io.h>
  13. DECLARE_GLOBAL_DATA_PTR;
  14. #define BAUDMODE 0x00001000
  15. #define RXENABLE 0x00000100
  16. #define RUN 0x00000080
  17. #define MODE 0x00000001
  18. #define MODE_8BIT 0x0001
  19. #define STOP_1BIT 0x0008
  20. #define PARITYODD 0x0020
  21. #define STA_TF BIT(9)
  22. #define STA_RBF BIT(0)
  23. struct sti_asc_uart {
  24. u32 baudrate;
  25. u32 txbuf;
  26. u32 rxbuf;
  27. u32 control;
  28. u32 inten;
  29. u32 status;
  30. u32 guardtime;
  31. u32 timeout;
  32. u32 txreset;
  33. u32 rxreset;
  34. };
  35. struct sti_asc_serial {
  36. /* address of registers in physical memory */
  37. struct sti_asc_uart *regs;
  38. };
  39. /* Values for the BAUDRATE Register */
  40. #define PCLK (200ul * 1000000ul)
  41. #define BAUDRATE_VAL_M0(bps) (PCLK / (16 * (bps)))
  42. #define BAUDRATE_VAL_M1(bps) ((bps * (1 << 14)) + (1<<13)) / (PCLK/(1 << 6))
  43. /*
  44. * MODE 0
  45. * ICCLK
  46. * ASCBaudRate = ----------------
  47. * baudrate * 16
  48. *
  49. * MODE 1
  50. * baudrate * 16 * 2^16
  51. * ASCBaudRate = ------------------------
  52. * ICCLK
  53. *
  54. * NOTE:
  55. * Mode 1 should be used for baudrates of 19200, and above, as it
  56. * has a lower deviation error than Mode 0 for higher frequencies.
  57. * Mode 0 should be used for all baudrates below 19200.
  58. */
  59. static int sti_asc_pending(struct udevice *dev, bool input)
  60. {
  61. struct sti_asc_serial *priv = dev_get_priv(dev);
  62. struct sti_asc_uart *const uart = priv->regs;
  63. unsigned long status;
  64. status = readl(&uart->status);
  65. if (input)
  66. return status & STA_RBF;
  67. else
  68. return status & STA_TF;
  69. }
  70. static int _sti_asc_serial_setbrg(struct sti_asc_uart *uart, int baudrate)
  71. {
  72. unsigned long val;
  73. int t, mode = 1;
  74. switch (baudrate) {
  75. case 9600:
  76. t = BAUDRATE_VAL_M0(9600);
  77. mode = 0;
  78. break;
  79. case 19200:
  80. t = BAUDRATE_VAL_M1(19200);
  81. break;
  82. case 38400:
  83. t = BAUDRATE_VAL_M1(38400);
  84. break;
  85. case 57600:
  86. t = BAUDRATE_VAL_M1(57600);
  87. break;
  88. default:
  89. debug("ASC: unsupported baud rate: %d, using 115200 instead.\n",
  90. baudrate);
  91. case 115200:
  92. t = BAUDRATE_VAL_M1(115200);
  93. break;
  94. }
  95. /* disable the baudrate generator */
  96. val = readl(&uart->control);
  97. writel(val & ~RUN, &uart->control);
  98. /* set baud generator reload value */
  99. writel(t, &uart->baudrate);
  100. /* reset the RX & TX buffers */
  101. writel(1, &uart->txreset);
  102. writel(1, &uart->rxreset);
  103. /* set baud generator mode */
  104. if (mode)
  105. val |= BAUDMODE;
  106. /* finally, write value and enable ASC */
  107. writel(val, &uart->control);
  108. return 0;
  109. }
  110. /* called to adjust baud-rate */
  111. static int sti_asc_serial_setbrg(struct udevice *dev, int baudrate)
  112. {
  113. struct sti_asc_serial *priv = dev_get_priv(dev);
  114. struct sti_asc_uart *const uart = priv->regs;
  115. return _sti_asc_serial_setbrg(uart, baudrate);
  116. }
  117. /* blocking function, that returns next char */
  118. static int sti_asc_serial_getc(struct udevice *dev)
  119. {
  120. struct sti_asc_serial *priv = dev_get_priv(dev);
  121. struct sti_asc_uart *const uart = priv->regs;
  122. /* polling wait: for a char to be read */
  123. if (!sti_asc_pending(dev, true))
  124. return -EAGAIN;
  125. return readl(&uart->rxbuf);
  126. }
  127. /* write write out a single char */
  128. static int sti_asc_serial_putc(struct udevice *dev, const char c)
  129. {
  130. struct sti_asc_serial *priv = dev_get_priv(dev);
  131. struct sti_asc_uart *const uart = priv->regs;
  132. /* wait till safe to write next char */
  133. if (sti_asc_pending(dev, false))
  134. return -EAGAIN;
  135. /* finally, write next char */
  136. writel(c, &uart->txbuf);
  137. return 0;
  138. }
  139. /* initialize the ASC */
  140. static int sti_asc_serial_probe(struct udevice *dev)
  141. {
  142. struct sti_asc_serial *priv = dev_get_priv(dev);
  143. unsigned long val;
  144. fdt_addr_t base;
  145. base = devfdt_get_addr(dev);
  146. if (base == FDT_ADDR_T_NONE)
  147. return -EINVAL;
  148. priv->regs = (struct sti_asc_uart *)base;
  149. sti_asc_serial_setbrg(dev, gd->baudrate);
  150. /*
  151. * build up the value to be written to CONTROL
  152. * set character length, bit stop number, odd parity
  153. */
  154. val = RXENABLE | RUN | MODE_8BIT | STOP_1BIT | PARITYODD;
  155. writel(val, &priv->regs->control);
  156. return 0;
  157. }
  158. static const struct dm_serial_ops sti_asc_serial_ops = {
  159. .putc = sti_asc_serial_putc,
  160. .pending = sti_asc_pending,
  161. .getc = sti_asc_serial_getc,
  162. .setbrg = sti_asc_serial_setbrg,
  163. };
  164. static const struct udevice_id sti_serial_of_match[] = {
  165. { .compatible = "st,asc" },
  166. { }
  167. };
  168. U_BOOT_DRIVER(serial_sti_asc) = {
  169. .name = "serial_sti_asc",
  170. .id = UCLASS_SERIAL,
  171. .of_match = sti_serial_of_match,
  172. .ops = &sti_asc_serial_ops,
  173. .probe = sti_asc_serial_probe,
  174. .priv_auto_alloc_size = sizeof(struct sti_asc_serial),
  175. .flags = DM_FLAG_PRE_RELOC,
  176. };