s2mps11_regulator.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597
  1. /*
  2. * Copyright (C) 2018 Samsung Electronics
  3. * Jaehoon Chung <jh80.chung@samsung.com>
  4. *
  5. * SPDX-License-Identifier: GPL-2.0
  6. */
  7. #include <common.h>
  8. #include <fdtdec.h>
  9. #include <errno.h>
  10. #include <dm.h>
  11. #include <i2c.h>
  12. #include <power/pmic.h>
  13. #include <power/regulator.h>
  14. #include <power/s2mps11.h>
  15. DECLARE_GLOBAL_DATA_PTR;
  16. #define MODE(_id, _val, _name) { \
  17. .id = _id, \
  18. .register_value = _val, \
  19. .name = _name, \
  20. }
  21. /* BUCK : 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 */
  22. static struct dm_regulator_mode s2mps11_buck_modes[] = {
  23. MODE(OP_OFF, S2MPS11_BUCK_MODE_OFF, "OFF"),
  24. MODE(OP_STANDBY, S2MPS11_BUCK_MODE_STANDBY, "ON/OFF"),
  25. MODE(OP_ON, S2MPS11_BUCK_MODE_STANDBY, "ON"),
  26. };
  27. static struct dm_regulator_mode s2mps11_ldo_modes[] = {
  28. MODE(OP_OFF, S2MPS11_LDO_MODE_OFF, "OFF"),
  29. MODE(OP_STANDBY, S2MPS11_LDO_MODE_STANDBY, "ON/OFF"),
  30. MODE(OP_STANDBY_LPM, S2MPS11_LDO_MODE_STANDBY_LPM, "ON/LPM"),
  31. MODE(OP_ON, S2MPS11_LDO_MODE_ON, "ON"),
  32. };
  33. static const char s2mps11_buck_ctrl[] = {
  34. 0xff, 0x25, 0x27, 0x29, 0x2b, 0x2d, 0x33, 0x35, 0x37, 0x39, 0x3b
  35. };
  36. static const char s2mps11_buck_out[] = {
  37. 0xff, 0x26, 0x28, 0x2a, 0x2c, 0x2f, 0x34, 0x36, 0x38, 0x3a, 0x3c
  38. };
  39. static int s2mps11_buck_hex2volt(int buck, int hex)
  40. {
  41. unsigned int uV = 0;
  42. if (hex < 0)
  43. goto bad;
  44. switch (buck) {
  45. case 7:
  46. case 8:
  47. case 10:
  48. if (hex > S2MPS11_BUCK7_8_10_VOLT_MAX_HEX)
  49. goto bad;
  50. uV = hex * S2MPS11_BUCK_HSTEP + S2MPS11_BUCK_UV_HMIN;
  51. break;
  52. case 9:
  53. if (hex > S2MPS11_BUCK9_VOLT_MAX_HEX)
  54. goto bad;
  55. uV = hex * S2MPS11_BUCK9_STEP * 2 + S2MPS11_BUCK9_UV_MIN;
  56. break;
  57. default:
  58. if (buck == 5 && hex > S2MPS11_BUCK5_VOLT_MAX_HEX)
  59. goto bad;
  60. else if (buck != 5 && hex > S2MPS11_BUCK_VOLT_MAX_HEX)
  61. goto bad;
  62. uV = hex * S2MPS11_BUCK_LSTEP + S2MPS11_BUCK_UV_MIN;
  63. break;
  64. }
  65. return uV;
  66. bad:
  67. pr_err("Value: %#x is wrong for BUCK%d", hex, buck);
  68. return -EINVAL;
  69. }
  70. static int s2mps11_buck_volt2hex(int buck, int uV)
  71. {
  72. int hex;
  73. switch (buck) {
  74. case 7:
  75. case 8:
  76. case 10:
  77. hex = (uV - S2MPS11_BUCK_UV_HMIN) / S2MPS11_BUCK_HSTEP;
  78. if (hex > S2MPS11_BUCK7_8_10_VOLT_MAX_HEX)
  79. goto bad;
  80. break;
  81. case 9:
  82. hex = (uV - S2MPS11_BUCK9_UV_MIN) / S2MPS11_BUCK9_STEP;
  83. if (hex > S2MPS11_BUCK9_VOLT_MAX_HEX)
  84. goto bad;
  85. break;
  86. default:
  87. hex = (uV - S2MPS11_BUCK_UV_MIN) / S2MPS11_BUCK_LSTEP;
  88. if (buck == 5 && hex > S2MPS11_BUCK5_VOLT_MAX_HEX)
  89. goto bad;
  90. else if (buck != 5 && hex > S2MPS11_BUCK_VOLT_MAX_HEX)
  91. goto bad;
  92. break;
  93. };
  94. if (hex >= 0)
  95. return hex;
  96. bad:
  97. pr_err("Value: %d uV is wrong for BUCK%d", uV, buck);
  98. return -EINVAL;
  99. }
  100. static int s2mps11_buck_val(struct udevice *dev, int op, int *uV)
  101. {
  102. int hex, buck, ret;
  103. u32 mask, addr;
  104. u8 val;
  105. buck = dev->driver_data;
  106. if (buck < 1 || buck > S2MPS11_BUCK_NUM) {
  107. pr_err("Wrong buck number: %d\n", buck);
  108. return -EINVAL;
  109. }
  110. if (op == PMIC_OP_GET)
  111. *uV = 0;
  112. addr = s2mps11_buck_out[buck];
  113. switch (buck) {
  114. case 9:
  115. mask = S2MPS11_BUCK9_VOLT_MASK;
  116. break;
  117. default:
  118. mask = S2MPS11_BUCK_VOLT_MASK;
  119. break;
  120. }
  121. ret = pmic_read(dev->parent, addr, &val, 1);
  122. if (ret)
  123. return ret;
  124. if (op == PMIC_OP_GET) {
  125. val &= mask;
  126. ret = s2mps11_buck_hex2volt(buck, val);
  127. if (ret < 0)
  128. return ret;
  129. *uV = ret;
  130. return 0;
  131. }
  132. hex = s2mps11_buck_volt2hex(buck, *uV);
  133. if (hex < 0)
  134. return hex;
  135. val &= ~mask;
  136. val |= hex;
  137. ret = pmic_write(dev->parent, addr, &val, 1);
  138. return ret;
  139. }
  140. static int s2mps11_buck_mode(struct udevice *dev, int op, int *opmode)
  141. {
  142. unsigned int addr, mode;
  143. unsigned char val;
  144. int buck, ret;
  145. buck = dev->driver_data;
  146. if (buck < 1 || buck > S2MPS11_BUCK_NUM) {
  147. pr_err("Wrong buck number: %d\n", buck);
  148. return -EINVAL;
  149. }
  150. addr = s2mps11_buck_ctrl[buck];
  151. ret = pmic_read(dev->parent, addr, &val, 1);
  152. if (ret)
  153. return ret;
  154. if (op == PMIC_OP_GET) {
  155. val &= (S2MPS11_BUCK_MODE_MASK << S2MPS11_BUCK_MODE_SHIFT);
  156. switch (val) {
  157. case S2MPS11_BUCK_MODE_OFF:
  158. *opmode = OP_OFF;
  159. break;
  160. case S2MPS11_BUCK_MODE_STANDBY:
  161. *opmode = OP_STANDBY;
  162. break;
  163. case S2MPS11_BUCK_MODE_ON:
  164. *opmode = OP_ON;
  165. break;
  166. default:
  167. return -EINVAL;
  168. }
  169. return 0;
  170. }
  171. switch (*opmode) {
  172. case OP_OFF:
  173. mode = S2MPS11_BUCK_MODE_OFF;
  174. break;
  175. case OP_STANDBY:
  176. mode = S2MPS11_BUCK_MODE_STANDBY;
  177. break;
  178. case OP_ON:
  179. mode = S2MPS11_BUCK_MODE_ON;
  180. break;
  181. default:
  182. pr_err("Wrong mode: %d for buck: %d\n", *opmode, buck);
  183. return -EINVAL;
  184. }
  185. val &= ~(S2MPS11_BUCK_MODE_MASK << S2MPS11_BUCK_MODE_SHIFT);
  186. val |= mode;
  187. ret = pmic_write(dev->parent, addr, &val, 1);
  188. return ret;
  189. }
  190. static int s2mps11_buck_enable(struct udevice *dev, int op, bool *enable)
  191. {
  192. int ret, on_off;
  193. if (op == PMIC_OP_GET) {
  194. ret = s2mps11_buck_mode(dev, op, &on_off);
  195. if (ret)
  196. return ret;
  197. switch (on_off) {
  198. case OP_OFF:
  199. *enable = false;
  200. break;
  201. case OP_ON:
  202. *enable = true;
  203. break;
  204. default:
  205. return -EINVAL;
  206. }
  207. } else if (op == PMIC_OP_SET) {
  208. if (*enable)
  209. on_off = OP_ON;
  210. else
  211. on_off = OP_OFF;
  212. ret = s2mps11_buck_mode(dev, op, &on_off);
  213. if (ret)
  214. return ret;
  215. }
  216. return 0;
  217. }
  218. static int buck_get_value(struct udevice *dev)
  219. {
  220. int uV;
  221. int ret;
  222. ret = s2mps11_buck_val(dev, PMIC_OP_GET, &uV);
  223. if (ret)
  224. return ret;
  225. return uV;
  226. }
  227. static int buck_set_value(struct udevice *dev, int uV)
  228. {
  229. return s2mps11_buck_val(dev, PMIC_OP_SET, &uV);
  230. }
  231. static int buck_get_enable(struct udevice *dev)
  232. {
  233. bool enable = false;
  234. int ret;
  235. ret = s2mps11_buck_enable(dev, PMIC_OP_GET, &enable);
  236. if (ret)
  237. return ret;
  238. return enable;
  239. }
  240. static int buck_set_enable(struct udevice *dev, bool enable)
  241. {
  242. return s2mps11_buck_enable(dev, PMIC_OP_SET, &enable);
  243. }
  244. static int buck_get_mode(struct udevice *dev)
  245. {
  246. int mode;
  247. int ret;
  248. ret = s2mps11_buck_mode(dev, PMIC_OP_GET, &mode);
  249. if (ret)
  250. return ret;
  251. return mode;
  252. }
  253. static int buck_set_mode(struct udevice *dev, int mode)
  254. {
  255. return s2mps11_buck_mode(dev, PMIC_OP_SET, &mode);
  256. }
  257. static int s2mps11_buck_probe(struct udevice *dev)
  258. {
  259. struct dm_regulator_uclass_platdata *uc_pdata;
  260. uc_pdata = dev_get_uclass_platdata(dev);
  261. uc_pdata->type = REGULATOR_TYPE_BUCK;
  262. uc_pdata->mode = s2mps11_buck_modes;
  263. uc_pdata->mode_count = ARRAY_SIZE(s2mps11_buck_modes);
  264. return 0;
  265. }
  266. static const struct dm_regulator_ops s2mps11_buck_ops = {
  267. .get_value = buck_get_value,
  268. .set_value = buck_set_value,
  269. .get_enable = buck_get_enable,
  270. .set_enable = buck_set_enable,
  271. .get_mode = buck_get_mode,
  272. .set_mode = buck_set_mode,
  273. };
  274. U_BOOT_DRIVER(s2mps11_buck) = {
  275. .name = S2MPS11_BUCK_DRIVER,
  276. .id = UCLASS_REGULATOR,
  277. .ops = &s2mps11_buck_ops,
  278. .probe = s2mps11_buck_probe,
  279. };
  280. static int s2mps11_ldo_hex2volt(int ldo, int hex)
  281. {
  282. unsigned int uV = 0;
  283. if (hex > S2MPS11_LDO_VOLT_MAX_HEX) {
  284. pr_err("Value: %#x is wrong for LDO%d", hex, ldo);
  285. return -EINVAL;
  286. }
  287. switch (ldo) {
  288. case 1:
  289. case 6:
  290. case 11:
  291. case 22:
  292. case 23:
  293. uV = hex * S2MPS11_LDO_STEP + S2MPS11_LDO_UV_MIN;
  294. break;
  295. default:
  296. uV = hex * S2MPS11_LDO_STEP * 2 + S2MPS11_LDO_UV_MIN;
  297. break;
  298. }
  299. return uV;
  300. }
  301. static int s2mps11_ldo_volt2hex(int ldo, int uV)
  302. {
  303. int hex = 0;
  304. switch (ldo) {
  305. case 1:
  306. case 6:
  307. case 11:
  308. case 22:
  309. case 23:
  310. hex = (uV - S2MPS11_LDO_UV_MIN) / S2MPS11_LDO_STEP;
  311. break;
  312. default:
  313. hex = (uV - S2MPS11_LDO_UV_MIN) / (S2MPS11_LDO_STEP * 2);
  314. break;
  315. }
  316. if (hex >= 0 && hex <= S2MPS11_LDO_VOLT_MAX_HEX)
  317. return hex;
  318. pr_err("Value: %d uV is wrong for LDO%d", uV, ldo);
  319. return -EINVAL;
  320. return 0;
  321. }
  322. static int s2mps11_ldo_val(struct udevice *dev, int op, int *uV)
  323. {
  324. unsigned int addr;
  325. unsigned char val;
  326. int hex, ldo, ret;
  327. ldo = dev->driver_data;
  328. if (ldo < 1 || ldo > S2MPS11_LDO_NUM) {
  329. pr_err("Wrong ldo number: %d\n", ldo);
  330. return -EINVAL;
  331. }
  332. addr = S2MPS11_REG_L1CTRL + ldo - 1;
  333. ret = pmic_read(dev->parent, addr, &val, 1);
  334. if (ret)
  335. return ret;
  336. if (op == PMIC_OP_GET) {
  337. *uV = 0;
  338. val &= S2MPS11_LDO_VOLT_MASK;
  339. ret = s2mps11_ldo_hex2volt(ldo, val);
  340. if (ret < 0)
  341. return ret;
  342. *uV = ret;
  343. return 0;
  344. }
  345. hex = s2mps11_ldo_volt2hex(ldo, *uV);
  346. if (hex < 0)
  347. return hex;
  348. val &= ~S2MPS11_LDO_VOLT_MASK;
  349. val |= hex;
  350. ret = pmic_write(dev->parent, addr, &val, 1);
  351. return ret;
  352. }
  353. static int s2mps11_ldo_mode(struct udevice *dev, int op, int *opmode)
  354. {
  355. unsigned int addr, mode;
  356. unsigned char val;
  357. int ldo, ret;
  358. ldo = dev->driver_data;
  359. if (ldo < 1 || ldo > S2MPS11_LDO_NUM) {
  360. pr_err("Wrong ldo number: %d\n", ldo);
  361. return -EINVAL;
  362. }
  363. addr = S2MPS11_REG_L1CTRL + ldo - 1;
  364. ret = pmic_read(dev->parent, addr, &val, 1);
  365. if (ret)
  366. return ret;
  367. if (op == PMIC_OP_GET) {
  368. val &= (S2MPS11_LDO_MODE_MASK << S2MPS11_LDO_MODE_SHIFT);
  369. switch (val) {
  370. case S2MPS11_LDO_MODE_OFF:
  371. *opmode = OP_OFF;
  372. break;
  373. case S2MPS11_LDO_MODE_STANDBY:
  374. *opmode = OP_STANDBY;
  375. break;
  376. case S2MPS11_LDO_MODE_STANDBY_LPM:
  377. *opmode = OP_STANDBY_LPM;
  378. break;
  379. case S2MPS11_LDO_MODE_ON:
  380. *opmode = OP_ON;
  381. break;
  382. default:
  383. return -EINVAL;
  384. }
  385. return 0;
  386. }
  387. switch (*opmode) {
  388. case OP_OFF:
  389. mode = S2MPS11_LDO_MODE_OFF;
  390. break;
  391. case OP_STANDBY:
  392. mode = S2MPS11_LDO_MODE_STANDBY;
  393. break;
  394. case OP_STANDBY_LPM:
  395. mode = S2MPS11_LDO_MODE_STANDBY_LPM;
  396. break;
  397. case OP_ON:
  398. mode = S2MPS11_LDO_MODE_ON;
  399. break;
  400. default:
  401. pr_err("Wrong mode: %d for ldo: %d\n", *opmode, ldo);
  402. return -EINVAL;
  403. }
  404. val &= ~(S2MPS11_LDO_MODE_MASK << S2MPS11_LDO_MODE_SHIFT);
  405. val |= mode;
  406. ret = pmic_write(dev->parent, addr, &val, 1);
  407. return ret;
  408. }
  409. static int s2mps11_ldo_enable(struct udevice *dev, int op, bool *enable)
  410. {
  411. int ret, on_off;
  412. if (op == PMIC_OP_GET) {
  413. ret = s2mps11_ldo_mode(dev, op, &on_off);
  414. if (ret)
  415. return ret;
  416. switch (on_off) {
  417. case OP_OFF:
  418. *enable = false;
  419. break;
  420. case OP_ON:
  421. *enable = true;
  422. break;
  423. default:
  424. return -EINVAL;
  425. }
  426. } else if (op == PMIC_OP_SET) {
  427. if (*enable)
  428. on_off = OP_ON;
  429. else
  430. on_off = OP_OFF;
  431. ret = s2mps11_ldo_mode(dev, op, &on_off);
  432. if (ret)
  433. return ret;
  434. }
  435. return 0;
  436. }
  437. static int ldo_get_value(struct udevice *dev)
  438. {
  439. int uV;
  440. int ret;
  441. ret = s2mps11_ldo_val(dev, PMIC_OP_GET, &uV);
  442. if (ret)
  443. return ret;
  444. return uV;
  445. }
  446. static int ldo_set_value(struct udevice *dev, int uV)
  447. {
  448. return s2mps11_ldo_val(dev, PMIC_OP_SET, &uV);
  449. }
  450. static int ldo_get_enable(struct udevice *dev)
  451. {
  452. bool enable = false;
  453. int ret;
  454. ret = s2mps11_ldo_enable(dev, PMIC_OP_GET, &enable);
  455. if (ret)
  456. return ret;
  457. return enable;
  458. }
  459. static int ldo_set_enable(struct udevice *dev, bool enable)
  460. {
  461. return s2mps11_ldo_enable(dev, PMIC_OP_SET, &enable);
  462. }
  463. static int ldo_get_mode(struct udevice *dev)
  464. {
  465. int mode, ret;
  466. ret = s2mps11_ldo_mode(dev, PMIC_OP_GET, &mode);
  467. if (ret)
  468. return ret;
  469. return mode;
  470. }
  471. static int ldo_set_mode(struct udevice *dev, int mode)
  472. {
  473. return s2mps11_ldo_mode(dev, PMIC_OP_SET, &mode);
  474. }
  475. static int s2mps11_ldo_probe(struct udevice *dev)
  476. {
  477. struct dm_regulator_uclass_platdata *uc_pdata;
  478. uc_pdata = dev_get_uclass_platdata(dev);
  479. uc_pdata->type = REGULATOR_TYPE_LDO;
  480. uc_pdata->mode = s2mps11_ldo_modes;
  481. uc_pdata->mode_count = ARRAY_SIZE(s2mps11_ldo_modes);
  482. return 0;
  483. }
  484. static const struct dm_regulator_ops s2mps11_ldo_ops = {
  485. .get_value = ldo_get_value,
  486. .set_value = ldo_set_value,
  487. .get_enable = ldo_get_enable,
  488. .set_enable = ldo_set_enable,
  489. .get_mode = ldo_get_mode,
  490. .set_mode = ldo_set_mode,
  491. };
  492. U_BOOT_DRIVER(s2mps11_ldo) = {
  493. .name = S2MPS11_LDO_DRIVER,
  494. .id = UCLASS_REGULATOR,
  495. .ops = &s2mps11_ldo_ops,
  496. .probe = s2mps11_ldo_probe,
  497. };