besys.c 21 KB

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  1. /****************************************************************************
  2. *
  3. * BIOS emulator and interface
  4. * to Realmode X86 Emulator Library
  5. *
  6. * ========================================================================
  7. *
  8. * Copyright (C) 2007 Freescale Semiconductor, Inc.
  9. * Jason Jin<Jason.jin@freescale.com>
  10. *
  11. * Copyright (C) 1991-2004 SciTech Software, Inc. All rights reserved.
  12. *
  13. * This file may be distributed and/or modified under the terms of the
  14. * GNU General Public License version 2.0 as published by the Free
  15. * Software Foundation and appearing in the file LICENSE.GPL included
  16. * in the packaging of this file.
  17. *
  18. * Licensees holding a valid Commercial License for this product from
  19. * SciTech Software, Inc. may use this file in accordance with the
  20. * Commercial License Agreement provided with the Software.
  21. *
  22. * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
  23. * THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  24. * PURPOSE.
  25. *
  26. * See http://www.scitechsoft.com/license/ for information about
  27. * the licensing options available and how to purchase a Commercial
  28. * License Agreement.
  29. *
  30. * Contact license@scitechsoft.com if any conditions of this licensing
  31. * are not clear to you, or you have questions about licensing options.
  32. *
  33. * ========================================================================
  34. *
  35. * Language: ANSI C
  36. * Environment: Any
  37. * Developer: Kendall Bennett
  38. *
  39. * Description: This file includes BIOS emulator I/O and memory access
  40. * functions.
  41. *
  42. * Jason ported this file to u-boot to run the ATI video card
  43. * BIOS in u-boot. Removed some emulate functions such as the
  44. * timer port access. Made all the VGA port except reading 0x3c3
  45. * be emulated. Seems like reading 0x3c3 should return the high
  46. * 16 bit of the io port.
  47. *
  48. ****************************************************************************/
  49. #define __io
  50. #include <asm/io.h>
  51. #include <common.h>
  52. #include "biosemui.h"
  53. /*------------------------- Global Variables ------------------------------*/
  54. #ifndef __i386__
  55. static char *BE_biosDate = "08/14/99";
  56. static u8 BE_model = 0xFC;
  57. static u8 BE_submodel = 0x00;
  58. #endif
  59. /*----------------------------- Implementation ----------------------------*/
  60. /****************************************************************************
  61. PARAMETERS:
  62. addr - Emulator memory address to convert
  63. RETURNS:
  64. Actual memory address to read or write the data
  65. REMARKS:
  66. This function converts an emulator memory address in a 32-bit range to
  67. a real memory address that we wish to access. It handles splitting up the
  68. memory address space appropriately to access the emulator BIOS image, video
  69. memory and system BIOS etc.
  70. ****************************************************************************/
  71. static u8 *BE_memaddr(u32 addr)
  72. {
  73. if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
  74. return (u8*)(_BE_env.biosmem_base + addr - 0xC0000);
  75. } else if (addr > _BE_env.biosmem_limit && addr < 0xD0000) {
  76. DB(printf("BE_memaddr: address %#lx may be invalid!\n", addr);)
  77. return M.mem_base;
  78. } else if (addr >= 0xA0000 && addr <= 0xBFFFF) {
  79. return (u8*)(_BE_env.busmem_base + addr - 0xA0000);
  80. }
  81. #ifdef __i386__
  82. else if (addr >= 0xD0000 && addr <= 0xFFFFF) {
  83. /* We map the real System BIOS directly on real PC's */
  84. DB(printf("BE_memaddr: System BIOS address %#lx\n", addr);)
  85. return _BE_env.busmem_base + addr - 0xA0000;
  86. }
  87. #else
  88. else if (addr >= 0xFFFF5 && addr < 0xFFFFE) {
  89. /* Return a faked BIOS date string for non-x86 machines */
  90. DB(printf("BE_memaddr - Returning BIOS date\n");)
  91. return (u8 *)(BE_biosDate + addr - 0xFFFF5);
  92. } else if (addr == 0xFFFFE) {
  93. /* Return system model identifier for non-x86 machines */
  94. DB(printf("BE_memaddr - Returning model\n");)
  95. return &BE_model;
  96. } else if (addr == 0xFFFFF) {
  97. /* Return system submodel identifier for non-x86 machines */
  98. DB(printf("BE_memaddr - Returning submodel\n");)
  99. return &BE_submodel;
  100. }
  101. #endif
  102. else if (addr > M.mem_size - 1) {
  103. HALT_SYS();
  104. return M.mem_base;
  105. }
  106. return M.mem_base + addr;
  107. }
  108. /****************************************************************************
  109. PARAMETERS:
  110. addr - Emulator memory address to read
  111. RETURNS:
  112. Byte value read from emulator memory.
  113. REMARKS:
  114. Reads a byte value from the emulator memory. We have three distinct memory
  115. regions that are handled differently, which this function handles.
  116. ****************************************************************************/
  117. u8 X86API BE_rdb(u32 addr)
  118. {
  119. if (_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)
  120. return 0;
  121. else {
  122. u8 val = readb_le(BE_memaddr(addr));
  123. return val;
  124. }
  125. }
  126. /****************************************************************************
  127. PARAMETERS:
  128. addr - Emulator memory address to read
  129. RETURNS:
  130. Word value read from emulator memory.
  131. REMARKS:
  132. Reads a word value from the emulator memory. We have three distinct memory
  133. regions that are handled differently, which this function handles.
  134. ****************************************************************************/
  135. u16 X86API BE_rdw(u32 addr)
  136. {
  137. if (_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)
  138. return 0;
  139. else {
  140. u8 *base = BE_memaddr(addr);
  141. u16 val = readw_le(base);
  142. return val;
  143. }
  144. }
  145. /****************************************************************************
  146. PARAMETERS:
  147. addr - Emulator memory address to read
  148. RETURNS:
  149. Long value read from emulator memory.
  150. REMARKS:
  151. Reads a 32-bit value from the emulator memory. We have three distinct memory
  152. regions that are handled differently, which this function handles.
  153. ****************************************************************************/
  154. u32 X86API BE_rdl(u32 addr)
  155. {
  156. if (_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)
  157. return 0;
  158. else {
  159. u8 *base = BE_memaddr(addr);
  160. u32 val = readl_le(base);
  161. return val;
  162. }
  163. }
  164. /****************************************************************************
  165. PARAMETERS:
  166. addr - Emulator memory address to read
  167. val - Value to store
  168. REMARKS:
  169. Writes a byte value to emulator memory. We have three distinct memory
  170. regions that are handled differently, which this function handles.
  171. ****************************************************************************/
  172. void X86API BE_wrb(u32 addr, u8 val)
  173. {
  174. if (!(_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)) {
  175. writeb_le(BE_memaddr(addr), val);
  176. }
  177. }
  178. /****************************************************************************
  179. PARAMETERS:
  180. addr - Emulator memory address to read
  181. val - Value to store
  182. REMARKS:
  183. Writes a word value to emulator memory. We have three distinct memory
  184. regions that are handled differently, which this function handles.
  185. ****************************************************************************/
  186. void X86API BE_wrw(u32 addr, u16 val)
  187. {
  188. if (!(_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)) {
  189. u8 *base = BE_memaddr(addr);
  190. writew_le(base, val);
  191. }
  192. }
  193. /****************************************************************************
  194. PARAMETERS:
  195. addr - Emulator memory address to read
  196. val - Value to store
  197. REMARKS:
  198. Writes a 32-bit value to emulator memory. We have three distinct memory
  199. regions that are handled differently, which this function handles.
  200. ****************************************************************************/
  201. void X86API BE_wrl(u32 addr, u32 val)
  202. {
  203. if (!(_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)) {
  204. u8 *base = BE_memaddr(addr);
  205. writel_le(base, val);
  206. }
  207. }
  208. #if defined(DEBUG) || !defined(__i386__)
  209. /* For Non-Intel machines we may need to emulate some I/O port accesses that
  210. * the BIOS may try to access, such as the PCI config registers.
  211. */
  212. #define IS_TIMER_PORT(port) (0x40 <= port && port <= 0x43)
  213. #define IS_CMOS_PORT(port) (0x70 <= port && port <= 0x71)
  214. /*#define IS_VGA_PORT(port) (_BE_env.emulateVGA && 0x3C0 <= port && port <= 0x3DA)*/
  215. #define IS_VGA_PORT(port) (0x3C0 <= port && port <= 0x3DA)
  216. #define IS_PCI_PORT(port) (0xCF8 <= port && port <= 0xCFF)
  217. #define IS_SPKR_PORT(port) (port == 0x61)
  218. /****************************************************************************
  219. PARAMETERS:
  220. port - Port to read from
  221. type - Type of access to perform
  222. REMARKS:
  223. Performs an emulated read from the Standard VGA I/O ports. If the target
  224. hardware does not support mapping the VGA I/O and memory (such as some
  225. PowerPC systems), we emulate the VGA so that the BIOS will still be able to
  226. set NonVGA display modes such as on ATI hardware.
  227. ****************************************************************************/
  228. static u8 VGA_inpb (const int port)
  229. {
  230. u8 val = 0xff;
  231. switch (port) {
  232. case 0x3C0:
  233. /* 3C0 has funky characteristics because it can act as either
  234. a data register or index register depending on the state
  235. of an internal flip flop in the hardware. Hence we have
  236. to emulate that functionality in here. */
  237. if (_BE_env.flipFlop3C0 == 0) {
  238. /* Access 3C0 as index register */
  239. val = _BE_env.emu3C0;
  240. } else {
  241. /* Access 3C0 as data register */
  242. if (_BE_env.emu3C0 < ATT_C)
  243. val = _BE_env.emu3C1[_BE_env.emu3C0];
  244. }
  245. _BE_env.flipFlop3C0 ^= 1;
  246. break;
  247. case 0x3C1:
  248. if (_BE_env.emu3C0 < ATT_C)
  249. return _BE_env.emu3C1[_BE_env.emu3C0];
  250. break;
  251. case 0x3CC:
  252. return _BE_env.emu3C2;
  253. case 0x3C4:
  254. return _BE_env.emu3C4;
  255. case 0x3C5:
  256. if (_BE_env.emu3C4 < ATT_C)
  257. return _BE_env.emu3C5[_BE_env.emu3C4];
  258. break;
  259. case 0x3C6:
  260. return _BE_env.emu3C6;
  261. case 0x3C7:
  262. return _BE_env.emu3C7;
  263. case 0x3C8:
  264. return _BE_env.emu3C8;
  265. case 0x3C9:
  266. if (_BE_env.emu3C7 < PAL_C)
  267. return _BE_env.emu3C9[_BE_env.emu3C7++];
  268. break;
  269. case 0x3CE:
  270. return _BE_env.emu3CE;
  271. case 0x3CF:
  272. if (_BE_env.emu3CE < GRA_C)
  273. return _BE_env.emu3CF[_BE_env.emu3CE];
  274. break;
  275. case 0x3D4:
  276. if (_BE_env.emu3C2 & 0x1)
  277. return _BE_env.emu3D4;
  278. break;
  279. case 0x3D5:
  280. if ((_BE_env.emu3C2 & 0x1) && (_BE_env.emu3D4 < CRT_C))
  281. return _BE_env.emu3D5[_BE_env.emu3D4];
  282. break;
  283. case 0x3DA:
  284. _BE_env.flipFlop3C0 = 0;
  285. val = _BE_env.emu3DA;
  286. _BE_env.emu3DA ^= 0x9;
  287. break;
  288. }
  289. return val;
  290. }
  291. /****************************************************************************
  292. PARAMETERS:
  293. port - Port to write to
  294. type - Type of access to perform
  295. REMARKS:
  296. Performs an emulated write to one of the 8253 timer registers. For now
  297. we only emulate timer 0 which is the only timer that the BIOS code appears
  298. to use.
  299. ****************************************************************************/
  300. static void VGA_outpb (int port, u8 val)
  301. {
  302. switch (port) {
  303. case 0x3C0:
  304. /* 3C0 has funky characteristics because it can act as either
  305. a data register or index register depending on the state
  306. of an internal flip flop in the hardware. Hence we have
  307. to emulate that functionality in here. */
  308. if (_BE_env.flipFlop3C0 == 0) {
  309. /* Access 3C0 as index register */
  310. _BE_env.emu3C0 = val;
  311. } else {
  312. /* Access 3C0 as data register */
  313. if (_BE_env.emu3C0 < ATT_C)
  314. _BE_env.emu3C1[_BE_env.emu3C0] = val;
  315. }
  316. _BE_env.flipFlop3C0 ^= 1;
  317. break;
  318. case 0x3C2:
  319. _BE_env.emu3C2 = val;
  320. break;
  321. case 0x3C4:
  322. _BE_env.emu3C4 = val;
  323. break;
  324. case 0x3C5:
  325. if (_BE_env.emu3C4 < ATT_C)
  326. _BE_env.emu3C5[_BE_env.emu3C4] = val;
  327. break;
  328. case 0x3C6:
  329. _BE_env.emu3C6 = val;
  330. break;
  331. case 0x3C7:
  332. _BE_env.emu3C7 = (int) val *3;
  333. break;
  334. case 0x3C8:
  335. _BE_env.emu3C8 = (int) val *3;
  336. break;
  337. case 0x3C9:
  338. if (_BE_env.emu3C8 < PAL_C)
  339. _BE_env.emu3C9[_BE_env.emu3C8++] = val;
  340. break;
  341. case 0x3CE:
  342. _BE_env.emu3CE = val;
  343. break;
  344. case 0x3CF:
  345. if (_BE_env.emu3CE < GRA_C)
  346. _BE_env.emu3CF[_BE_env.emu3CE] = val;
  347. break;
  348. case 0x3D4:
  349. if (_BE_env.emu3C2 & 0x1)
  350. _BE_env.emu3D4 = val;
  351. break;
  352. case 0x3D5:
  353. if ((_BE_env.emu3C2 & 0x1) && (_BE_env.emu3D4 < CRT_C))
  354. _BE_env.emu3D5[_BE_env.emu3D4] = val;
  355. break;
  356. }
  357. }
  358. /****************************************************************************
  359. PARAMETERS:
  360. regOffset - Offset into register space for non-DWORD accesses
  361. value - Value to write to register for PCI_WRITE_* operations
  362. func - Function to perform (PCIAccessRegFlags)
  363. RETURNS:
  364. Value read from configuration register for PCI_READ_* operations
  365. REMARKS:
  366. Accesses a PCI configuration space register by decoding the value currently
  367. stored in the _BE_env.configAddress variable and passing it through to the
  368. portable PCI_accessReg function.
  369. ****************************************************************************/
  370. static u32 BE_accessReg(int regOffset, u32 value, int func)
  371. {
  372. #ifdef __KERNEL__
  373. int function, device, bus;
  374. u8 val8;
  375. u16 val16;
  376. u32 val32;
  377. /* Decode the configuration register values for the register we wish to
  378. * access
  379. */
  380. regOffset += (_BE_env.configAddress & 0xFF);
  381. function = (_BE_env.configAddress >> 8) & 0x7;
  382. device = (_BE_env.configAddress >> 11) & 0x1F;
  383. bus = (_BE_env.configAddress >> 16) & 0xFF;
  384. /* Ignore accesses to all devices other than the one we're POSTing */
  385. if ((function == _BE_env.vgaInfo.function) &&
  386. (device == _BE_env.vgaInfo.device) &&
  387. (bus == _BE_env.vgaInfo.bus)) {
  388. switch (func) {
  389. case REG_READ_BYTE:
  390. pci_read_config_byte(_BE_env.vgaInfo.pcidev, regOffset,
  391. &val8);
  392. return val8;
  393. case REG_READ_WORD:
  394. pci_read_config_word(_BE_env.vgaInfo.pcidev, regOffset,
  395. &val16);
  396. return val16;
  397. case REG_READ_DWORD:
  398. pci_read_config_dword(_BE_env.vgaInfo.pcidev, regOffset,
  399. &val32);
  400. return val32;
  401. case REG_WRITE_BYTE:
  402. pci_write_config_byte(_BE_env.vgaInfo.pcidev, regOffset,
  403. value);
  404. return 0;
  405. case REG_WRITE_WORD:
  406. pci_write_config_word(_BE_env.vgaInfo.pcidev, regOffset,
  407. value);
  408. return 0;
  409. case REG_WRITE_DWORD:
  410. pci_write_config_dword(_BE_env.vgaInfo.pcidev,
  411. regOffset, value);
  412. return 0;
  413. }
  414. }
  415. return 0;
  416. #else
  417. PCIDeviceInfo pciInfo;
  418. pciInfo.mech1 = 1;
  419. pciInfo.slot.i = 0;
  420. pciInfo.slot.p.Function = (_BE_env.configAddress >> 8) & 0x7;
  421. pciInfo.slot.p.Device = (_BE_env.configAddress >> 11) & 0x1F;
  422. pciInfo.slot.p.Bus = (_BE_env.configAddress >> 16) & 0xFF;
  423. pciInfo.slot.p.Enable = 1;
  424. /* Ignore accesses to all devices other than the one we're POSTing */
  425. if ((pciInfo.slot.p.Function ==
  426. _BE_env.vgaInfo.pciInfo->slot.p.Function)
  427. && (pciInfo.slot.p.Device == _BE_env.vgaInfo.pciInfo->slot.p.Device)
  428. && (pciInfo.slot.p.Bus == _BE_env.vgaInfo.pciInfo->slot.p.Bus))
  429. return PCI_accessReg((_BE_env.configAddress & 0xFF) + regOffset,
  430. value, func, &pciInfo);
  431. return 0;
  432. #endif
  433. }
  434. /****************************************************************************
  435. PARAMETERS:
  436. port - Port to read from
  437. type - Type of access to perform
  438. REMARKS:
  439. Performs an emulated read from one of the PCI configuration space registers.
  440. We emulate this using our PCI_accessReg function which will access the PCI
  441. configuration space registers in a portable fashion.
  442. ****************************************************************************/
  443. static u32 PCI_inp(int port, int type)
  444. {
  445. switch (type) {
  446. case REG_READ_BYTE:
  447. if ((_BE_env.configAddress & 0x80000000) && 0xCFC <= port
  448. && port <= 0xCFF)
  449. return BE_accessReg(port - 0xCFC, 0, REG_READ_BYTE);
  450. break;
  451. case REG_READ_WORD:
  452. if ((_BE_env.configAddress & 0x80000000) && 0xCFC <= port
  453. && port <= 0xCFF)
  454. return BE_accessReg(port - 0xCFC, 0, REG_READ_WORD);
  455. break;
  456. case REG_READ_DWORD:
  457. if (port == 0xCF8)
  458. return _BE_env.configAddress;
  459. else if ((_BE_env.configAddress & 0x80000000) && port == 0xCFC)
  460. return BE_accessReg(0, 0, REG_READ_DWORD);
  461. break;
  462. }
  463. return 0;
  464. }
  465. /****************************************************************************
  466. PARAMETERS:
  467. port - Port to write to
  468. type - Type of access to perform
  469. REMARKS:
  470. Performs an emulated write to one of the PCI control registers.
  471. ****************************************************************************/
  472. static void PCI_outp(int port, u32 val, int type)
  473. {
  474. switch (type) {
  475. case REG_WRITE_BYTE:
  476. if ((_BE_env.configAddress & 0x80000000) && 0xCFC <= port
  477. && port <= 0xCFF)
  478. BE_accessReg(port - 0xCFC, val, REG_WRITE_BYTE);
  479. break;
  480. case REG_WRITE_WORD:
  481. if ((_BE_env.configAddress & 0x80000000) && 0xCFC <= port
  482. && port <= 0xCFF)
  483. BE_accessReg(port - 0xCFC, val, REG_WRITE_WORD);
  484. break;
  485. case REG_WRITE_DWORD:
  486. if (port == 0xCF8)
  487. {
  488. _BE_env.configAddress = val & 0x80FFFFFC;
  489. }
  490. else if ((_BE_env.configAddress & 0x80000000) && port == 0xCFC)
  491. BE_accessReg(0, val, REG_WRITE_DWORD);
  492. break;
  493. }
  494. }
  495. #endif
  496. /****************************************************************************
  497. PARAMETERS:
  498. port - Port to write to
  499. RETURNS:
  500. Value read from the I/O port
  501. REMARKS:
  502. Performs an emulated 8-bit read from an I/O port. We handle special cases
  503. that we need to emulate in here, and fall through to reflecting the write
  504. through to the real hardware if we don't need to special case it.
  505. ****************************************************************************/
  506. u8 X86API BE_inb(X86EMU_pioAddr port)
  507. {
  508. u8 val = 0;
  509. #if defined(DEBUG) || !defined(__i386__)
  510. if (IS_VGA_PORT(port)){
  511. /*seems reading port 0x3c3 return the high 16 bit of io port*/
  512. if(port == 0x3c3)
  513. val = LOG_inpb(port);
  514. else
  515. val = VGA_inpb(port);
  516. }
  517. else if (IS_TIMER_PORT(port))
  518. DB(printf("Can not interept TIMER port now!\n");)
  519. else if (IS_SPKR_PORT(port))
  520. DB(printf("Can not interept SPEAKER port now!\n");)
  521. else if (IS_CMOS_PORT(port))
  522. DB(printf("Can not interept CMOS port now!\n");)
  523. else if (IS_PCI_PORT(port))
  524. val = PCI_inp(port, REG_READ_BYTE);
  525. else if (port < 0x100) {
  526. DB(printf("WARN: INVALID inb.%04X -> %02X\n", (u16) port, val);)
  527. val = LOG_inpb(port);
  528. } else
  529. #endif
  530. val = LOG_inpb(port);
  531. return val;
  532. }
  533. /****************************************************************************
  534. PARAMETERS:
  535. port - Port to write to
  536. RETURNS:
  537. Value read from the I/O port
  538. REMARKS:
  539. Performs an emulated 16-bit read from an I/O port. We handle special cases
  540. that we need to emulate in here, and fall through to reflecting the write
  541. through to the real hardware if we don't need to special case it.
  542. ****************************************************************************/
  543. u16 X86API BE_inw(X86EMU_pioAddr port)
  544. {
  545. u16 val = 0;
  546. #if defined(DEBUG) || !defined(__i386__)
  547. if (IS_PCI_PORT(port))
  548. val = PCI_inp(port, REG_READ_WORD);
  549. else if (port < 0x100) {
  550. DB(printf("WARN: Maybe INVALID inw.%04X -> %04X\n", (u16) port, val);)
  551. val = LOG_inpw(port);
  552. } else
  553. #endif
  554. val = LOG_inpw(port);
  555. return val;
  556. }
  557. /****************************************************************************
  558. PARAMETERS:
  559. port - Port to write to
  560. RETURNS:
  561. Value read from the I/O port
  562. REMARKS:
  563. Performs an emulated 32-bit read from an I/O port. We handle special cases
  564. that we need to emulate in here, and fall through to reflecting the write
  565. through to the real hardware if we don't need to special case it.
  566. ****************************************************************************/
  567. u32 X86API BE_inl(X86EMU_pioAddr port)
  568. {
  569. u32 val = 0;
  570. #if defined(DEBUG) || !defined(__i386__)
  571. if (IS_PCI_PORT(port))
  572. val = PCI_inp(port, REG_READ_DWORD);
  573. else if (port < 0x100) {
  574. val = LOG_inpd(port);
  575. } else
  576. #endif
  577. val = LOG_inpd(port);
  578. return val;
  579. }
  580. /****************************************************************************
  581. PARAMETERS:
  582. port - Port to write to
  583. val - Value to write to port
  584. REMARKS:
  585. Performs an emulated 8-bit write to an I/O port. We handle special cases
  586. that we need to emulate in here, and fall through to reflecting the write
  587. through to the real hardware if we don't need to special case it.
  588. ****************************************************************************/
  589. void X86API BE_outb(X86EMU_pioAddr port, u8 val)
  590. {
  591. #if defined(DEBUG) || !defined(__i386__)
  592. if (IS_VGA_PORT(port))
  593. VGA_outpb(port, val);
  594. else if (IS_TIMER_PORT(port))
  595. DB(printf("Can not interept TIMER port now!\n");)
  596. else if (IS_SPKR_PORT(port))
  597. DB(printf("Can not interept SPEAKER port now!\n");)
  598. else if (IS_CMOS_PORT(port))
  599. DB(printf("Can not interept CMOS port now!\n");)
  600. else if (IS_PCI_PORT(port))
  601. PCI_outp(port, val, REG_WRITE_BYTE);
  602. else if (port < 0x100) {
  603. DB(printf("WARN:Maybe INVALID outb.%04X <- %02X\n", (u16) port, val);)
  604. LOG_outpb(port, val);
  605. } else
  606. #endif
  607. LOG_outpb(port, val);
  608. }
  609. /****************************************************************************
  610. PARAMETERS:
  611. port - Port to write to
  612. val - Value to write to port
  613. REMARKS:
  614. Performs an emulated 16-bit write to an I/O port. We handle special cases
  615. that we need to emulate in here, and fall through to reflecting the write
  616. through to the real hardware if we don't need to special case it.
  617. ****************************************************************************/
  618. void X86API BE_outw(X86EMU_pioAddr port, u16 val)
  619. {
  620. #if defined(DEBUG) || !defined(__i386__)
  621. if (IS_VGA_PORT(port)) {
  622. VGA_outpb(port, val);
  623. VGA_outpb(port + 1, val >> 8);
  624. } else if (IS_PCI_PORT(port))
  625. PCI_outp(port, val, REG_WRITE_WORD);
  626. else if (port < 0x100) {
  627. DB(printf("WARN: MAybe INVALID outw.%04X <- %04X\n", (u16) port,
  628. val);)
  629. LOG_outpw(port, val);
  630. } else
  631. #endif
  632. LOG_outpw(port, val);
  633. }
  634. /****************************************************************************
  635. PARAMETERS:
  636. port - Port to write to
  637. val - Value to write to port
  638. REMARKS:
  639. Performs an emulated 32-bit write to an I/O port. We handle special cases
  640. that we need to emulate in here, and fall through to reflecting the write
  641. through to the real hardware if we don't need to special case it.
  642. ****************************************************************************/
  643. void X86API BE_outl(X86EMU_pioAddr port, u32 val)
  644. {
  645. #if defined(DEBUG) || !defined(__i386__)
  646. if (IS_PCI_PORT(port))
  647. PCI_outp(port, val, REG_WRITE_DWORD);
  648. else if (port < 0x100) {
  649. DB(printf("WARN: INVALID outl.%04X <- %08X\n", (u16) port,val);)
  650. LOG_outpd(port, val);
  651. } else
  652. #endif
  653. LOG_outpd(port, val);
  654. }