clk-uclass.c 2.2 KB

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  1. /*
  2. * Copyright (C) 2015 Google, Inc
  3. * Written by Simon Glass <sjg@chromium.org>
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include <common.h>
  8. #include <clk.h>
  9. #include <dm.h>
  10. #include <errno.h>
  11. #include <dm/lists.h>
  12. #include <dm/root.h>
  13. DECLARE_GLOBAL_DATA_PTR;
  14. ulong clk_get_rate(struct udevice *dev)
  15. {
  16. struct clk_ops *ops = clk_get_ops(dev);
  17. if (!ops->get_rate)
  18. return -ENOSYS;
  19. return ops->get_rate(dev);
  20. }
  21. ulong clk_set_rate(struct udevice *dev, ulong rate)
  22. {
  23. struct clk_ops *ops = clk_get_ops(dev);
  24. if (!ops->set_rate)
  25. return -ENOSYS;
  26. return ops->set_rate(dev, rate);
  27. }
  28. int clk_enable(struct udevice *dev, int periph)
  29. {
  30. struct clk_ops *ops = clk_get_ops(dev);
  31. if (!ops->enable)
  32. return -ENOSYS;
  33. return ops->enable(dev, periph);
  34. }
  35. ulong clk_get_periph_rate(struct udevice *dev, int periph)
  36. {
  37. struct clk_ops *ops = clk_get_ops(dev);
  38. if (!ops->get_periph_rate)
  39. return -ENOSYS;
  40. return ops->get_periph_rate(dev, periph);
  41. }
  42. ulong clk_set_periph_rate(struct udevice *dev, int periph, ulong rate)
  43. {
  44. struct clk_ops *ops = clk_get_ops(dev);
  45. if (!ops->set_periph_rate)
  46. return -ENOSYS;
  47. return ops->set_periph_rate(dev, periph, rate);
  48. }
  49. #if CONFIG_IS_ENABLED(OF_CONTROL)
  50. int clk_get_by_index(struct udevice *dev, int index, struct udevice **clk_devp)
  51. {
  52. int ret;
  53. #ifdef CONFIG_SPL_BUILD
  54. u32 cell[2];
  55. if (index != 0)
  56. return -ENOSYS;
  57. assert(*clk_devp);
  58. ret = uclass_get_device(UCLASS_CLK, 0, clk_devp);
  59. if (ret)
  60. return ret;
  61. ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset, "clocks",
  62. cell, 2);
  63. if (ret)
  64. return ret;
  65. return cell[1];
  66. #else
  67. struct fdtdec_phandle_args args;
  68. assert(*clk_devp);
  69. ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev->of_offset,
  70. "clocks", "#clock-cells", 0, index,
  71. &args);
  72. if (ret) {
  73. debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
  74. __func__, ret);
  75. return ret;
  76. }
  77. ret = uclass_get_device_by_of_offset(UCLASS_CLK, args.node, clk_devp);
  78. if (ret) {
  79. debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
  80. __func__, ret);
  81. return ret;
  82. }
  83. return args.args_count > 0 ? args.args[0] : 0;
  84. #endif
  85. }
  86. #endif
  87. UCLASS_DRIVER(clk) = {
  88. .id = UCLASS_CLK,
  89. .name = "clk",
  90. };