i2c-uniphier.c 5.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227
  1. /*
  2. * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <linux/types.h>
  8. #include <linux/io.h>
  9. #include <asm/errno.h>
  10. #include <dm/device.h>
  11. #include <dm/root.h>
  12. #include <i2c.h>
  13. #include <fdtdec.h>
  14. #include <mapmem.h>
  15. DECLARE_GLOBAL_DATA_PTR;
  16. struct uniphier_i2c_regs {
  17. u32 dtrm; /* data transmission */
  18. #define I2C_DTRM_STA (1 << 10)
  19. #define I2C_DTRM_STO (1 << 9)
  20. #define I2C_DTRM_NACK (1 << 8)
  21. #define I2C_DTRM_RD (1 << 0)
  22. u32 drec; /* data reception */
  23. #define I2C_DREC_STS (1 << 12)
  24. #define I2C_DREC_LRB (1 << 11)
  25. #define I2C_DREC_LAB (1 << 9)
  26. u32 myad; /* slave address */
  27. u32 clk; /* clock frequency control */
  28. u32 brst; /* bus reset */
  29. #define I2C_BRST_FOEN (1 << 1)
  30. #define I2C_BRST_BRST (1 << 0)
  31. u32 hold; /* hold time control */
  32. u32 bsts; /* bus status monitor */
  33. u32 noise; /* noise filter control */
  34. u32 setup; /* setup time control */
  35. };
  36. #define IOBUS_FREQ 100000000
  37. struct uniphier_i2c_dev {
  38. struct uniphier_i2c_regs __iomem *regs; /* register base */
  39. unsigned long input_clk; /* master clock (Hz) */
  40. unsigned long wait_us; /* wait for every byte transfer (us) */
  41. };
  42. static int uniphier_i2c_probe(struct udevice *dev)
  43. {
  44. fdt_addr_t addr;
  45. fdt_size_t size;
  46. struct uniphier_i2c_dev *priv = dev_get_priv(dev);
  47. addr = fdtdec_get_addr_size(gd->fdt_blob, dev->of_offset, "reg", &size);
  48. priv->regs = map_sysmem(addr, size);
  49. if (!priv->regs)
  50. return -ENOMEM;
  51. priv->input_clk = IOBUS_FREQ;
  52. /* deassert reset */
  53. writel(0x3, &priv->regs->brst);
  54. return 0;
  55. }
  56. static int uniphier_i2c_remove(struct udevice *dev)
  57. {
  58. struct uniphier_i2c_dev *priv = dev_get_priv(dev);
  59. unmap_sysmem(priv->regs);
  60. return 0;
  61. }
  62. static int send_and_recv_byte(struct uniphier_i2c_dev *dev, u32 dtrm)
  63. {
  64. writel(dtrm, &dev->regs->dtrm);
  65. /*
  66. * This controller only provides interruption to inform the completion
  67. * of each byte transfer. (No status register to poll it.)
  68. * Unfortunately, U-Boot does not have a good support of interrupt.
  69. * Wait for a while.
  70. */
  71. udelay(dev->wait_us);
  72. return readl(&dev->regs->drec);
  73. }
  74. static int send_byte(struct uniphier_i2c_dev *dev, u32 dtrm, bool *stop)
  75. {
  76. int ret = 0;
  77. u32 drec;
  78. drec = send_and_recv_byte(dev, dtrm);
  79. if (drec & I2C_DREC_LAB) {
  80. debug("uniphier_i2c: bus arbitration failed\n");
  81. *stop = false;
  82. ret = -EREMOTEIO;
  83. }
  84. if (drec & I2C_DREC_LRB) {
  85. debug("uniphier_i2c: slave did not return ACK\n");
  86. ret = -EREMOTEIO;
  87. }
  88. return ret;
  89. }
  90. static int uniphier_i2c_transmit(struct uniphier_i2c_dev *dev, uint addr,
  91. uint len, const u8 *buf, bool *stop)
  92. {
  93. int ret;
  94. debug("%s: addr = %x, len = %d\n", __func__, addr, len);
  95. ret = send_byte(dev, I2C_DTRM_STA | I2C_DTRM_NACK | addr << 1, stop);
  96. if (ret < 0)
  97. goto fail;
  98. while (len--) {
  99. ret = send_byte(dev, I2C_DTRM_NACK | *buf++, stop);
  100. if (ret < 0)
  101. goto fail;
  102. }
  103. fail:
  104. if (*stop)
  105. writel(I2C_DTRM_STO | I2C_DTRM_NACK, &dev->regs->dtrm);
  106. return ret;
  107. }
  108. static int uniphier_i2c_receive(struct uniphier_i2c_dev *dev, uint addr,
  109. uint len, u8 *buf, bool *stop)
  110. {
  111. int ret;
  112. debug("%s: addr = %x, len = %d\n", __func__, addr, len);
  113. ret = send_byte(dev, I2C_DTRM_STA | I2C_DTRM_NACK |
  114. I2C_DTRM_RD | addr << 1, stop);
  115. if (ret < 0)
  116. goto fail;
  117. while (len--)
  118. *buf++ = send_and_recv_byte(dev, len ? 0 : I2C_DTRM_NACK);
  119. fail:
  120. if (*stop)
  121. writel(I2C_DTRM_STO | I2C_DTRM_NACK, &dev->regs->dtrm);
  122. return ret;
  123. }
  124. static int uniphier_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
  125. int nmsgs)
  126. {
  127. int ret = 0;
  128. struct uniphier_i2c_dev *dev = dev_get_priv(bus);
  129. bool stop;
  130. for (; nmsgs > 0; nmsgs--, msg++) {
  131. /* If next message is read, skip the stop condition */
  132. stop = nmsgs > 1 && msg[1].flags & I2C_M_RD ? false : true;
  133. if (msg->flags & I2C_M_RD)
  134. ret = uniphier_i2c_receive(dev, msg->addr, msg->len,
  135. msg->buf, &stop);
  136. else
  137. ret = uniphier_i2c_transmit(dev, msg->addr, msg->len,
  138. msg->buf, &stop);
  139. if (ret < 0)
  140. break;
  141. }
  142. return ret;
  143. }
  144. static int uniphier_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
  145. {
  146. struct uniphier_i2c_dev *priv = dev_get_priv(bus);
  147. /* max supported frequency is 400 kHz */
  148. if (speed > 400000)
  149. return -EINVAL;
  150. /* bus reset: make sure the bus is idle when change the frequency */
  151. writel(0x1, &priv->regs->brst);
  152. writel((priv->input_clk / speed / 2 << 16) | (priv->input_clk / speed),
  153. &priv->regs->clk);
  154. writel(0x3, &priv->regs->brst);
  155. /*
  156. * Theoretically, each byte can be transferred in
  157. * 1000000 * 9 / speed usec. For safety, wait more than double.
  158. */
  159. priv->wait_us = 20000000 / speed;
  160. return 0;
  161. }
  162. static const struct dm_i2c_ops uniphier_i2c_ops = {
  163. .xfer = uniphier_i2c_xfer,
  164. .set_bus_speed = uniphier_i2c_set_bus_speed,
  165. };
  166. static const struct udevice_id uniphier_i2c_of_match[] = {
  167. { .compatible = "socionext,uniphier-i2c" },
  168. { /* sentinel */ }
  169. };
  170. U_BOOT_DRIVER(uniphier_i2c) = {
  171. .name = "uniphier-i2c",
  172. .id = UCLASS_I2C,
  173. .of_match = uniphier_i2c_of_match,
  174. .probe = uniphier_i2c_probe,
  175. .remove = uniphier_i2c_remove,
  176. .priv_auto_alloc_size = sizeof(struct uniphier_i2c_dev),
  177. .ops = &uniphier_i2c_ops,
  178. };