pt7c4338.c 4.5 KB

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  1. /*
  2. * Copyright 2010 Freescale Semiconductor, Inc.
  3. *
  4. * Author: Priyanka Jain <Priyanka.Jain@freescale.com>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. /*
  25. * This file provides Date & Time support (no alarms) for PT7C4338 chip.
  26. *
  27. * This file is based on drivers/rtc/ds1337.c
  28. *
  29. * PT7C4338 chip is manufactured by Pericom Technology Inc.
  30. * It is a serial real-time clock which provides
  31. * 1)Low-power clock/calendar.
  32. * 2)Programmable square-wave output.
  33. * It has 56 bytes of nonvolatile RAM.
  34. */
  35. #include <common.h>
  36. #include <command.h>
  37. #include <rtc.h>
  38. #include <i2c.h>
  39. /* RTC register addresses */
  40. #define RTC_SEC_REG_ADDR 0x0
  41. #define RTC_MIN_REG_ADDR 0x1
  42. #define RTC_HR_REG_ADDR 0x2
  43. #define RTC_DAY_REG_ADDR 0x3
  44. #define RTC_DATE_REG_ADDR 0x4
  45. #define RTC_MON_REG_ADDR 0x5
  46. #define RTC_YR_REG_ADDR 0x6
  47. #define RTC_CTL_STAT_REG_ADDR 0x7
  48. /* RTC second register address bit */
  49. #define RTC_SEC_BIT_CH 0x80 /* Clock Halt (in Register 0) */
  50. /* RTC control and status register bits */
  51. #define RTC_CTL_STAT_BIT_RS0 0x1 /* Rate select 0 */
  52. #define RTC_CTL_STAT_BIT_RS1 0x2 /* Rate select 1 */
  53. #define RTC_CTL_STAT_BIT_SQWE 0x10 /* Square Wave Enable */
  54. #define RTC_CTL_STAT_BIT_OSF 0x20 /* Oscillator Stop Flag */
  55. #define RTC_CTL_STAT_BIT_OUT 0x80 /* Output Level Control */
  56. /* RTC reset value */
  57. #define RTC_PT7C4338_RESET_VAL \
  58. (RTC_CTL_STAT_BIT_RS0 | RTC_CTL_STAT_BIT_RS1 | RTC_CTL_STAT_BIT_OUT)
  59. /****** Helper functions ****************************************/
  60. static u8 rtc_read(u8 reg)
  61. {
  62. return i2c_reg_read(CONFIG_SYS_I2C_RTC_ADDR, reg);
  63. }
  64. static void rtc_write(u8 reg, u8 val)
  65. {
  66. i2c_reg_write(CONFIG_SYS_I2C_RTC_ADDR, reg, val);
  67. }
  68. /****************************************************************/
  69. /* Get the current time from the RTC */
  70. int rtc_get(struct rtc_time *tmp)
  71. {
  72. int ret = 0;
  73. u8 sec, min, hour, mday, wday, mon, year, ctl_stat;
  74. ctl_stat = rtc_read(RTC_CTL_STAT_REG_ADDR);
  75. sec = rtc_read(RTC_SEC_REG_ADDR);
  76. min = rtc_read(RTC_MIN_REG_ADDR);
  77. hour = rtc_read(RTC_HR_REG_ADDR);
  78. wday = rtc_read(RTC_DAY_REG_ADDR);
  79. mday = rtc_read(RTC_DATE_REG_ADDR);
  80. mon = rtc_read(RTC_MON_REG_ADDR);
  81. year = rtc_read(RTC_YR_REG_ADDR);
  82. debug("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
  83. "hr: %02x min: %02x sec: %02x control_status: %02x\n",
  84. year, mon, mday, wday, hour, min, sec, ctl_stat);
  85. if (ctl_stat & RTC_CTL_STAT_BIT_OSF) {
  86. printf("### Warning: RTC oscillator has stopped\n");
  87. /* clear the OSF flag */
  88. rtc_write(RTC_CTL_STAT_REG_ADDR,
  89. rtc_read(RTC_CTL_STAT_REG_ADDR)\
  90. & ~RTC_CTL_STAT_BIT_OSF);
  91. ret = -1;
  92. }
  93. tmp->tm_sec = bcd2bin(sec & 0x7F);
  94. tmp->tm_min = bcd2bin(min & 0x7F);
  95. tmp->tm_hour = bcd2bin(hour & 0x3F);
  96. tmp->tm_mday = bcd2bin(mday & 0x3F);
  97. tmp->tm_mon = bcd2bin(mon & 0x1F);
  98. tmp->tm_year = bcd2bin(year) + 2000;
  99. tmp->tm_wday = bcd2bin((wday - 1) & 0x07);
  100. tmp->tm_yday = 0;
  101. tmp->tm_isdst = 0;
  102. debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  103. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  104. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  105. return ret;
  106. }
  107. /* Set the RTC */
  108. int rtc_set(struct rtc_time *tmp)
  109. {
  110. debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  111. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  112. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  113. rtc_write(RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100));
  114. rtc_write(RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon));
  115. rtc_write(RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday + 1));
  116. rtc_write(RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday));
  117. rtc_write(RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour));
  118. rtc_write(RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min));
  119. rtc_write(RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec));
  120. return 0;
  121. }
  122. /* Reset the RTC */
  123. void rtc_reset(void)
  124. {
  125. rtc_write(RTC_SEC_REG_ADDR, 0x00); /* clearing Clock Halt */
  126. rtc_write(RTC_CTL_STAT_REG_ADDR, RTC_PT7C4338_RESET_VAL);
  127. }