cpu_sh3.h 756 B

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  1. /*
  2. * (C) Copyright 2007-2009 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
  3. * (C) Copyright 2007 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #ifndef _ASM_CPU_SH3_H_
  8. #define _ASM_CPU_SH3_H_
  9. /* cache control */
  10. #define CCR_CACHE_STOP 0x00000008
  11. #define CCR_CACHE_ENABLE 0x00000005
  12. #define CCR_CACHE_ICI 0x00000008
  13. #define CACHE_OC_ADDRESS_ARRAY 0xf0000000
  14. #define CACHE_OC_WAY_SHIFT 13
  15. #define CACHE_OC_NUM_ENTRIES 256
  16. #define CACHE_OC_ENTRY_SHIFT 4
  17. #if defined(CONFIG_CPU_SH7706)
  18. #include <asm/cpu_sh7706.h>
  19. #elif defined(CONFIG_CPU_SH7710)
  20. #include <asm/cpu_sh7710.h>
  21. #elif defined(CONFIG_CPU_SH7720)
  22. #include <asm/cpu_sh7720.h>
  23. #else
  24. #error "Unknown SH3 variant"
  25. #endif
  26. #endif /* _ASM_CPU_SH3_H_ */