isp116x-hcd.c 32 KB

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  1. /*
  2. * ISP116x HCD (Host Controller Driver) for u-boot.
  3. *
  4. * Copyright (C) 2006-2007 Rodolfo Giometti <giometti@linux.it>
  5. * Copyright (C) 2006-2007 Eurotech S.p.A. <info@eurotech.it>
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. *
  9. * Derived in part from the SL811 HCD driver "u-boot/drivers/usb/sl811_usb.c"
  10. * (original copyright message follows):
  11. *
  12. * (C) Copyright 2004
  13. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  14. *
  15. * This code is based on linux driver for sl811hs chip, source at
  16. * drivers/usb/host/sl811.c:
  17. *
  18. * SL811 Host Controller Interface driver for USB.
  19. *
  20. * Copyright (c) 2003/06, Courage Co., Ltd.
  21. *
  22. * Based on:
  23. * 1.uhci.c by Linus Torvalds, Johannes Erdfelt, Randy Dunlap,
  24. * Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber,
  25. * Adam Richter, Gregory P. Smith;
  26. * 2.Original SL811 driver (hc_sl811.o) by Pei Liu <pbl@cypress.com>
  27. * 3.Rewrited as sl811.o by Yin Aihua <yinah:couragetech.com.cn>
  28. *
  29. * [[GNU/GPL disclaimer]]
  30. *
  31. * and in part from AU1x00 OHCI HCD driver "u-boot/arch/mips/cpu/au1x00_usb_ohci.c"
  32. * (original copyright message follows):
  33. *
  34. * URB OHCI HCD (Host Controller Driver) for USB on the AU1x00.
  35. *
  36. * (C) Copyright 2003
  37. * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
  38. *
  39. * [[GNU/GPL disclaimer]]
  40. *
  41. * Note: Part of this code has been derived from linux
  42. */
  43. #include <common.h>
  44. #include <asm/io.h>
  45. #include <usb.h>
  46. #include <malloc.h>
  47. #include <linux/list.h>
  48. /*
  49. * ISP116x chips require certain delays between accesses to its
  50. * registers. The following timing options exist.
  51. *
  52. * 1. Configure your memory controller (the best)
  53. * 2. Use ndelay (easiest, poorest). For that, enable the following macro.
  54. *
  55. * Value is in microseconds.
  56. */
  57. #ifdef ISP116X_HCD_USE_UDELAY
  58. #define UDELAY 1
  59. #endif
  60. /*
  61. * On some (slowly?) machines an extra delay after data packing into
  62. * controller's FIFOs is required, * otherwise you may get the following
  63. * error:
  64. *
  65. * uboot> usb start
  66. * (Re)start USB...
  67. * USB: scanning bus for devices... isp116x: isp116x_submit_job: CTL:TIMEOUT
  68. * isp116x: isp116x_submit_job: ****** FIFO not ready! ******
  69. *
  70. * USB device not responding, giving up (status=4)
  71. * isp116x: isp116x_submit_job: ****** FIFO not empty! ******
  72. * isp116x: isp116x_submit_job: ****** FIFO not empty! ******
  73. * isp116x: isp116x_submit_job: ****** FIFO not empty! ******
  74. * 3 USB Device(s) found
  75. * scanning bus for storage devices... 0 Storage Device(s) found
  76. *
  77. * Value is in milliseconds.
  78. */
  79. #ifdef ISP116X_HCD_USE_EXTRA_DELAY
  80. #define EXTRA_DELAY 2
  81. #endif
  82. /*
  83. * Enable the following defines if you wish enable debugging messages.
  84. */
  85. #undef DEBUG /* enable debugging messages */
  86. #undef TRACE /* enable tracing code */
  87. #undef VERBOSE /* verbose debugging messages */
  88. #include "isp116x.h"
  89. #define DRIVER_VERSION "08 Jan 2007"
  90. static const char hcd_name[] = "isp116x-hcd";
  91. struct isp116x isp116x_dev;
  92. struct isp116x_platform_data isp116x_board;
  93. static int got_rhsc; /* root hub status change */
  94. struct usb_device *devgone; /* device which was disconnected */
  95. static int rh_devnum; /* address of Root Hub endpoint */
  96. /* ------------------------------------------------------------------------- */
  97. #define ALIGN(x,a) (((x)+(a)-1UL)&~((a)-1UL))
  98. #define min_t(type,x,y) \
  99. ({ type __x = (x); type __y = (y); __x < __y ? __x : __y; })
  100. /* ------------------------------------------------------------------------- */
  101. static int isp116x_reset(struct isp116x *isp116x);
  102. /* --- Debugging functions ------------------------------------------------- */
  103. #define isp116x_show_reg(d, r) { \
  104. if ((r) < 0x20) { \
  105. DBG("%-12s[%02x]: %08x", #r, \
  106. r, isp116x_read_reg32(d, r)); \
  107. } else { \
  108. DBG("%-12s[%02x]: %04x", #r, \
  109. r, isp116x_read_reg16(d, r)); \
  110. } \
  111. }
  112. #define isp116x_show_regs(d) { \
  113. isp116x_show_reg(d, HCREVISION); \
  114. isp116x_show_reg(d, HCCONTROL); \
  115. isp116x_show_reg(d, HCCMDSTAT); \
  116. isp116x_show_reg(d, HCINTSTAT); \
  117. isp116x_show_reg(d, HCINTENB); \
  118. isp116x_show_reg(d, HCFMINTVL); \
  119. isp116x_show_reg(d, HCFMREM); \
  120. isp116x_show_reg(d, HCFMNUM); \
  121. isp116x_show_reg(d, HCLSTHRESH); \
  122. isp116x_show_reg(d, HCRHDESCA); \
  123. isp116x_show_reg(d, HCRHDESCB); \
  124. isp116x_show_reg(d, HCRHSTATUS); \
  125. isp116x_show_reg(d, HCRHPORT1); \
  126. isp116x_show_reg(d, HCRHPORT2); \
  127. isp116x_show_reg(d, HCHWCFG); \
  128. isp116x_show_reg(d, HCDMACFG); \
  129. isp116x_show_reg(d, HCXFERCTR); \
  130. isp116x_show_reg(d, HCuPINT); \
  131. isp116x_show_reg(d, HCuPINTENB); \
  132. isp116x_show_reg(d, HCCHIPID); \
  133. isp116x_show_reg(d, HCSCRATCH); \
  134. isp116x_show_reg(d, HCITLBUFLEN); \
  135. isp116x_show_reg(d, HCATLBUFLEN); \
  136. isp116x_show_reg(d, HCBUFSTAT); \
  137. isp116x_show_reg(d, HCRDITL0LEN); \
  138. isp116x_show_reg(d, HCRDITL1LEN); \
  139. }
  140. #if defined(TRACE)
  141. static int isp116x_get_current_frame_number(struct usb_device *usb_dev)
  142. {
  143. struct isp116x *isp116x = &isp116x_dev;
  144. return isp116x_read_reg32(isp116x, HCFMNUM);
  145. }
  146. static void dump_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  147. int len, char *str)
  148. {
  149. #if defined(VERBOSE)
  150. int i;
  151. #endif
  152. DBG("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d stat:%#lx",
  153. str,
  154. isp116x_get_current_frame_number(dev),
  155. usb_pipedevice(pipe),
  156. usb_pipeendpoint(pipe),
  157. usb_pipeout(pipe) ? 'O' : 'I',
  158. usb_pipetype(pipe) < 2 ?
  159. (usb_pipeint(pipe) ?
  160. "INTR" : "ISOC") :
  161. (usb_pipecontrol(pipe) ? "CTRL" : "BULK"), len, dev->status);
  162. #if defined(VERBOSE)
  163. if (len > 0 && buffer) {
  164. printf(__FILE__ ": data(%d):", len);
  165. for (i = 0; i < 16 && i < len; i++)
  166. printf(" %02x", ((__u8 *) buffer)[i]);
  167. printf("%s\n", i < len ? "..." : "");
  168. }
  169. #endif
  170. }
  171. #define PTD_DIR_STR(ptd) ({char __c; \
  172. switch(PTD_GET_DIR(ptd)){ \
  173. case 0: __c = 's'; break; \
  174. case 1: __c = 'o'; break; \
  175. default: __c = 'i'; break; \
  176. }; __c;})
  177. /*
  178. Dump PTD info. The code documents the format
  179. perfectly, right :)
  180. */
  181. static inline void dump_ptd(struct ptd *ptd)
  182. {
  183. #if defined(VERBOSE)
  184. int k;
  185. #endif
  186. DBG("PTD(ext) : cc:%x %d%c%d %d,%d,%d t:%x %x%x%x",
  187. PTD_GET_CC(ptd),
  188. PTD_GET_FA(ptd), PTD_DIR_STR(ptd), PTD_GET_EP(ptd),
  189. PTD_GET_COUNT(ptd), PTD_GET_LEN(ptd), PTD_GET_MPS(ptd),
  190. PTD_GET_TOGGLE(ptd),
  191. PTD_GET_ACTIVE(ptd), PTD_GET_SPD(ptd), PTD_GET_LAST(ptd));
  192. #if defined(VERBOSE)
  193. printf("isp116x: %s: PTD(byte): ", __FUNCTION__);
  194. for (k = 0; k < sizeof(struct ptd); ++k)
  195. printf("%02x ", ((u8 *) ptd)[k]);
  196. printf("\n");
  197. #endif
  198. }
  199. static inline void dump_ptd_data(struct ptd *ptd, u8 * buf, int type)
  200. {
  201. #if defined(VERBOSE)
  202. int k;
  203. if (type == 0 /* 0ut data */ ) {
  204. printf("isp116x: %s: out data: ", __FUNCTION__);
  205. for (k = 0; k < PTD_GET_LEN(ptd); ++k)
  206. printf("%02x ", ((u8 *) buf)[k]);
  207. printf("\n");
  208. }
  209. if (type == 1 /* 1n data */ ) {
  210. printf("isp116x: %s: in data: ", __FUNCTION__);
  211. for (k = 0; k < PTD_GET_COUNT(ptd); ++k)
  212. printf("%02x ", ((u8 *) buf)[k]);
  213. printf("\n");
  214. }
  215. if (PTD_GET_LAST(ptd))
  216. DBG("--- last PTD ---");
  217. #endif
  218. }
  219. #else
  220. #define dump_msg(dev, pipe, buffer, len, str) do { } while (0)
  221. #define dump_pkt(dev, pipe, buffer, len, setup, str, small) do {} while (0)
  222. #define dump_ptd(ptd) do {} while (0)
  223. #define dump_ptd_data(ptd, buf, type) do {} while (0)
  224. #endif
  225. /* --- Virtual Root Hub ---------------------------------------------------- */
  226. #include <usbroothubdes.h>
  227. /*
  228. * Hub class-specific descriptor is constructed dynamically
  229. */
  230. /* --- Virtual root hub management functions ------------------------------- */
  231. static int rh_check_port_status(struct isp116x *isp116x)
  232. {
  233. u32 temp, ndp, i;
  234. int res;
  235. res = -1;
  236. temp = isp116x_read_reg32(isp116x, HCRHSTATUS);
  237. ndp = (temp & RH_A_NDP);
  238. for (i = 0; i < ndp; i++) {
  239. temp = isp116x_read_reg32(isp116x, HCRHPORT1 + i);
  240. /* check for a device disconnect */
  241. if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
  242. (RH_PS_PESC | RH_PS_CSC)) && ((temp & RH_PS_CCS) == 0)) {
  243. res = i;
  244. break;
  245. }
  246. }
  247. return res;
  248. }
  249. /* --- HC management functions --------------------------------------------- */
  250. /* Write len bytes to fifo, pad till 32-bit boundary
  251. */
  252. static void write_ptddata_to_fifo(struct isp116x *isp116x, void *buf, int len)
  253. {
  254. u8 *dp = (u8 *) buf;
  255. u16 *dp2 = (u16 *) buf;
  256. u16 w;
  257. int quot = len % 4;
  258. if ((unsigned long)dp2 & 1) {
  259. /* not aligned */
  260. for (; len > 1; len -= 2) {
  261. w = *dp++;
  262. w |= *dp++ << 8;
  263. isp116x_raw_write_data16(isp116x, w);
  264. }
  265. if (len)
  266. isp116x_write_data16(isp116x, (u16) * dp);
  267. } else {
  268. /* aligned */
  269. for (; len > 1; len -= 2)
  270. isp116x_raw_write_data16(isp116x, *dp2++);
  271. if (len)
  272. isp116x_write_data16(isp116x, 0xff & *((u8 *) dp2));
  273. }
  274. if (quot == 1 || quot == 2)
  275. isp116x_raw_write_data16(isp116x, 0);
  276. }
  277. /* Read len bytes from fifo and then read till 32-bit boundary
  278. */
  279. static void read_ptddata_from_fifo(struct isp116x *isp116x, void *buf, int len)
  280. {
  281. u8 *dp = (u8 *) buf;
  282. u16 *dp2 = (u16 *) buf;
  283. u16 w;
  284. int quot = len % 4;
  285. if ((unsigned long)dp2 & 1) {
  286. /* not aligned */
  287. for (; len > 1; len -= 2) {
  288. w = isp116x_raw_read_data16(isp116x);
  289. *dp++ = w & 0xff;
  290. *dp++ = (w >> 8) & 0xff;
  291. }
  292. if (len)
  293. *dp = 0xff & isp116x_read_data16(isp116x);
  294. } else {
  295. /* aligned */
  296. for (; len > 1; len -= 2)
  297. *dp2++ = isp116x_raw_read_data16(isp116x);
  298. if (len)
  299. *(u8 *) dp2 = 0xff & isp116x_read_data16(isp116x);
  300. }
  301. if (quot == 1 || quot == 2)
  302. isp116x_raw_read_data16(isp116x);
  303. }
  304. /* Write PTD's and data for scheduled transfers into the fifo ram.
  305. * Fifo must be empty and ready */
  306. static void pack_fifo(struct isp116x *isp116x, struct usb_device *dev,
  307. unsigned long pipe, struct ptd *ptd, int n, void *data,
  308. int len)
  309. {
  310. int buflen = n * sizeof(struct ptd) + len;
  311. int i, done;
  312. DBG("--- pack buffer %p - %d bytes (fifo %d) ---", data, len, buflen);
  313. isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
  314. isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
  315. isp116x_write_addr(isp116x, HCATLPORT | ISP116x_WRITE_OFFSET);
  316. done = 0;
  317. for (i = 0; i < n; i++) {
  318. DBG("i=%d - done=%d - len=%d", i, done, PTD_GET_LEN(&ptd[i]));
  319. dump_ptd(&ptd[i]);
  320. isp116x_write_data16(isp116x, ptd[i].count);
  321. isp116x_write_data16(isp116x, ptd[i].mps);
  322. isp116x_write_data16(isp116x, ptd[i].len);
  323. isp116x_write_data16(isp116x, ptd[i].faddr);
  324. dump_ptd_data(&ptd[i], (__u8 *) data + done, 0);
  325. write_ptddata_to_fifo(isp116x,
  326. (__u8 *) data + done,
  327. PTD_GET_LEN(&ptd[i]));
  328. done += PTD_GET_LEN(&ptd[i]);
  329. }
  330. }
  331. /* Read the processed PTD's and data from fifo ram back to URBs' buffers.
  332. * Fifo must be full and done */
  333. static int unpack_fifo(struct isp116x *isp116x, struct usb_device *dev,
  334. unsigned long pipe, struct ptd *ptd, int n, void *data,
  335. int len)
  336. {
  337. int buflen = n * sizeof(struct ptd) + len;
  338. int i, done, cc, ret;
  339. isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
  340. isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
  341. isp116x_write_addr(isp116x, HCATLPORT);
  342. ret = TD_CC_NOERROR;
  343. done = 0;
  344. for (i = 0; i < n; i++) {
  345. DBG("i=%d - done=%d - len=%d", i, done, PTD_GET_LEN(&ptd[i]));
  346. ptd[i].count = isp116x_read_data16(isp116x);
  347. ptd[i].mps = isp116x_read_data16(isp116x);
  348. ptd[i].len = isp116x_read_data16(isp116x);
  349. ptd[i].faddr = isp116x_read_data16(isp116x);
  350. dump_ptd(&ptd[i]);
  351. read_ptddata_from_fifo(isp116x,
  352. (__u8 *) data + done,
  353. PTD_GET_LEN(&ptd[i]));
  354. dump_ptd_data(&ptd[i], (__u8 *) data + done, 1);
  355. done += PTD_GET_LEN(&ptd[i]);
  356. cc = PTD_GET_CC(&ptd[i]);
  357. /* Data underrun means basically that we had more buffer space than
  358. * the function had data. It is perfectly normal but upper levels have
  359. * to know how much we actually transferred.
  360. */
  361. if (cc == TD_NOTACCESSED ||
  362. (cc != TD_CC_NOERROR && (ret == TD_CC_NOERROR || ret == TD_DATAUNDERRUN)))
  363. ret = cc;
  364. }
  365. DBG("--- unpack buffer %p - %d bytes (fifo %d) ---", data, len, buflen);
  366. return ret;
  367. }
  368. /* Interrupt handling
  369. */
  370. static int isp116x_interrupt(struct isp116x *isp116x)
  371. {
  372. u16 irqstat;
  373. u32 intstat;
  374. int ret = 0;
  375. isp116x_write_reg16(isp116x, HCuPINTENB, 0);
  376. irqstat = isp116x_read_reg16(isp116x, HCuPINT);
  377. isp116x_write_reg16(isp116x, HCuPINT, irqstat);
  378. DBG(">>>>>> irqstat %x <<<<<<", irqstat);
  379. if (irqstat & HCuPINT_ATL) {
  380. DBG(">>>>>> HCuPINT_ATL <<<<<<");
  381. udelay(500);
  382. ret = 1;
  383. }
  384. if (irqstat & HCuPINT_OPR) {
  385. intstat = isp116x_read_reg32(isp116x, HCINTSTAT);
  386. isp116x_write_reg32(isp116x, HCINTSTAT, intstat);
  387. DBG(">>>>>> HCuPINT_OPR %x <<<<<<", intstat);
  388. if (intstat & HCINT_UE) {
  389. ERR("unrecoverable error, controller disabled");
  390. /* FIXME: be optimistic, hope that bug won't repeat
  391. * often. Make some non-interrupt context restart the
  392. * controller. Count and limit the retries though;
  393. * either hardware or software errors can go forever...
  394. */
  395. isp116x_reset(isp116x);
  396. ret = -1;
  397. return -1;
  398. }
  399. if (intstat & HCINT_RHSC) {
  400. got_rhsc = 1;
  401. ret = 1;
  402. /* When root hub or any of its ports is going
  403. to come out of suspend, it may take more
  404. than 10ms for status bits to stabilize. */
  405. mdelay(20);
  406. }
  407. if (intstat & HCINT_SO) {
  408. ERR("schedule overrun");
  409. ret = -1;
  410. }
  411. irqstat &= ~HCuPINT_OPR;
  412. }
  413. return ret;
  414. }
  415. /* With one PTD we can transfer almost 1K in one go;
  416. * HC does the splitting into endpoint digestible transactions
  417. */
  418. struct ptd ptd[1];
  419. static inline int max_transfer_len(struct usb_device *dev, unsigned long pipe)
  420. {
  421. unsigned mpck = usb_maxpacket(dev, pipe);
  422. /* One PTD can transfer 1023 bytes but try to always
  423. * transfer multiples of endpoint buffer size
  424. */
  425. return 1023 / mpck * mpck;
  426. }
  427. /* Do an USB transfer
  428. */
  429. static int isp116x_submit_job(struct usb_device *dev, unsigned long pipe,
  430. int dir, void *buffer, int len)
  431. {
  432. struct isp116x *isp116x = &isp116x_dev;
  433. int type = usb_pipetype(pipe);
  434. int epnum = usb_pipeendpoint(pipe);
  435. int max = usb_maxpacket(dev, pipe);
  436. int dir_out = usb_pipeout(pipe);
  437. int speed_low = (dev->speed == USB_SPEED_LOW);
  438. int i, done = 0, stat, timeout, cc;
  439. /* 500 frames or 0.5s timeout when function is busy and NAKs transactions for a while */
  440. int retries = 500;
  441. DBG("------------------------------------------------");
  442. dump_msg(dev, pipe, buffer, len, "SUBMIT");
  443. DBG("------------------------------------------------");
  444. if (len >= 1024) {
  445. ERR("Too big job");
  446. dev->status = USB_ST_CRC_ERR;
  447. return -1;
  448. }
  449. if (isp116x->disabled) {
  450. ERR("EPIPE");
  451. dev->status = USB_ST_CRC_ERR;
  452. return -1;
  453. }
  454. /* device pulled? Shortcut the action. */
  455. if (devgone == dev) {
  456. ERR("ENODEV");
  457. dev->status = USB_ST_CRC_ERR;
  458. return USB_ST_CRC_ERR;
  459. }
  460. if (!max) {
  461. ERR("pipesize for pipe %lx is zero", pipe);
  462. dev->status = USB_ST_CRC_ERR;
  463. return -1;
  464. }
  465. if (type == PIPE_ISOCHRONOUS) {
  466. ERR("isochronous transfers not supported");
  467. dev->status = USB_ST_CRC_ERR;
  468. return -1;
  469. }
  470. /* FIFO not empty? */
  471. if (isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_FULL) {
  472. ERR("****** FIFO not empty! ******");
  473. dev->status = USB_ST_BUF_ERR;
  474. return -1;
  475. }
  476. retry:
  477. isp116x_write_reg32(isp116x, HCINTSTAT, 0xff);
  478. /* Prepare the PTD data */
  479. ptd->count = PTD_CC_MSK | PTD_ACTIVE_MSK |
  480. PTD_TOGGLE(usb_gettoggle(dev, epnum, dir_out));
  481. ptd->mps = PTD_MPS(max) | PTD_SPD(speed_low) | PTD_EP(epnum) | PTD_LAST_MSK;
  482. ptd->len = PTD_LEN(len) | PTD_DIR(dir);
  483. ptd->faddr = PTD_FA(usb_pipedevice(pipe));
  484. retry_same:
  485. /* Pack data into FIFO ram */
  486. pack_fifo(isp116x, dev, pipe, ptd, 1, buffer, len);
  487. #ifdef EXTRA_DELAY
  488. mdelay(EXTRA_DELAY);
  489. #endif
  490. /* Start the data transfer */
  491. /* Allow more time for a BULK device to react - some are slow */
  492. if (usb_pipebulk(pipe))
  493. timeout = 5000;
  494. else
  495. timeout = 100;
  496. /* Wait for it to complete */
  497. for (;;) {
  498. /* Check whether the controller is done */
  499. stat = isp116x_interrupt(isp116x);
  500. if (stat < 0) {
  501. dev->status = USB_ST_CRC_ERR;
  502. break;
  503. }
  504. if (stat > 0)
  505. break;
  506. /* Check the timeout */
  507. if (--timeout)
  508. udelay(1);
  509. else {
  510. ERR("CTL:TIMEOUT ");
  511. stat = USB_ST_CRC_ERR;
  512. break;
  513. }
  514. }
  515. /* We got an Root Hub Status Change interrupt */
  516. if (got_rhsc) {
  517. isp116x_show_regs(isp116x);
  518. got_rhsc = 0;
  519. /* Abuse timeout */
  520. timeout = rh_check_port_status(isp116x);
  521. if (timeout >= 0) {
  522. /*
  523. * FIXME! NOTE! AAAARGH!
  524. * This is potentially dangerous because it assumes
  525. * that only one device is ever plugged in!
  526. */
  527. devgone = dev;
  528. }
  529. }
  530. /* Ok, now we can read transfer status */
  531. /* FIFO not ready? */
  532. if (!(isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_DONE)) {
  533. ERR("****** FIFO not ready! ******");
  534. dev->status = USB_ST_BUF_ERR;
  535. return -1;
  536. }
  537. /* Unpack data from FIFO ram */
  538. cc = unpack_fifo(isp116x, dev, pipe, ptd, 1, buffer, len);
  539. i = PTD_GET_COUNT(ptd);
  540. done += i;
  541. buffer += i;
  542. len -= i;
  543. /* There was some kind of real problem; Prepare the PTD again
  544. * and retry from the failed transaction on
  545. */
  546. if (cc && cc != TD_NOTACCESSED && cc != TD_DATAUNDERRUN) {
  547. if (retries >= 100) {
  548. retries -= 100;
  549. /* The chip will have toggled the toggle bit for the failed
  550. * transaction too. We have to toggle it back.
  551. */
  552. usb_settoggle(dev, epnum, dir_out, !PTD_GET_TOGGLE(ptd));
  553. goto retry;
  554. }
  555. }
  556. /* "Normal" errors; TD_NOTACCESSED would mean in effect that the function have NAKed
  557. * the transactions from the first on for the whole frame. It may be busy and we retry
  558. * with the same PTD. PTD_ACTIVE (and not TD_NOTACCESSED) would mean that some of the
  559. * PTD didn't make it because the function was busy or the frame ended before the PTD
  560. * finished. We prepare the rest of the data and try again.
  561. */
  562. else if (cc == TD_NOTACCESSED || PTD_GET_ACTIVE(ptd) || (cc != TD_DATAUNDERRUN && PTD_GET_COUNT(ptd) < PTD_GET_LEN(ptd))) {
  563. if (retries) {
  564. --retries;
  565. if (cc == TD_NOTACCESSED && PTD_GET_ACTIVE(ptd) && !PTD_GET_COUNT(ptd)) goto retry_same;
  566. usb_settoggle(dev, epnum, dir_out, PTD_GET_TOGGLE(ptd));
  567. goto retry;
  568. }
  569. }
  570. if (cc != TD_CC_NOERROR && cc != TD_DATAUNDERRUN) {
  571. DBG("****** completition code error %x ******", cc);
  572. switch (cc) {
  573. case TD_CC_BITSTUFFING:
  574. dev->status = USB_ST_BIT_ERR;
  575. break;
  576. case TD_CC_STALL:
  577. dev->status = USB_ST_STALLED;
  578. break;
  579. case TD_BUFFEROVERRUN:
  580. case TD_BUFFERUNDERRUN:
  581. dev->status = USB_ST_BUF_ERR;
  582. break;
  583. default:
  584. dev->status = USB_ST_CRC_ERR;
  585. }
  586. return -cc;
  587. }
  588. else usb_settoggle(dev, epnum, dir_out, PTD_GET_TOGGLE(ptd));
  589. dump_msg(dev, pipe, buffer, len, "SUBMIT(ret)");
  590. dev->status = 0;
  591. return done;
  592. }
  593. /* Adapted from au1x00_usb_ohci.c
  594. */
  595. static int isp116x_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
  596. void *buffer, int transfer_len,
  597. struct devrequest *cmd)
  598. {
  599. struct isp116x *isp116x = &isp116x_dev;
  600. u32 tmp = 0;
  601. int leni = transfer_len;
  602. int len = 0;
  603. int stat = 0;
  604. u32 datab[4];
  605. u8 *data_buf = (u8 *) datab;
  606. u16 bmRType_bReq;
  607. u16 wValue;
  608. u16 wIndex;
  609. u16 wLength;
  610. if (usb_pipeint(pipe)) {
  611. INFO("Root-Hub submit IRQ: NOT implemented");
  612. return 0;
  613. }
  614. bmRType_bReq = cmd->requesttype | (cmd->request << 8);
  615. wValue = swap_16(cmd->value);
  616. wIndex = swap_16(cmd->index);
  617. wLength = swap_16(cmd->length);
  618. DBG("--- HUB ----------------------------------------");
  619. DBG("submit rh urb, req=%x val=%#x index=%#x len=%d",
  620. bmRType_bReq, wValue, wIndex, wLength);
  621. dump_msg(dev, pipe, buffer, transfer_len, "RH");
  622. DBG("------------------------------------------------");
  623. switch (bmRType_bReq) {
  624. case RH_GET_STATUS:
  625. DBG("RH_GET_STATUS");
  626. *(__u16 *) data_buf = swap_16(1);
  627. len = 2;
  628. break;
  629. case RH_GET_STATUS | RH_INTERFACE:
  630. DBG("RH_GET_STATUS | RH_INTERFACE");
  631. *(__u16 *) data_buf = swap_16(0);
  632. len = 2;
  633. break;
  634. case RH_GET_STATUS | RH_ENDPOINT:
  635. DBG("RH_GET_STATUS | RH_ENDPOINT");
  636. *(__u16 *) data_buf = swap_16(0);
  637. len = 2;
  638. break;
  639. case RH_GET_STATUS | RH_CLASS:
  640. DBG("RH_GET_STATUS | RH_CLASS");
  641. tmp = isp116x_read_reg32(isp116x, HCRHSTATUS);
  642. *(__u32 *) data_buf = swap_32(tmp & ~(RH_HS_CRWE | RH_HS_DRWE));
  643. len = 4;
  644. break;
  645. case RH_GET_STATUS | RH_OTHER | RH_CLASS:
  646. DBG("RH_GET_STATUS | RH_OTHER | RH_CLASS");
  647. tmp = isp116x_read_reg32(isp116x, HCRHPORT1 + wIndex - 1);
  648. *(__u32 *) data_buf = swap_32(tmp);
  649. isp116x_show_regs(isp116x);
  650. len = 4;
  651. break;
  652. case RH_CLEAR_FEATURE | RH_ENDPOINT:
  653. DBG("RH_CLEAR_FEATURE | RH_ENDPOINT");
  654. switch (wValue) {
  655. case RH_ENDPOINT_STALL:
  656. DBG("C_HUB_ENDPOINT_STALL");
  657. len = 0;
  658. break;
  659. }
  660. break;
  661. case RH_CLEAR_FEATURE | RH_CLASS:
  662. DBG("RH_CLEAR_FEATURE | RH_CLASS");
  663. switch (wValue) {
  664. case RH_C_HUB_LOCAL_POWER:
  665. DBG("C_HUB_LOCAL_POWER");
  666. len = 0;
  667. break;
  668. case RH_C_HUB_OVER_CURRENT:
  669. DBG("C_HUB_OVER_CURRENT");
  670. isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_OCIC);
  671. len = 0;
  672. break;
  673. }
  674. break;
  675. case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
  676. DBG("RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS");
  677. switch (wValue) {
  678. case RH_PORT_ENABLE:
  679. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  680. RH_PS_CCS);
  681. len = 0;
  682. break;
  683. case RH_PORT_SUSPEND:
  684. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  685. RH_PS_POCI);
  686. len = 0;
  687. break;
  688. case RH_PORT_POWER:
  689. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  690. RH_PS_LSDA);
  691. len = 0;
  692. break;
  693. case RH_C_PORT_CONNECTION:
  694. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  695. RH_PS_CSC);
  696. len = 0;
  697. break;
  698. case RH_C_PORT_ENABLE:
  699. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  700. RH_PS_PESC);
  701. len = 0;
  702. break;
  703. case RH_C_PORT_SUSPEND:
  704. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  705. RH_PS_PSSC);
  706. len = 0;
  707. break;
  708. case RH_C_PORT_OVER_CURRENT:
  709. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  710. RH_PS_POCI);
  711. len = 0;
  712. break;
  713. case RH_C_PORT_RESET:
  714. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  715. RH_PS_PRSC);
  716. len = 0;
  717. break;
  718. default:
  719. ERR("invalid wValue");
  720. stat = USB_ST_STALLED;
  721. }
  722. isp116x_show_regs(isp116x);
  723. break;
  724. case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
  725. DBG("RH_SET_FEATURE | RH_OTHER | RH_CLASS");
  726. switch (wValue) {
  727. case RH_PORT_SUSPEND:
  728. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  729. RH_PS_PSS);
  730. len = 0;
  731. break;
  732. case RH_PORT_RESET:
  733. /* Spin until any current reset finishes */
  734. while (1) {
  735. tmp =
  736. isp116x_read_reg32(isp116x,
  737. HCRHPORT1 + wIndex - 1);
  738. if (!(tmp & RH_PS_PRS))
  739. break;
  740. mdelay(1);
  741. }
  742. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  743. RH_PS_PRS);
  744. mdelay(10);
  745. len = 0;
  746. break;
  747. case RH_PORT_POWER:
  748. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  749. RH_PS_PPS);
  750. len = 0;
  751. break;
  752. case RH_PORT_ENABLE:
  753. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  754. RH_PS_PES);
  755. len = 0;
  756. break;
  757. default:
  758. ERR("invalid wValue");
  759. stat = USB_ST_STALLED;
  760. }
  761. isp116x_show_regs(isp116x);
  762. break;
  763. case RH_SET_ADDRESS:
  764. DBG("RH_SET_ADDRESS");
  765. rh_devnum = wValue;
  766. len = 0;
  767. break;
  768. case RH_GET_DESCRIPTOR:
  769. DBG("RH_GET_DESCRIPTOR: %x, %d", wValue, wLength);
  770. switch (wValue) {
  771. case (USB_DT_DEVICE << 8): /* device descriptor */
  772. len = min_t(unsigned int,
  773. leni, min_t(unsigned int,
  774. sizeof(root_hub_dev_des),
  775. wLength));
  776. data_buf = root_hub_dev_des;
  777. break;
  778. case (USB_DT_CONFIG << 8): /* configuration descriptor */
  779. len = min_t(unsigned int,
  780. leni, min_t(unsigned int,
  781. sizeof(root_hub_config_des),
  782. wLength));
  783. data_buf = root_hub_config_des;
  784. break;
  785. case ((USB_DT_STRING << 8) | 0x00): /* string 0 descriptors */
  786. len = min_t(unsigned int,
  787. leni, min_t(unsigned int,
  788. sizeof(root_hub_str_index0),
  789. wLength));
  790. data_buf = root_hub_str_index0;
  791. break;
  792. case ((USB_DT_STRING << 8) | 0x01): /* string 1 descriptors */
  793. len = min_t(unsigned int,
  794. leni, min_t(unsigned int,
  795. sizeof(root_hub_str_index1),
  796. wLength));
  797. data_buf = root_hub_str_index1;
  798. break;
  799. default:
  800. ERR("invalid wValue");
  801. stat = USB_ST_STALLED;
  802. }
  803. break;
  804. case RH_GET_DESCRIPTOR | RH_CLASS:
  805. DBG("RH_GET_DESCRIPTOR | RH_CLASS");
  806. tmp = isp116x_read_reg32(isp116x, HCRHDESCA);
  807. data_buf[0] = 0x09; /* min length; */
  808. data_buf[1] = 0x29;
  809. data_buf[2] = tmp & RH_A_NDP;
  810. data_buf[3] = 0;
  811. if (tmp & RH_A_PSM) /* per-port power switching? */
  812. data_buf[3] |= 0x01;
  813. if (tmp & RH_A_NOCP) /* no overcurrent reporting? */
  814. data_buf[3] |= 0x10;
  815. else if (tmp & RH_A_OCPM) /* per-port overcurrent rep? */
  816. data_buf[3] |= 0x08;
  817. /* Corresponds to data_buf[4-7] */
  818. datab[1] = 0;
  819. data_buf[5] = (tmp & RH_A_POTPGT) >> 24;
  820. tmp = isp116x_read_reg32(isp116x, HCRHDESCB);
  821. data_buf[7] = tmp & RH_B_DR;
  822. if (data_buf[2] < 7)
  823. data_buf[8] = 0xff;
  824. else {
  825. data_buf[0] += 2;
  826. data_buf[8] = (tmp & RH_B_DR) >> 8;
  827. data_buf[10] = data_buf[9] = 0xff;
  828. }
  829. len = min_t(unsigned int, leni,
  830. min_t(unsigned int, data_buf[0], wLength));
  831. break;
  832. case RH_GET_CONFIGURATION:
  833. DBG("RH_GET_CONFIGURATION");
  834. *(__u8 *) data_buf = 0x01;
  835. len = 1;
  836. break;
  837. case RH_SET_CONFIGURATION:
  838. DBG("RH_SET_CONFIGURATION");
  839. isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_LPSC);
  840. len = 0;
  841. break;
  842. default:
  843. ERR("*** *** *** unsupported root hub command *** *** ***");
  844. stat = USB_ST_STALLED;
  845. }
  846. len = min_t(int, len, leni);
  847. if (buffer != data_buf)
  848. memcpy(buffer, data_buf, len);
  849. dev->act_len = len;
  850. dev->status = stat;
  851. DBG("dev act_len %d, status %d", dev->act_len, dev->status);
  852. dump_msg(dev, pipe, buffer, transfer_len, "RH(ret)");
  853. return stat;
  854. }
  855. /* --- Transfer functions -------------------------------------------------- */
  856. int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  857. int len, int interval)
  858. {
  859. DBG("dev=%p pipe=%#lx buf=%p size=%d int=%d",
  860. dev, pipe, buffer, len, interval);
  861. return -1;
  862. }
  863. int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  864. int len, struct devrequest *setup)
  865. {
  866. int devnum = usb_pipedevice(pipe);
  867. int epnum = usb_pipeendpoint(pipe);
  868. int max = max_transfer_len(dev, pipe);
  869. int dir_in = usb_pipein(pipe);
  870. int done, ret;
  871. /* Control message is for the HUB? */
  872. if (devnum == rh_devnum)
  873. return isp116x_submit_rh_msg(dev, pipe, buffer, len, setup);
  874. /* Ok, no HUB message so send the message to the device */
  875. /* Setup phase */
  876. DBG("--- SETUP PHASE --------------------------------");
  877. usb_settoggle(dev, epnum, 1, 0);
  878. ret = isp116x_submit_job(dev, pipe,
  879. PTD_DIR_SETUP,
  880. setup, sizeof(struct devrequest));
  881. if (ret < 0) {
  882. DBG("control setup phase error (ret = %d", ret);
  883. return -1;
  884. }
  885. /* Data phase */
  886. DBG("--- DATA PHASE ---------------------------------");
  887. done = 0;
  888. usb_settoggle(dev, epnum, !dir_in, 1);
  889. while (done < len) {
  890. ret = isp116x_submit_job(dev, pipe,
  891. dir_in ? PTD_DIR_IN : PTD_DIR_OUT,
  892. (__u8 *) buffer + done,
  893. max > len - done ? len - done : max);
  894. if (ret < 0) {
  895. DBG("control data phase error (ret = %d)", ret);
  896. return -1;
  897. }
  898. done += ret;
  899. if (dir_in && ret < max) /* short packet */
  900. break;
  901. }
  902. /* Status phase */
  903. DBG("--- STATUS PHASE -------------------------------");
  904. usb_settoggle(dev, epnum, !dir_in, 1);
  905. ret = isp116x_submit_job(dev, pipe,
  906. !dir_in ? PTD_DIR_IN : PTD_DIR_OUT, NULL, 0);
  907. if (ret < 0) {
  908. DBG("control status phase error (ret = %d", ret);
  909. return -1;
  910. }
  911. dev->act_len = done;
  912. dump_msg(dev, pipe, buffer, len, "DEV(ret)");
  913. return done;
  914. }
  915. int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  916. int len)
  917. {
  918. int dir_out = usb_pipeout(pipe);
  919. int max = max_transfer_len(dev, pipe);
  920. int done, ret;
  921. DBG("--- BULK ---------------------------------------");
  922. DBG("dev=%ld pipe=%ld buf=%p size=%d dir_out=%d",
  923. usb_pipedevice(pipe), usb_pipeendpoint(pipe), buffer, len, dir_out);
  924. done = 0;
  925. while (done < len) {
  926. ret = isp116x_submit_job(dev, pipe,
  927. !dir_out ? PTD_DIR_IN : PTD_DIR_OUT,
  928. (__u8 *) buffer + done,
  929. max > len - done ? len - done : max);
  930. if (ret < 0) {
  931. DBG("error on bulk message (ret = %d)", ret);
  932. return -1;
  933. }
  934. done += ret;
  935. if (!dir_out && ret < max) /* short packet */
  936. break;
  937. }
  938. dev->act_len = done;
  939. return 0;
  940. }
  941. /* --- Basic functions ----------------------------------------------------- */
  942. static int isp116x_sw_reset(struct isp116x *isp116x)
  943. {
  944. int retries = 15;
  945. int ret = 0;
  946. DBG("");
  947. isp116x->disabled = 1;
  948. isp116x_write_reg16(isp116x, HCSWRES, HCSWRES_MAGIC);
  949. isp116x_write_reg32(isp116x, HCCMDSTAT, HCCMDSTAT_HCR);
  950. while (--retries) {
  951. /* It usually resets within 1 ms */
  952. mdelay(1);
  953. if (!(isp116x_read_reg32(isp116x, HCCMDSTAT) & HCCMDSTAT_HCR))
  954. break;
  955. }
  956. if (!retries) {
  957. ERR("software reset timeout");
  958. ret = -1;
  959. }
  960. return ret;
  961. }
  962. static int isp116x_reset(struct isp116x *isp116x)
  963. {
  964. unsigned long t;
  965. u16 clkrdy = 0;
  966. int ret, timeout = 15 /* ms */ ;
  967. DBG("");
  968. ret = isp116x_sw_reset(isp116x);
  969. if (ret)
  970. return ret;
  971. for (t = 0; t < timeout; t++) {
  972. clkrdy = isp116x_read_reg16(isp116x, HCuPINT) & HCuPINT_CLKRDY;
  973. if (clkrdy)
  974. break;
  975. mdelay(1);
  976. }
  977. if (!clkrdy) {
  978. ERR("clock not ready after %dms", timeout);
  979. /* After sw_reset the clock won't report to be ready, if
  980. H_WAKEUP pin is high. */
  981. ERR("please make sure that the H_WAKEUP pin is pulled low!");
  982. ret = -1;
  983. }
  984. return ret;
  985. }
  986. static void isp116x_stop(struct isp116x *isp116x)
  987. {
  988. u32 val;
  989. DBG("");
  990. isp116x_write_reg16(isp116x, HCuPINTENB, 0);
  991. /* Switch off ports' power, some devices don't come up
  992. after next 'start' without this */
  993. val = isp116x_read_reg32(isp116x, HCRHDESCA);
  994. val &= ~(RH_A_NPS | RH_A_PSM);
  995. isp116x_write_reg32(isp116x, HCRHDESCA, val);
  996. isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_LPS);
  997. isp116x_sw_reset(isp116x);
  998. }
  999. /*
  1000. * Configure the chip. The chip must be successfully reset by now.
  1001. */
  1002. static int isp116x_start(struct isp116x *isp116x)
  1003. {
  1004. struct isp116x_platform_data *board = isp116x->board;
  1005. u32 val;
  1006. DBG("");
  1007. /* Clear interrupt status and disable all interrupt sources */
  1008. isp116x_write_reg16(isp116x, HCuPINT, 0xff);
  1009. isp116x_write_reg16(isp116x, HCuPINTENB, 0);
  1010. isp116x_write_reg16(isp116x, HCITLBUFLEN, ISP116x_ITL_BUFSIZE);
  1011. isp116x_write_reg16(isp116x, HCATLBUFLEN, ISP116x_ATL_BUFSIZE);
  1012. /* Hardware configuration */
  1013. val = HCHWCFG_DBWIDTH(1);
  1014. if (board->sel15Kres)
  1015. val |= HCHWCFG_15KRSEL;
  1016. /* Remote wakeup won't work without working clock */
  1017. if (board->remote_wakeup_enable)
  1018. val |= HCHWCFG_CLKNOTSTOP;
  1019. if (board->oc_enable)
  1020. val |= HCHWCFG_ANALOG_OC;
  1021. isp116x_write_reg16(isp116x, HCHWCFG, val);
  1022. /* --- Root hub configuration */
  1023. val = (25 << 24) & RH_A_POTPGT;
  1024. /* AN10003_1.pdf recommends RH_A_NPS (no power switching) to
  1025. be always set. Yet, instead, we request individual port
  1026. power switching. */
  1027. val |= RH_A_PSM;
  1028. /* Report overcurrent per port */
  1029. val |= RH_A_OCPM;
  1030. isp116x_write_reg32(isp116x, HCRHDESCA, val);
  1031. isp116x->rhdesca = isp116x_read_reg32(isp116x, HCRHDESCA);
  1032. val = RH_B_PPCM;
  1033. isp116x_write_reg32(isp116x, HCRHDESCB, val);
  1034. isp116x->rhdescb = isp116x_read_reg32(isp116x, HCRHDESCB);
  1035. val = 0;
  1036. if (board->remote_wakeup_enable)
  1037. val |= RH_HS_DRWE;
  1038. isp116x_write_reg32(isp116x, HCRHSTATUS, val);
  1039. isp116x->rhstatus = isp116x_read_reg32(isp116x, HCRHSTATUS);
  1040. isp116x_write_reg32(isp116x, HCFMINTVL, 0x27782edf);
  1041. /* Go operational */
  1042. val = HCCONTROL_USB_OPER;
  1043. if (board->remote_wakeup_enable)
  1044. val |= HCCONTROL_RWE;
  1045. isp116x_write_reg32(isp116x, HCCONTROL, val);
  1046. /* Disable ports to avoid race in device enumeration */
  1047. isp116x_write_reg32(isp116x, HCRHPORT1, RH_PS_CCS);
  1048. isp116x_write_reg32(isp116x, HCRHPORT2, RH_PS_CCS);
  1049. isp116x_show_regs(isp116x);
  1050. isp116x->disabled = 0;
  1051. return 0;
  1052. }
  1053. /* --- Init functions ------------------------------------------------------ */
  1054. int isp116x_check_id(struct isp116x *isp116x)
  1055. {
  1056. int val;
  1057. val = isp116x_read_reg16(isp116x, HCCHIPID);
  1058. if ((val & HCCHIPID_MASK) != HCCHIPID_MAGIC) {
  1059. ERR("invalid chip ID %04x", val);
  1060. return -1;
  1061. }
  1062. return 0;
  1063. }
  1064. int usb_lowlevel_init(int index, enum usb_init_type init, void **controller))
  1065. {
  1066. struct isp116x *isp116x = &isp116x_dev;
  1067. DBG("");
  1068. got_rhsc = rh_devnum = 0;
  1069. /* Init device registers addr */
  1070. isp116x->addr_reg = (u16 *) ISP116X_HCD_ADDR;
  1071. isp116x->data_reg = (u16 *) ISP116X_HCD_DATA;
  1072. /* Setup specific board settings */
  1073. #ifdef ISP116X_HCD_SEL15kRES
  1074. isp116x_board.sel15Kres = 1;
  1075. #endif
  1076. #ifdef ISP116X_HCD_OC_ENABLE
  1077. isp116x_board.oc_enable = 1;
  1078. #endif
  1079. #ifdef ISP116X_HCD_REMOTE_WAKEUP_ENABLE
  1080. isp116x_board.remote_wakeup_enable = 1;
  1081. #endif
  1082. isp116x->board = &isp116x_board;
  1083. /* Try to get ISP116x silicon chip ID */
  1084. if (isp116x_check_id(isp116x) < 0)
  1085. return -1;
  1086. isp116x->disabled = 1;
  1087. isp116x->sleeping = 0;
  1088. isp116x_reset(isp116x);
  1089. isp116x_start(isp116x);
  1090. return 0;
  1091. }
  1092. int usb_lowlevel_stop(int index)
  1093. {
  1094. struct isp116x *isp116x = &isp116x_dev;
  1095. DBG("");
  1096. if (!isp116x->disabled)
  1097. isp116x_stop(isp116x);
  1098. return 0;
  1099. }