tpm_tis_i2c.c 15 KB

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  1. /*
  2. * Copyright (C) 2011 Infineon Technologies
  3. *
  4. * Authors:
  5. * Peter Huewe <huewe.external@infineon.com>
  6. *
  7. * Description:
  8. * Device driver for TCG/TCPA TPM (trusted platform module).
  9. * Specifications at www.trustedcomputinggroup.org
  10. *
  11. * This device driver implements the TPM interface as defined in
  12. * the TCG TPM Interface Spec version 1.2, revision 1.0 and the
  13. * Infineon I2C Protocol Stack Specification v0.20.
  14. *
  15. * It is based on the Linux kernel driver tpm.c from Leendert van
  16. * Dorn, Dave Safford, Reiner Sailer, and Kyleen Hall.
  17. *
  18. * Version: 2.1.1
  19. *
  20. * See file CREDITS for list of people who contributed to this
  21. * project.
  22. *
  23. * This program is free software; you can redistribute it and/or
  24. * modify it under the terms of the GNU General Public License as
  25. * published by the Free Software Foundation, version 2 of the
  26. * License.
  27. *
  28. * This program is distributed in the hope that it will be useful,
  29. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  30. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  31. * GNU General Public License for more details.
  32. *
  33. * You should have received a copy of the GNU General Public License
  34. * along with this program; if not, write to the Free Software
  35. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  36. * MA 02111-1307 USA
  37. */
  38. #include <common.h>
  39. #include <fdtdec.h>
  40. #include <compiler.h>
  41. #include <i2c.h>
  42. #include <tpm.h>
  43. #include <asm-generic/errno.h>
  44. #include <linux/types.h>
  45. #include <linux/unaligned/be_byteshift.h>
  46. #include "tpm_private.h"
  47. DECLARE_GLOBAL_DATA_PTR;
  48. /* Address of the TPM on the I2C bus */
  49. #define TPM_I2C_ADDR 0x20
  50. /* Max buffer size supported by our tpm */
  51. #define TPM_DEV_BUFSIZE 1260
  52. /* Max number of iterations after i2c NAK */
  53. #define MAX_COUNT 3
  54. /*
  55. * Max number of iterations after i2c NAK for 'long' commands
  56. *
  57. * We need this especially for sending TPM_READY, since the cleanup after the
  58. * transtion to the ready state may take some time, but it is unpredictable
  59. * how long it will take.
  60. */
  61. #define MAX_COUNT_LONG 50
  62. #define SLEEP_DURATION 60 /* in usec */
  63. #define SLEEP_DURATION_LONG 210 /* in usec */
  64. #define TPM_HEADER_SIZE 10
  65. /*
  66. * Expected value for DIDVID register
  67. *
  68. * The only device the system knows about at this moment is Infineon slb9635.
  69. */
  70. #define TPM_TIS_I2C_DID_VID 0x000b15d1L
  71. enum tis_access {
  72. TPM_ACCESS_VALID = 0x80,
  73. TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
  74. TPM_ACCESS_REQUEST_PENDING = 0x04,
  75. TPM_ACCESS_REQUEST_USE = 0x02,
  76. };
  77. enum tis_status {
  78. TPM_STS_VALID = 0x80,
  79. TPM_STS_COMMAND_READY = 0x40,
  80. TPM_STS_GO = 0x20,
  81. TPM_STS_DATA_AVAIL = 0x10,
  82. TPM_STS_DATA_EXPECT = 0x08,
  83. };
  84. enum tis_defaults {
  85. TIS_SHORT_TIMEOUT = 750, /* ms */
  86. TIS_LONG_TIMEOUT = 2000, /* ms */
  87. };
  88. /* expected value for DIDVID register */
  89. #define TPM_TIS_I2C_DID_VID_9635 0x000b15d1L
  90. #define TPM_TIS_I2C_DID_VID_9645 0x001a15d1L
  91. enum i2c_chip_type {
  92. SLB9635,
  93. SLB9645,
  94. UNKNOWN,
  95. };
  96. static const char * const chip_name[] = {
  97. [SLB9635] = "slb9635tt",
  98. [SLB9645] = "slb9645tt",
  99. [UNKNOWN] = "unknown/fallback to slb9635",
  100. };
  101. #define TPM_ACCESS(l) (0x0000 | ((l) << 4))
  102. #define TPM_STS(l) (0x0001 | ((l) << 4))
  103. #define TPM_DATA_FIFO(l) (0x0005 | ((l) << 4))
  104. #define TPM_DID_VID(l) (0x0006 | ((l) << 4))
  105. /* Structure to store I2C TPM specific stuff */
  106. struct tpm_dev {
  107. uint addr;
  108. u8 buf[TPM_DEV_BUFSIZE + sizeof(u8)]; /* Max buffer size + addr */
  109. enum i2c_chip_type chip_type;
  110. };
  111. static struct tpm_dev tpm_dev = {
  112. .addr = TPM_I2C_ADDR
  113. };
  114. static struct tpm_dev tpm_dev;
  115. /*
  116. * iic_tpm_read() - read from TPM register
  117. * @addr: register address to read from
  118. * @buffer: provided by caller
  119. * @len: number of bytes to read
  120. *
  121. * Read len bytes from TPM register and put them into
  122. * buffer (little-endian format, i.e. first byte is put into buffer[0]).
  123. *
  124. * NOTE: TPM is big-endian for multi-byte values. Multi-byte
  125. * values have to be swapped.
  126. *
  127. * Return -EIO on error, 0 on success.
  128. */
  129. static int iic_tpm_read(u8 addr, u8 *buffer, size_t len)
  130. {
  131. int rc;
  132. int count;
  133. uint32_t addrbuf = addr;
  134. if ((tpm_dev.chip_type == SLB9635) || (tpm_dev.chip_type == UNKNOWN)) {
  135. /* slb9635 protocol should work in both cases */
  136. for (count = 0; count < MAX_COUNT; count++) {
  137. rc = i2c_write(tpm_dev.addr, 0, 0,
  138. (uchar *)&addrbuf, 1);
  139. if (rc == 0)
  140. break; /* Success, break to skip sleep */
  141. udelay(SLEEP_DURATION);
  142. }
  143. if (rc)
  144. return -rc;
  145. /* After the TPM has successfully received the register address
  146. * it needs some time, thus we're sleeping here again, before
  147. * retrieving the data
  148. */
  149. for (count = 0; count < MAX_COUNT; count++) {
  150. udelay(SLEEP_DURATION);
  151. rc = i2c_read(tpm_dev.addr, 0, 0, buffer, len);
  152. if (rc == 0)
  153. break; /* success, break to skip sleep */
  154. }
  155. } else {
  156. /*
  157. * Use a combined read for newer chips.
  158. * Unfortunately the smbus functions are not suitable due to
  159. * the 32 byte limit of the smbus.
  160. * Retries should usually not be needed, but are kept just to
  161. * be safe on the safe side.
  162. */
  163. for (count = 0; count < MAX_COUNT; count++) {
  164. rc = i2c_read(tpm_dev.addr, addr, 1, buffer, len);
  165. if (rc == 0)
  166. break; /* break here to skip sleep */
  167. udelay(SLEEP_DURATION);
  168. }
  169. }
  170. /* Take care of 'guard time' */
  171. udelay(SLEEP_DURATION);
  172. if (rc)
  173. return -rc;
  174. return 0;
  175. }
  176. static int iic_tpm_write_generic(u8 addr, u8 *buffer, size_t len,
  177. unsigned int sleep_time, u8 max_count)
  178. {
  179. int rc = 0;
  180. int count;
  181. /* Prepare send buffer */
  182. tpm_dev.buf[0] = addr;
  183. memcpy(&(tpm_dev.buf[1]), buffer, len);
  184. for (count = 0; count < max_count; count++) {
  185. rc = i2c_write(tpm_dev.addr, 0, 0, tpm_dev.buf, len + 1);
  186. if (rc == 0)
  187. break; /* Success, break to skip sleep */
  188. udelay(sleep_time);
  189. }
  190. /* take care of 'guard time' */
  191. udelay(SLEEP_DURATION);
  192. if (rc)
  193. return -rc;
  194. return 0;
  195. }
  196. /*
  197. * iic_tpm_write() - write to TPM register
  198. * @addr: register address to write to
  199. * @buffer: containing data to be written
  200. * @len: number of bytes to write
  201. *
  202. * Write len bytes from provided buffer to TPM register (little
  203. * endian format, i.e. buffer[0] is written as first byte).
  204. *
  205. * NOTE: TPM is big-endian for multi-byte values. Multi-byte
  206. * values have to be swapped.
  207. *
  208. * NOTE: use this function instead of the iic_tpm_write_generic function.
  209. *
  210. * Return -EIO on error, 0 on success
  211. */
  212. static int iic_tpm_write(u8 addr, u8 *buffer, size_t len)
  213. {
  214. return iic_tpm_write_generic(addr, buffer, len, SLEEP_DURATION,
  215. MAX_COUNT);
  216. }
  217. /*
  218. * This function is needed especially for the cleanup situation after
  219. * sending TPM_READY
  220. */
  221. static int iic_tpm_write_long(u8 addr, u8 *buffer, size_t len)
  222. {
  223. return iic_tpm_write_generic(addr, buffer, len, SLEEP_DURATION_LONG,
  224. MAX_COUNT_LONG);
  225. }
  226. static int check_locality(struct tpm_chip *chip, int loc)
  227. {
  228. const u8 mask = TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID;
  229. u8 buf;
  230. int rc;
  231. rc = iic_tpm_read(TPM_ACCESS(loc), &buf, 1);
  232. if (rc < 0)
  233. return rc;
  234. if ((buf & mask) == mask) {
  235. chip->vendor.locality = loc;
  236. return loc;
  237. }
  238. return -1;
  239. }
  240. static void release_locality(struct tpm_chip *chip, int loc, int force)
  241. {
  242. const u8 mask = TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID;
  243. u8 buf;
  244. if (iic_tpm_read(TPM_ACCESS(loc), &buf, 1) < 0)
  245. return;
  246. if (force || (buf & mask) == mask) {
  247. buf = TPM_ACCESS_ACTIVE_LOCALITY;
  248. iic_tpm_write(TPM_ACCESS(loc), &buf, 1);
  249. }
  250. }
  251. static int request_locality(struct tpm_chip *chip, int loc)
  252. {
  253. unsigned long start, stop;
  254. u8 buf = TPM_ACCESS_REQUEST_USE;
  255. if (check_locality(chip, loc) >= 0)
  256. return loc; /* We already have the locality */
  257. iic_tpm_write(TPM_ACCESS(loc), &buf, 1);
  258. /* Wait for burstcount */
  259. start = get_timer(0);
  260. stop = chip->vendor.timeout_a;
  261. do {
  262. if (check_locality(chip, loc) >= 0)
  263. return loc;
  264. udelay(TPM_TIMEOUT * 1000);
  265. } while (get_timer(start) < stop);
  266. return -1;
  267. }
  268. static u8 tpm_tis_i2c_status(struct tpm_chip *chip)
  269. {
  270. /* NOTE: Since i2c read may fail, return 0 in this case --> time-out */
  271. u8 buf;
  272. if (iic_tpm_read(TPM_STS(chip->vendor.locality), &buf, 1) < 0)
  273. return 0;
  274. else
  275. return buf;
  276. }
  277. static void tpm_tis_i2c_ready(struct tpm_chip *chip)
  278. {
  279. /* This causes the current command to be aborted */
  280. u8 buf = TPM_STS_COMMAND_READY;
  281. iic_tpm_write_long(TPM_STS(chip->vendor.locality), &buf, 1);
  282. }
  283. static ssize_t get_burstcount(struct tpm_chip *chip)
  284. {
  285. unsigned long start, stop;
  286. ssize_t burstcnt;
  287. u8 addr, buf[3];
  288. /* Wait for burstcount */
  289. /* XXX: Which timeout value? Spec has 2 answers (c & d) */
  290. start = get_timer(0);
  291. stop = chip->vendor.timeout_d;
  292. do {
  293. /* Note: STS is little endian */
  294. addr = TPM_STS(chip->vendor.locality) + 1;
  295. if (iic_tpm_read(addr, buf, 3) < 0)
  296. burstcnt = 0;
  297. else
  298. burstcnt = (buf[2] << 16) + (buf[1] << 8) + buf[0];
  299. if (burstcnt)
  300. return burstcnt;
  301. udelay(TPM_TIMEOUT * 1000);
  302. } while (get_timer(start) < stop);
  303. return -EBUSY;
  304. }
  305. static int wait_for_stat(struct tpm_chip *chip, u8 mask, unsigned long timeout,
  306. int *status)
  307. {
  308. unsigned long start, stop;
  309. /* Check current status */
  310. *status = tpm_tis_i2c_status(chip);
  311. if ((*status & mask) == mask)
  312. return 0;
  313. start = get_timer(0);
  314. stop = timeout;
  315. do {
  316. udelay(TPM_TIMEOUT * 1000);
  317. *status = tpm_tis_i2c_status(chip);
  318. if ((*status & mask) == mask)
  319. return 0;
  320. } while (get_timer(start) < stop);
  321. return -ETIME;
  322. }
  323. static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
  324. {
  325. size_t size = 0;
  326. ssize_t burstcnt;
  327. int rc;
  328. while (size < count) {
  329. burstcnt = get_burstcount(chip);
  330. /* burstcount < 0 -> tpm is busy */
  331. if (burstcnt < 0)
  332. return burstcnt;
  333. /* Limit received data to max left */
  334. if (burstcnt > (count - size))
  335. burstcnt = count - size;
  336. rc = iic_tpm_read(TPM_DATA_FIFO(chip->vendor.locality),
  337. &(buf[size]), burstcnt);
  338. if (rc == 0)
  339. size += burstcnt;
  340. }
  341. return size;
  342. }
  343. static int tpm_tis_i2c_recv(struct tpm_chip *chip, u8 *buf, size_t count)
  344. {
  345. int size = 0;
  346. int expected, status;
  347. if (count < TPM_HEADER_SIZE) {
  348. size = -EIO;
  349. goto out;
  350. }
  351. /* Read first 10 bytes, including tag, paramsize, and result */
  352. size = recv_data(chip, buf, TPM_HEADER_SIZE);
  353. if (size < TPM_HEADER_SIZE) {
  354. error("Unable to read header\n");
  355. goto out;
  356. }
  357. expected = get_unaligned_be32(buf + TPM_RSP_SIZE_BYTE);
  358. if ((size_t)expected > count) {
  359. size = -EIO;
  360. goto out;
  361. }
  362. size += recv_data(chip, &buf[TPM_HEADER_SIZE],
  363. expected - TPM_HEADER_SIZE);
  364. if (size < expected) {
  365. error("Unable to read remainder of result\n");
  366. size = -ETIME;
  367. goto out;
  368. }
  369. wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, &status);
  370. if (status & TPM_STS_DATA_AVAIL) { /* Retry? */
  371. error("Error left over data\n");
  372. size = -EIO;
  373. goto out;
  374. }
  375. out:
  376. tpm_tis_i2c_ready(chip);
  377. /*
  378. * The TPM needs some time to clean up here,
  379. * so we sleep rather than keeping the bus busy
  380. */
  381. udelay(2000);
  382. release_locality(chip, chip->vendor.locality, 0);
  383. return size;
  384. }
  385. static int tpm_tis_i2c_send(struct tpm_chip *chip, u8 *buf, size_t len)
  386. {
  387. int rc, status;
  388. ssize_t burstcnt;
  389. size_t count = 0;
  390. int retry = 0;
  391. u8 sts = TPM_STS_GO;
  392. if (len > TPM_DEV_BUFSIZE)
  393. return -E2BIG; /* Command is too long for our tpm, sorry */
  394. if (request_locality(chip, 0) < 0)
  395. return -EBUSY;
  396. status = tpm_tis_i2c_status(chip);
  397. if ((status & TPM_STS_COMMAND_READY) == 0) {
  398. tpm_tis_i2c_ready(chip);
  399. if (wait_for_stat(chip, TPM_STS_COMMAND_READY,
  400. chip->vendor.timeout_b, &status) < 0) {
  401. rc = -ETIME;
  402. goto out_err;
  403. }
  404. }
  405. burstcnt = get_burstcount(chip);
  406. /* burstcount < 0 -> tpm is busy */
  407. if (burstcnt < 0)
  408. return burstcnt;
  409. while (count < len - 1) {
  410. if (burstcnt > len - 1 - count)
  411. burstcnt = len - 1 - count;
  412. #ifdef CONFIG_TPM_TIS_I2C_BURST_LIMITATION
  413. if (retry && burstcnt > CONFIG_TPM_TIS_I2C_BURST_LIMITATION)
  414. burstcnt = CONFIG_TPM_TIS_I2C_BURST_LIMITATION;
  415. #endif /* CONFIG_TPM_TIS_I2C_BURST_LIMITATION */
  416. rc = iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality),
  417. &(buf[count]), burstcnt);
  418. if (rc == 0)
  419. count += burstcnt;
  420. else {
  421. retry++;
  422. wait_for_stat(chip, TPM_STS_VALID,
  423. chip->vendor.timeout_c, &status);
  424. if ((status & TPM_STS_DATA_EXPECT) == 0) {
  425. rc = -EIO;
  426. goto out_err;
  427. }
  428. }
  429. }
  430. /* Write last byte */
  431. iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality), &(buf[count]), 1);
  432. wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, &status);
  433. if ((status & TPM_STS_DATA_EXPECT) != 0) {
  434. rc = -EIO;
  435. goto out_err;
  436. }
  437. /* Go and do it */
  438. iic_tpm_write(TPM_STS(chip->vendor.locality), &sts, 1);
  439. return len;
  440. out_err:
  441. tpm_tis_i2c_ready(chip);
  442. /*
  443. * The TPM needs some time to clean up here,
  444. * so we sleep rather than keeping the bus busy
  445. */
  446. udelay(2000);
  447. release_locality(chip, chip->vendor.locality, 0);
  448. return rc;
  449. }
  450. static struct tpm_vendor_specific tpm_tis_i2c = {
  451. .status = tpm_tis_i2c_status,
  452. .recv = tpm_tis_i2c_recv,
  453. .send = tpm_tis_i2c_send,
  454. .cancel = tpm_tis_i2c_ready,
  455. .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  456. .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  457. .req_canceled = TPM_STS_COMMAND_READY,
  458. };
  459. static enum i2c_chip_type tpm_vendor_chip_type(void)
  460. {
  461. #ifdef CONFIG_OF_CONTROL
  462. const void *blob = gd->fdt_blob;
  463. if (fdtdec_next_compatible(blob, 0, COMPAT_INFINEON_SLB9645_TPM) >= 0)
  464. return SLB9645;
  465. if (fdtdec_next_compatible(blob, 0, COMPAT_INFINEON_SLB9635_TPM) >= 0)
  466. return SLB9635;
  467. #endif
  468. return UNKNOWN;
  469. }
  470. /* Initialisation of i2c tpm */
  471. int tpm_vendor_init(uint32_t dev_addr)
  472. {
  473. u32 vendor;
  474. u32 expected_did_vid;
  475. uint old_addr;
  476. int rc = 0;
  477. struct tpm_chip *chip;
  478. old_addr = tpm_dev.addr;
  479. if (dev_addr != 0)
  480. tpm_dev.addr = dev_addr;
  481. tpm_dev.chip_type = tpm_vendor_chip_type();
  482. chip = tpm_register_hardware(&tpm_tis_i2c);
  483. if (chip < 0) {
  484. rc = -ENODEV;
  485. goto out_err;
  486. }
  487. /* Disable interrupts (not supported) */
  488. chip->vendor.irq = 0;
  489. /* Default timeouts */
  490. chip->vendor.timeout_a = TIS_SHORT_TIMEOUT;
  491. chip->vendor.timeout_b = TIS_LONG_TIMEOUT;
  492. chip->vendor.timeout_c = TIS_SHORT_TIMEOUT;
  493. chip->vendor.timeout_d = TIS_SHORT_TIMEOUT;
  494. if (request_locality(chip, 0) < 0) {
  495. rc = -ENODEV;
  496. goto out_err;
  497. }
  498. /* Read four bytes from DID_VID register */
  499. if (iic_tpm_read(TPM_DID_VID(0), (uchar *)&vendor, 4) < 0) {
  500. rc = -EIO;
  501. goto out_release;
  502. }
  503. if (tpm_dev.chip_type == SLB9635) {
  504. vendor = be32_to_cpu(vendor);
  505. expected_did_vid = TPM_TIS_I2C_DID_VID_9635;
  506. } else {
  507. /* device id and byte order has changed for newer i2c tpms */
  508. expected_did_vid = TPM_TIS_I2C_DID_VID_9645;
  509. }
  510. if (tpm_dev.chip_type != UNKNOWN && vendor != expected_did_vid) {
  511. error("Vendor id did not match! ID was %08x\n", vendor);
  512. rc = -ENODEV;
  513. goto out_release;
  514. }
  515. debug("1.2 TPM (chip type %s device-id 0x%X)\n",
  516. chip_name[tpm_dev.chip_type], vendor >> 16);
  517. /*
  518. * A timeout query to TPM can be placed here.
  519. * Standard timeout values are used so far
  520. */
  521. return 0;
  522. out_release:
  523. release_locality(chip, 0, 1);
  524. out_err:
  525. tpm_dev.addr = old_addr;
  526. return rc;
  527. }
  528. void tpm_vendor_cleanup(struct tpm_chip *chip)
  529. {
  530. release_locality(chip, chip->vendor.locality, 1);
  531. }