fsl_corenet_serdes.h 634 B

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  1. /*
  2. * Copyright 2009-2010 Freescale Semiconductor, Inc.
  3. *
  4. * Author: Roy Zang <tie-fei.zang@freescale.com>
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #ifndef __FSL_CORENET_SERDES_H
  9. #define __FSL_CORENET_SERDES_H
  10. enum srds_bank {
  11. FSL_SRDS_BANK_1 = 0,
  12. FSL_SRDS_BANK_2 = 1,
  13. FSL_SRDS_BANK_3 = 2,
  14. };
  15. int is_serdes_prtcl_valid(u32 prtcl);
  16. int serdes_get_lane_idx(int lane);
  17. int serdes_get_bank_by_lane(int lane);
  18. int serdes_lane_enabled(int lane);
  19. enum srds_prtcl serdes_get_prtcl(int cfg, int lane);
  20. #ifdef CONFIG_SYS_P4080_ERRATUM_SERDES8
  21. extern uint16_t srds_lpd_b[SRDS_MAX_BANK];
  22. #endif
  23. #endif /* __FSL_CORENET_SERDES_H */