spl.c 2.6 KB

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  1. /*
  2. * Copyright (C) 2013 Atmel Corporation
  3. * Bo Shen <voice.shen@atmel.com>
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include <common.h>
  8. #include <asm/io.h>
  9. #include <asm/arch/at91_common.h>
  10. #include <asm/arch/at91_pmc.h>
  11. #include <asm/arch/at91_wdt.h>
  12. #include <asm/arch/clk.h>
  13. #include <spl.h>
  14. static void at91_disable_wdt(void)
  15. {
  16. struct at91_wdt *wdt = (struct at91_wdt *)ATMEL_BASE_WDT;
  17. writel(AT91_WDT_MR_WDDIS, &wdt->mr);
  18. }
  19. static void switch_to_main_crystal_osc(void)
  20. {
  21. struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  22. u32 tmp;
  23. tmp = readl(&pmc->mor);
  24. tmp &= ~AT91_PMC_MOR_OSCOUNT(0xff);
  25. tmp &= ~AT91_PMC_MOR_KEY(0xff);
  26. tmp |= AT91_PMC_MOR_MOSCEN;
  27. tmp |= AT91_PMC_MOR_OSCOUNT(8);
  28. tmp |= AT91_PMC_MOR_KEY(0x37);
  29. writel(tmp, &pmc->mor);
  30. while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS))
  31. ;
  32. tmp = readl(&pmc->mor);
  33. tmp &= ~AT91_PMC_MOR_OSCBYPASS;
  34. tmp &= ~AT91_PMC_MOR_KEY(0xff);
  35. tmp |= AT91_PMC_MOR_KEY(0x37);
  36. writel(tmp, &pmc->mor);
  37. tmp = readl(&pmc->mor);
  38. tmp |= AT91_PMC_MOR_MOSCSEL;
  39. tmp &= ~AT91_PMC_MOR_KEY(0xff);
  40. tmp |= AT91_PMC_MOR_KEY(0x37);
  41. writel(tmp, &pmc->mor);
  42. while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCSELS))
  43. ;
  44. tmp = readl(&pmc->mor);
  45. tmp &= ~AT91_PMC_MOR_MOSCRCEN;
  46. tmp &= ~AT91_PMC_MOR_KEY(0xff);
  47. tmp |= AT91_PMC_MOR_KEY(0x37);
  48. writel(tmp, &pmc->mor);
  49. }
  50. void at91_plla_init(u32 pllar)
  51. {
  52. struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  53. writel(pllar, &pmc->pllar);
  54. while (!(readl(&pmc->sr) & (AT91_PMC_LOCKA | AT91_PMC_MCKRDY)))
  55. ;
  56. }
  57. void at91_mck_init(u32 mckr)
  58. {
  59. struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  60. u32 tmp;
  61. tmp = readl(&pmc->mckr);
  62. tmp &= ~(AT91_PMC_MCKR_PRES_MASK |
  63. AT91_PMC_MCKR_MDIV_MASK |
  64. AT91_PMC_MCKR_PLLADIV_2);
  65. tmp |= mckr & (AT91_PMC_MCKR_PRES_MASK |
  66. AT91_PMC_MCKR_MDIV_MASK |
  67. AT91_PMC_MCKR_PLLADIV_2);
  68. writel(tmp, &pmc->mckr);
  69. while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
  70. ;
  71. }
  72. u32 spl_boot_device(void)
  73. {
  74. #ifdef CONFIG_SYS_USE_MMC
  75. return BOOT_DEVICE_MMC1;
  76. #elif CONFIG_SYS_USE_NANDFLASH
  77. return BOOT_DEVICE_NAND;
  78. #elif CONFIG_SYS_USE_SERIALFLASH
  79. return BOOT_DEVICE_SPI;
  80. #endif
  81. return BOOT_DEVICE_NONE;
  82. }
  83. u32 spl_boot_mode(void)
  84. {
  85. switch (spl_boot_device()) {
  86. #ifdef CONFIG_SYS_USE_MMC
  87. case BOOT_DEVICE_MMC1:
  88. return MMCSD_MODE_FAT;
  89. break;
  90. #endif
  91. case BOOT_DEVICE_NONE:
  92. default:
  93. hang();
  94. }
  95. }
  96. void s_init(void)
  97. {
  98. switch_to_main_crystal_osc();
  99. /* disable watchdog */
  100. at91_disable_wdt();
  101. /* PMC configuration */
  102. at91_pmc_init();
  103. at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
  104. timer_init();
  105. board_early_init_f();
  106. preloader_console_init();
  107. mem_init();
  108. }