timer.c 2.6 KB

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  1. /*
  2. * (C) Copyright 2009
  3. * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include <common.h>
  8. #include <asm/io.h>
  9. #include <asm/arch/hardware.h>
  10. #include <asm/arch/spr_gpt.h>
  11. #include <asm/arch/spr_misc.h>
  12. #define GPT_RESOLUTION (CONFIG_SPEAR_HZ_CLOCK / CONFIG_SPEAR_HZ)
  13. #define READ_TIMER() (readl(&gpt_regs_p->count) & GPT_FREE_RUNNING)
  14. static struct gpt_regs *const gpt_regs_p =
  15. (struct gpt_regs *)CONFIG_SPEAR_TIMERBASE;
  16. static struct misc_regs *const misc_regs_p =
  17. (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
  18. DECLARE_GLOBAL_DATA_PTR;
  19. #define timestamp gd->arch.tbl
  20. #define lastdec gd->arch.lastinc
  21. int timer_init(void)
  22. {
  23. u32 synth;
  24. /* Prescaler setting */
  25. #if defined(CONFIG_SPEAR3XX)
  26. writel(MISC_PRSC_CFG, &misc_regs_p->prsc2_clk_cfg);
  27. synth = MISC_GPT4SYNTH;
  28. #elif defined(CONFIG_SPEAR600)
  29. writel(MISC_PRSC_CFG, &misc_regs_p->prsc1_clk_cfg);
  30. synth = MISC_GPT3SYNTH;
  31. #else
  32. # error Incorrect config. Can only be spear{600|300|310|320}
  33. #endif
  34. writel(readl(&misc_regs_p->periph_clk_cfg) | synth,
  35. &misc_regs_p->periph_clk_cfg);
  36. /* disable timers */
  37. writel(GPT_PRESCALER_1 | GPT_MODE_AUTO_RELOAD, &gpt_regs_p->control);
  38. /* load value for free running */
  39. writel(GPT_FREE_RUNNING, &gpt_regs_p->compare);
  40. /* auto reload, start timer */
  41. writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control);
  42. /* Reset the timer */
  43. lastdec = READ_TIMER();
  44. timestamp = 0;
  45. return 0;
  46. }
  47. /*
  48. * timer without interrupts
  49. */
  50. ulong get_timer(ulong base)
  51. {
  52. return (get_timer_masked() / GPT_RESOLUTION) - base;
  53. }
  54. void __udelay(unsigned long usec)
  55. {
  56. ulong tmo;
  57. ulong start = get_timer_masked();
  58. ulong tenudelcnt = CONFIG_SPEAR_HZ_CLOCK / (1000 * 100);
  59. ulong rndoff;
  60. rndoff = (usec % 10) ? 1 : 0;
  61. /* tenudelcnt timer tick gives 10 microsecconds delay */
  62. tmo = ((usec / 10) + rndoff) * tenudelcnt;
  63. while ((ulong) (get_timer_masked() - start) < tmo)
  64. ;
  65. }
  66. ulong get_timer_masked(void)
  67. {
  68. ulong now = READ_TIMER();
  69. if (now >= lastdec) {
  70. /* normal mode */
  71. timestamp += now - lastdec;
  72. } else {
  73. /* we have an overflow ... */
  74. timestamp += now + GPT_FREE_RUNNING - lastdec;
  75. }
  76. lastdec = now;
  77. return timestamp;
  78. }
  79. void udelay_masked(unsigned long usec)
  80. {
  81. return udelay(usec);
  82. }
  83. /*
  84. * This function is derived from PowerPC code (read timebase as long long).
  85. * On ARM it just returns the timer value.
  86. */
  87. unsigned long long get_ticks(void)
  88. {
  89. return get_timer(0);
  90. }
  91. /*
  92. * This function is derived from PowerPC code (timebase clock frequency).
  93. * On ARM it returns the number of timer ticks per second.
  94. */
  95. ulong get_tbclk(void)
  96. {
  97. return CONFIG_SPEAR_HZ;
  98. }