board_f.c 25 KB

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  1. /*
  2. * Copyright (c) 2011 The Chromium OS Authors.
  3. * (C) Copyright 2002-2006
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. *
  6. * (C) Copyright 2002
  7. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  8. * Marius Groeger <mgroeger@sysgo.de>
  9. *
  10. * SPDX-License-Identifier: GPL-2.0+
  11. */
  12. #include <common.h>
  13. #include <linux/compiler.h>
  14. #include <version.h>
  15. #include <environment.h>
  16. #include <fdtdec.h>
  17. #include <fs.h>
  18. #if defined(CONFIG_CMD_IDE)
  19. #include <ide.h>
  20. #endif
  21. #include <i2c.h>
  22. #include <initcall.h>
  23. #include <logbuff.h>
  24. /* TODO: Can we move these into arch/ headers? */
  25. #ifdef CONFIG_8xx
  26. #include <mpc8xx.h>
  27. #endif
  28. #ifdef CONFIG_5xx
  29. #include <mpc5xx.h>
  30. #endif
  31. #ifdef CONFIG_MPC5xxx
  32. #include <mpc5xxx.h>
  33. #endif
  34. #include <os.h>
  35. #include <post.h>
  36. #include <spi.h>
  37. #include <trace.h>
  38. #include <watchdog.h>
  39. #include <asm/errno.h>
  40. #include <asm/io.h>
  41. #ifdef CONFIG_MP
  42. #include <asm/mp.h>
  43. #endif
  44. #include <asm/sections.h>
  45. #ifdef CONFIG_X86
  46. #include <asm/init_helpers.h>
  47. #include <asm/relocate.h>
  48. #endif
  49. #ifdef CONFIG_SANDBOX
  50. #include <asm/state.h>
  51. #endif
  52. #include <linux/compiler.h>
  53. /*
  54. * Pointer to initial global data area
  55. *
  56. * Here we initialize it if needed.
  57. */
  58. #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  59. #undef XTRN_DECLARE_GLOBAL_DATA_PTR
  60. #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
  61. DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
  62. #else
  63. DECLARE_GLOBAL_DATA_PTR;
  64. #endif
  65. /*
  66. * sjg: IMO this code should be
  67. * refactored to a single function, something like:
  68. *
  69. * void led_set_state(enum led_colour_t colour, int on);
  70. */
  71. /************************************************************************
  72. * Coloured LED functionality
  73. ************************************************************************
  74. * May be supplied by boards if desired
  75. */
  76. inline void __coloured_LED_init(void) {}
  77. void coloured_LED_init(void)
  78. __attribute__((weak, alias("__coloured_LED_init")));
  79. inline void __red_led_on(void) {}
  80. void red_led_on(void) __attribute__((weak, alias("__red_led_on")));
  81. inline void __red_led_off(void) {}
  82. void red_led_off(void) __attribute__((weak, alias("__red_led_off")));
  83. inline void __green_led_on(void) {}
  84. void green_led_on(void) __attribute__((weak, alias("__green_led_on")));
  85. inline void __green_led_off(void) {}
  86. void green_led_off(void) __attribute__((weak, alias("__green_led_off")));
  87. inline void __yellow_led_on(void) {}
  88. void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on")));
  89. inline void __yellow_led_off(void) {}
  90. void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off")));
  91. inline void __blue_led_on(void) {}
  92. void blue_led_on(void) __attribute__((weak, alias("__blue_led_on")));
  93. inline void __blue_led_off(void) {}
  94. void blue_led_off(void) __attribute__((weak, alias("__blue_led_off")));
  95. /*
  96. * Why is gd allocated a register? Prior to reloc it might be better to
  97. * just pass it around to each function in this file?
  98. *
  99. * After reloc one could argue that it is hardly used and doesn't need
  100. * to be in a register. Or if it is it should perhaps hold pointers to all
  101. * global data for all modules, so that post-reloc we can avoid the massive
  102. * literal pool we get on ARM. Or perhaps just encourage each module to use
  103. * a structure...
  104. */
  105. /*
  106. * Could the CONFIG_SPL_BUILD infection become a flag in gd?
  107. */
  108. #if defined(CONFIG_WATCHDOG)
  109. static int init_func_watchdog_init(void)
  110. {
  111. puts(" Watchdog enabled\n");
  112. WATCHDOG_RESET();
  113. return 0;
  114. }
  115. int init_func_watchdog_reset(void)
  116. {
  117. WATCHDOG_RESET();
  118. return 0;
  119. }
  120. #endif /* CONFIG_WATCHDOG */
  121. void __board_add_ram_info(int use_default)
  122. {
  123. /* please define platform specific board_add_ram_info() */
  124. }
  125. void board_add_ram_info(int)
  126. __attribute__ ((weak, alias("__board_add_ram_info")));
  127. static int init_baud_rate(void)
  128. {
  129. gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
  130. return 0;
  131. }
  132. static int display_text_info(void)
  133. {
  134. #ifndef CONFIG_SANDBOX
  135. ulong bss_start, bss_end;
  136. bss_start = (ulong)&__bss_start;
  137. bss_end = (ulong)&__bss_end;
  138. debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n",
  139. CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
  140. #endif
  141. #ifdef CONFIG_MODEM_SUPPORT
  142. debug("Modem Support enabled\n");
  143. #endif
  144. #ifdef CONFIG_USE_IRQ
  145. debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
  146. debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
  147. #endif
  148. return 0;
  149. }
  150. static int announce_dram_init(void)
  151. {
  152. puts("DRAM: ");
  153. return 0;
  154. }
  155. #ifdef CONFIG_PPC
  156. static int init_func_ram(void)
  157. {
  158. #ifdef CONFIG_BOARD_TYPES
  159. int board_type = gd->board_type;
  160. #else
  161. int board_type = 0; /* use dummy arg */
  162. #endif
  163. gd->ram_size = initdram(board_type);
  164. if (gd->ram_size > 0)
  165. return 0;
  166. puts("*** failed ***\n");
  167. return 1;
  168. }
  169. #endif
  170. static int show_dram_config(void)
  171. {
  172. ulong size;
  173. #ifdef CONFIG_NR_DRAM_BANKS
  174. int i;
  175. debug("\nRAM Configuration:\n");
  176. for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  177. size += gd->bd->bi_dram[i].size;
  178. debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
  179. #ifdef DEBUG
  180. print_size(gd->bd->bi_dram[i].size, "\n");
  181. #endif
  182. }
  183. debug("\nDRAM: ");
  184. #else
  185. size = gd->ram_size;
  186. #endif
  187. print_size(size, "");
  188. board_add_ram_info(0);
  189. putc('\n');
  190. return 0;
  191. }
  192. void __dram_init_banksize(void)
  193. {
  194. #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
  195. gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  196. gd->bd->bi_dram[0].size = get_effective_memsize();
  197. #endif
  198. }
  199. void dram_init_banksize(void)
  200. __attribute__((weak, alias("__dram_init_banksize")));
  201. #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
  202. static int init_func_i2c(void)
  203. {
  204. puts("I2C: ");
  205. #ifdef CONFIG_SYS_I2C
  206. i2c_init_all();
  207. #else
  208. i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  209. #endif
  210. puts("ready\n");
  211. return 0;
  212. }
  213. #endif
  214. #if defined(CONFIG_HARD_SPI)
  215. static int init_func_spi(void)
  216. {
  217. puts("SPI: ");
  218. spi_init();
  219. puts("ready\n");
  220. return 0;
  221. }
  222. #endif
  223. __maybe_unused
  224. static int zero_global_data(void)
  225. {
  226. memset((void *)gd, '\0', sizeof(gd_t));
  227. return 0;
  228. }
  229. static int setup_mon_len(void)
  230. {
  231. #ifdef __ARM__
  232. gd->mon_len = (ulong)&__bss_end - (ulong)_start;
  233. #elif defined(CONFIG_SANDBOX)
  234. gd->mon_len = (ulong)&_end - (ulong)_init;
  235. #else
  236. /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
  237. gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
  238. #endif
  239. return 0;
  240. }
  241. __weak int arch_cpu_init(void)
  242. {
  243. return 0;
  244. }
  245. #ifdef CONFIG_OF_HOSTFILE
  246. #define CHECK(x) err = (x); if (err) goto failed;
  247. /* Create an empty device tree blob */
  248. static int make_empty_fdt(void *fdt)
  249. {
  250. int err;
  251. CHECK(fdt_create(fdt, 256));
  252. CHECK(fdt_finish_reservemap(fdt));
  253. CHECK(fdt_begin_node(fdt, ""));
  254. CHECK(fdt_end_node(fdt));
  255. CHECK(fdt_finish(fdt));
  256. return 0;
  257. failed:
  258. printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
  259. return -EACCES;
  260. }
  261. static int read_fdt_from_file(void)
  262. {
  263. struct sandbox_state *state = state_get_current();
  264. void *blob;
  265. int size;
  266. int err;
  267. blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
  268. if (!state->fdt_fname) {
  269. err = make_empty_fdt(blob);
  270. if (!err)
  271. goto done;
  272. return err;
  273. }
  274. err = fs_set_blk_dev("host", NULL, FS_TYPE_SANDBOX);
  275. if (err)
  276. return err;
  277. size = fs_read(state->fdt_fname, CONFIG_SYS_FDT_LOAD_ADDR, 0, 0);
  278. if (size < 0)
  279. return -EIO;
  280. done:
  281. gd->fdt_blob = blob;
  282. return 0;
  283. }
  284. #endif
  285. #ifdef CONFIG_SANDBOX
  286. static int setup_ram_buf(void)
  287. {
  288. struct sandbox_state *state = state_get_current();
  289. gd->arch.ram_buf = state->ram_buf;
  290. gd->ram_size = state->ram_size;
  291. return 0;
  292. }
  293. #endif
  294. static int setup_fdt(void)
  295. {
  296. #ifdef CONFIG_OF_EMBED
  297. /* Get a pointer to the FDT */
  298. gd->fdt_blob = __dtb_dt_begin;
  299. #elif defined CONFIG_OF_SEPARATE
  300. /* FDT is at end of image */
  301. gd->fdt_blob = (ulong *)&_end;
  302. #elif defined(CONFIG_OF_HOSTFILE)
  303. if (read_fdt_from_file()) {
  304. puts("Failed to read control FDT\n");
  305. return -1;
  306. }
  307. #endif
  308. /* Allow the early environment to override the fdt address */
  309. gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
  310. (uintptr_t)gd->fdt_blob);
  311. return 0;
  312. }
  313. /* Get the top of usable RAM */
  314. __weak ulong board_get_usable_ram_top(ulong total_size)
  315. {
  316. return gd->ram_top;
  317. }
  318. static int setup_dest_addr(void)
  319. {
  320. debug("Monitor len: %08lX\n", gd->mon_len);
  321. /*
  322. * Ram is setup, size stored in gd !!
  323. */
  324. debug("Ram size: %08lX\n", (ulong)gd->ram_size);
  325. #if defined(CONFIG_SYS_MEM_TOP_HIDE)
  326. /*
  327. * Subtract specified amount of memory to hide so that it won't
  328. * get "touched" at all by U-Boot. By fixing up gd->ram_size
  329. * the Linux kernel should now get passed the now "corrected"
  330. * memory size and won't touch it either. This should work
  331. * for arch/ppc and arch/powerpc. Only Linux board ports in
  332. * arch/powerpc with bootwrapper support, that recalculate the
  333. * memory size from the SDRAM controller setup will have to
  334. * get fixed.
  335. */
  336. gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
  337. #endif
  338. #ifdef CONFIG_SYS_SDRAM_BASE
  339. gd->ram_top = CONFIG_SYS_SDRAM_BASE;
  340. #endif
  341. gd->ram_top += get_effective_memsize();
  342. gd->ram_top = board_get_usable_ram_top(gd->mon_len);
  343. gd->relocaddr = gd->ram_top;
  344. debug("Ram top: %08lX\n", (ulong)gd->ram_top);
  345. #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  346. /*
  347. * We need to make sure the location we intend to put secondary core
  348. * boot code is reserved and not used by any part of u-boot
  349. */
  350. if (gd->relocaddr > determine_mp_bootpg(NULL)) {
  351. gd->relocaddr = determine_mp_bootpg(NULL);
  352. debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
  353. }
  354. #endif
  355. return 0;
  356. }
  357. #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
  358. static int reserve_logbuffer(void)
  359. {
  360. /* reserve kernel log buffer */
  361. gd->relocaddr -= LOGBUFF_RESERVE;
  362. debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
  363. gd->relocaddr);
  364. return 0;
  365. }
  366. #endif
  367. #ifdef CONFIG_PRAM
  368. /* reserve protected RAM */
  369. static int reserve_pram(void)
  370. {
  371. ulong reg;
  372. reg = getenv_ulong("pram", 10, CONFIG_PRAM);
  373. gd->relocaddr -= (reg << 10); /* size is in kB */
  374. debug("Reserving %ldk for protected RAM at %08lx\n", reg,
  375. gd->relocaddr);
  376. return 0;
  377. }
  378. #endif /* CONFIG_PRAM */
  379. /* Round memory pointer down to next 4 kB limit */
  380. static int reserve_round_4k(void)
  381. {
  382. gd->relocaddr &= ~(4096 - 1);
  383. return 0;
  384. }
  385. #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
  386. defined(CONFIG_ARM)
  387. static int reserve_mmu(void)
  388. {
  389. /* reserve TLB table */
  390. gd->arch.tlb_size = PGTABLE_SIZE;
  391. gd->relocaddr -= gd->arch.tlb_size;
  392. /* round down to next 64 kB limit */
  393. gd->relocaddr &= ~(0x10000 - 1);
  394. gd->arch.tlb_addr = gd->relocaddr;
  395. debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
  396. gd->arch.tlb_addr + gd->arch.tlb_size);
  397. return 0;
  398. }
  399. #endif
  400. #ifdef CONFIG_LCD
  401. static int reserve_lcd(void)
  402. {
  403. #ifdef CONFIG_FB_ADDR
  404. gd->fb_base = CONFIG_FB_ADDR;
  405. #else
  406. /* reserve memory for LCD display (always full pages) */
  407. gd->relocaddr = lcd_setmem(gd->relocaddr);
  408. gd->fb_base = gd->relocaddr;
  409. #endif /* CONFIG_FB_ADDR */
  410. return 0;
  411. }
  412. #endif /* CONFIG_LCD */
  413. static int reserve_trace(void)
  414. {
  415. #ifdef CONFIG_TRACE
  416. gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
  417. gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
  418. debug("Reserving %dk for trace data at: %08lx\n",
  419. CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
  420. #endif
  421. return 0;
  422. }
  423. #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
  424. && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
  425. static int reserve_video(void)
  426. {
  427. /* reserve memory for video display (always full pages) */
  428. gd->relocaddr = video_setmem(gd->relocaddr);
  429. gd->fb_base = gd->relocaddr;
  430. return 0;
  431. }
  432. #endif
  433. static int reserve_uboot(void)
  434. {
  435. /*
  436. * reserve memory for U-Boot code, data & bss
  437. * round down to next 4 kB limit
  438. */
  439. gd->relocaddr -= gd->mon_len;
  440. gd->relocaddr &= ~(4096 - 1);
  441. #ifdef CONFIG_E500
  442. /* round down to next 64 kB limit so that IVPR stays aligned */
  443. gd->relocaddr &= ~(65536 - 1);
  444. #endif
  445. debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
  446. gd->relocaddr);
  447. gd->start_addr_sp = gd->relocaddr;
  448. return 0;
  449. }
  450. #ifndef CONFIG_SPL_BUILD
  451. /* reserve memory for malloc() area */
  452. static int reserve_malloc(void)
  453. {
  454. gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
  455. debug("Reserving %dk for malloc() at: %08lx\n",
  456. TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
  457. return 0;
  458. }
  459. /* (permanently) allocate a Board Info struct */
  460. static int reserve_board(void)
  461. {
  462. gd->start_addr_sp -= sizeof(bd_t);
  463. gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
  464. memset(gd->bd, '\0', sizeof(bd_t));
  465. debug("Reserving %zu Bytes for Board Info at: %08lx\n",
  466. sizeof(bd_t), gd->start_addr_sp);
  467. return 0;
  468. }
  469. #endif
  470. static int setup_machine(void)
  471. {
  472. #ifdef CONFIG_MACH_TYPE
  473. gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
  474. #endif
  475. return 0;
  476. }
  477. static int reserve_global_data(void)
  478. {
  479. gd->start_addr_sp -= sizeof(gd_t);
  480. gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
  481. debug("Reserving %zu Bytes for Global Data at: %08lx\n",
  482. sizeof(gd_t), gd->start_addr_sp);
  483. return 0;
  484. }
  485. static int reserve_fdt(void)
  486. {
  487. /*
  488. * If the device tree is sitting immediate above our image then we
  489. * must relocate it. If it is embedded in the data section, then it
  490. * will be relocated with other data.
  491. */
  492. if (gd->fdt_blob) {
  493. gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
  494. gd->start_addr_sp -= gd->fdt_size;
  495. gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
  496. debug("Reserving %lu Bytes for FDT at: %08lx\n",
  497. gd->fdt_size, gd->start_addr_sp);
  498. }
  499. return 0;
  500. }
  501. static int reserve_stacks(void)
  502. {
  503. #ifdef CONFIG_SPL_BUILD
  504. # ifdef CONFIG_ARM
  505. gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */
  506. gd->irq_sp = gd->start_addr_sp;
  507. # endif
  508. #else
  509. # ifdef CONFIG_PPC
  510. ulong *s;
  511. # endif
  512. /* setup stack pointer for exceptions */
  513. gd->start_addr_sp -= 16;
  514. gd->start_addr_sp &= ~0xf;
  515. gd->irq_sp = gd->start_addr_sp;
  516. /*
  517. * Handle architecture-specific things here
  518. * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
  519. * to handle this and put in arch/xxx/lib/stack.c
  520. */
  521. # if defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
  522. # ifdef CONFIG_USE_IRQ
  523. gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
  524. debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
  525. CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp);
  526. /* 8-byte alignment for ARM ABI compliance */
  527. gd->start_addr_sp &= ~0x07;
  528. # endif
  529. /* leave 3 words for abort-stack, plus 1 for alignment */
  530. gd->start_addr_sp -= 16;
  531. # elif defined(CONFIG_PPC)
  532. /* Clear initial stack frame */
  533. s = (ulong *) gd->start_addr_sp;
  534. *s = 0; /* Terminate back chain */
  535. *++s = 0; /* NULL return address */
  536. # endif /* Architecture specific code */
  537. return 0;
  538. #endif
  539. }
  540. static int display_new_sp(void)
  541. {
  542. debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
  543. return 0;
  544. }
  545. #ifdef CONFIG_PPC
  546. static int setup_board_part1(void)
  547. {
  548. bd_t *bd = gd->bd;
  549. /*
  550. * Save local variables to board info struct
  551. */
  552. bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
  553. bd->bi_memsize = gd->ram_size; /* size in bytes */
  554. #ifdef CONFIG_SYS_SRAM_BASE
  555. bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
  556. bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
  557. #endif
  558. #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
  559. defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
  560. bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
  561. #endif
  562. #if defined(CONFIG_MPC5xxx)
  563. bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
  564. #endif
  565. #if defined(CONFIG_MPC83xx)
  566. bd->bi_immrbar = CONFIG_SYS_IMMR;
  567. #endif
  568. return 0;
  569. }
  570. static int setup_board_part2(void)
  571. {
  572. bd_t *bd = gd->bd;
  573. bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
  574. bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
  575. #if defined(CONFIG_CPM2)
  576. bd->bi_cpmfreq = gd->arch.cpm_clk;
  577. bd->bi_brgfreq = gd->arch.brg_clk;
  578. bd->bi_sccfreq = gd->arch.scc_clk;
  579. bd->bi_vco = gd->arch.vco_out;
  580. #endif /* CONFIG_CPM2 */
  581. #if defined(CONFIG_MPC512X)
  582. bd->bi_ipsfreq = gd->arch.ips_clk;
  583. #endif /* CONFIG_MPC512X */
  584. #if defined(CONFIG_MPC5xxx)
  585. bd->bi_ipbfreq = gd->arch.ipb_clk;
  586. bd->bi_pcifreq = gd->pci_clk;
  587. #endif /* CONFIG_MPC5xxx */
  588. return 0;
  589. }
  590. #endif
  591. #ifdef CONFIG_SYS_EXTBDINFO
  592. static int setup_board_extra(void)
  593. {
  594. bd_t *bd = gd->bd;
  595. strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
  596. strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
  597. sizeof(bd->bi_r_version));
  598. bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
  599. bd->bi_plb_busfreq = gd->bus_clk;
  600. #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
  601. defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
  602. defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
  603. bd->bi_pci_busfreq = get_PCI_freq();
  604. bd->bi_opbfreq = get_OPB_freq();
  605. #elif defined(CONFIG_XILINX_405)
  606. bd->bi_pci_busfreq = get_PCI_freq();
  607. #endif
  608. return 0;
  609. }
  610. #endif
  611. #ifdef CONFIG_POST
  612. static int init_post(void)
  613. {
  614. post_bootmode_init();
  615. post_run(NULL, POST_ROM | post_bootmode_get(0));
  616. return 0;
  617. }
  618. #endif
  619. static int setup_baud_rate(void)
  620. {
  621. /* Ick, can we get rid of this line? */
  622. gd->bd->bi_baudrate = gd->baudrate;
  623. return 0;
  624. }
  625. static int setup_dram_config(void)
  626. {
  627. /* Ram is board specific, so move it to board code ... */
  628. dram_init_banksize();
  629. return 0;
  630. }
  631. static int reloc_fdt(void)
  632. {
  633. if (gd->new_fdt) {
  634. memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
  635. gd->fdt_blob = gd->new_fdt;
  636. }
  637. return 0;
  638. }
  639. static int setup_reloc(void)
  640. {
  641. gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
  642. memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
  643. debug("Relocation Offset is: %08lx\n", gd->reloc_off);
  644. debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
  645. gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
  646. gd->start_addr_sp);
  647. return 0;
  648. }
  649. /* ARM calls relocate_code from its crt0.S */
  650. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
  651. static int jump_to_copy(void)
  652. {
  653. /*
  654. * x86 is special, but in a nice way. It uses a trampoline which
  655. * enables the dcache if possible.
  656. *
  657. * For now, other archs use relocate_code(), which is implemented
  658. * similarly for all archs. When we do generic relocation, hopefully
  659. * we can make all archs enable the dcache prior to relocation.
  660. */
  661. #ifdef CONFIG_X86
  662. /*
  663. * SDRAM and console are now initialised. The final stack can now
  664. * be setup in SDRAM. Code execution will continue in Flash, but
  665. * with the stack in SDRAM and Global Data in temporary memory
  666. * (CPU cache)
  667. */
  668. board_init_f_r_trampoline(gd->start_addr_sp);
  669. #else
  670. relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
  671. #endif
  672. return 0;
  673. }
  674. #endif
  675. /* Record the board_init_f() bootstage (after arch_cpu_init()) */
  676. static int mark_bootstage(void)
  677. {
  678. bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
  679. return 0;
  680. }
  681. static init_fnc_t init_sequence_f[] = {
  682. #ifdef CONFIG_SANDBOX
  683. setup_ram_buf,
  684. #endif
  685. setup_mon_len,
  686. setup_fdt,
  687. trace_early_init,
  688. #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
  689. /* TODO: can this go into arch_cpu_init()? */
  690. probecpu,
  691. #endif
  692. arch_cpu_init, /* basic arch cpu dependent setup */
  693. #ifdef CONFIG_X86
  694. cpu_init_f, /* TODO(sjg@chromium.org): remove */
  695. # ifdef CONFIG_OF_CONTROL
  696. find_fdt, /* TODO(sjg@chromium.org): remove */
  697. # endif
  698. #endif
  699. mark_bootstage,
  700. #ifdef CONFIG_OF_CONTROL
  701. fdtdec_check_fdt,
  702. #endif
  703. #if defined(CONFIG_BOARD_EARLY_INIT_F)
  704. board_early_init_f,
  705. #endif
  706. /* TODO: can any of this go into arch_cpu_init()? */
  707. #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
  708. get_clocks, /* get CPU and bus clocks (etc.) */
  709. #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
  710. && !defined(CONFIG_TQM885D)
  711. adjust_sdram_tbs_8xx,
  712. #endif
  713. /* TODO: can we rename this to timer_init()? */
  714. init_timebase,
  715. #endif
  716. #ifdef CONFIG_ARM
  717. timer_init, /* initialize timer */
  718. #endif
  719. #ifdef CONFIG_SYS_ALLOC_DPRAM
  720. #if !defined(CONFIG_CPM2)
  721. dpram_init,
  722. #endif
  723. #endif
  724. #if defined(CONFIG_BOARD_POSTCLK_INIT)
  725. board_postclk_init,
  726. #endif
  727. #ifdef CONFIG_FSL_ESDHC
  728. get_clocks,
  729. #endif
  730. env_init, /* initialize environment */
  731. #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
  732. /* get CPU and bus clocks according to the environment variable */
  733. get_clocks_866,
  734. /* adjust sdram refresh rate according to the new clock */
  735. sdram_adjust_866,
  736. init_timebase,
  737. #endif
  738. init_baud_rate, /* initialze baudrate settings */
  739. serial_init, /* serial communications setup */
  740. console_init_f, /* stage 1 init of console */
  741. #ifdef CONFIG_SANDBOX
  742. sandbox_early_getopt_check,
  743. #endif
  744. #ifdef CONFIG_OF_CONTROL
  745. fdtdec_prepare_fdt,
  746. #endif
  747. display_options, /* say that we are here */
  748. display_text_info, /* show debugging info if required */
  749. #if defined(CONFIG_8260)
  750. prt_8260_rsr,
  751. prt_8260_clks,
  752. #endif /* CONFIG_8260 */
  753. #if defined(CONFIG_MPC83xx)
  754. prt_83xx_rsr,
  755. #endif
  756. #ifdef CONFIG_PPC
  757. checkcpu,
  758. #endif
  759. print_cpuinfo, /* display cpu info (and speed) */
  760. #if defined(CONFIG_MPC5xxx)
  761. prt_mpc5xxx_clks,
  762. #endif /* CONFIG_MPC5xxx */
  763. #if defined(CONFIG_DISPLAY_BOARDINFO)
  764. checkboard, /* display board info */
  765. #endif
  766. INIT_FUNC_WATCHDOG_INIT
  767. #if defined(CONFIG_MISC_INIT_F)
  768. misc_init_f,
  769. #endif
  770. INIT_FUNC_WATCHDOG_RESET
  771. #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
  772. init_func_i2c,
  773. #endif
  774. #if defined(CONFIG_HARD_SPI)
  775. init_func_spi,
  776. #endif
  777. #ifdef CONFIG_X86
  778. dram_init_f, /* configure available RAM banks */
  779. calculate_relocation_address,
  780. #endif
  781. announce_dram_init,
  782. /* TODO: unify all these dram functions? */
  783. #ifdef CONFIG_ARM
  784. dram_init, /* configure available RAM banks */
  785. #endif
  786. #ifdef CONFIG_PPC
  787. init_func_ram,
  788. #endif
  789. #ifdef CONFIG_POST
  790. post_init_f,
  791. #endif
  792. INIT_FUNC_WATCHDOG_RESET
  793. #if defined(CONFIG_SYS_DRAM_TEST)
  794. testdram,
  795. #endif /* CONFIG_SYS_DRAM_TEST */
  796. INIT_FUNC_WATCHDOG_RESET
  797. #ifdef CONFIG_POST
  798. init_post,
  799. #endif
  800. INIT_FUNC_WATCHDOG_RESET
  801. /*
  802. * Now that we have DRAM mapped and working, we can
  803. * relocate the code and continue running from DRAM.
  804. *
  805. * Reserve memory at end of RAM for (top down in that order):
  806. * - area that won't get touched by U-Boot and Linux (optional)
  807. * - kernel log buffer
  808. * - protected RAM
  809. * - LCD framebuffer
  810. * - monitor code
  811. * - board info struct
  812. */
  813. setup_dest_addr,
  814. #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
  815. reserve_logbuffer,
  816. #endif
  817. #ifdef CONFIG_PRAM
  818. reserve_pram,
  819. #endif
  820. reserve_round_4k,
  821. #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
  822. defined(CONFIG_ARM)
  823. reserve_mmu,
  824. #endif
  825. #ifdef CONFIG_LCD
  826. reserve_lcd,
  827. #endif
  828. reserve_trace,
  829. /* TODO: Why the dependency on CONFIG_8xx? */
  830. #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
  831. && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
  832. reserve_video,
  833. #endif
  834. reserve_uboot,
  835. #ifndef CONFIG_SPL_BUILD
  836. reserve_malloc,
  837. reserve_board,
  838. #endif
  839. setup_machine,
  840. reserve_global_data,
  841. reserve_fdt,
  842. reserve_stacks,
  843. setup_dram_config,
  844. show_dram_config,
  845. #ifdef CONFIG_PPC
  846. setup_board_part1,
  847. INIT_FUNC_WATCHDOG_RESET
  848. setup_board_part2,
  849. #endif
  850. setup_baud_rate,
  851. display_new_sp,
  852. #ifdef CONFIG_SYS_EXTBDINFO
  853. setup_board_extra,
  854. #endif
  855. INIT_FUNC_WATCHDOG_RESET
  856. reloc_fdt,
  857. setup_reloc,
  858. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
  859. jump_to_copy,
  860. #endif
  861. NULL,
  862. };
  863. void board_init_f(ulong boot_flags)
  864. {
  865. #ifndef CONFIG_X86
  866. gd_t data;
  867. gd = &data;
  868. #endif
  869. /*
  870. * Clear global data before it is accessed at debug print
  871. * in initcall_run_list. Otherwise the debug print probably
  872. * get the wrong vaule of gd->have_console.
  873. */
  874. #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
  875. !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
  876. !defined(CONFIG_MPC86xx) && !defined(CONFIG_X86)
  877. zero_global_data();
  878. #endif
  879. gd->flags = boot_flags;
  880. gd->have_console = 0;
  881. if (initcall_run_list(init_sequence_f))
  882. hang();
  883. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
  884. /* NOTREACHED - jump_to_copy() does not return */
  885. hang();
  886. #endif
  887. }
  888. #ifdef CONFIG_X86
  889. /*
  890. * For now this code is only used on x86.
  891. *
  892. * init_sequence_f_r is the list of init functions which are run when
  893. * U-Boot is executing from Flash with a semi-limited 'C' environment.
  894. * The following limitations must be considered when implementing an
  895. * '_f_r' function:
  896. * - 'static' variables are read-only
  897. * - Global Data (gd->xxx) is read/write
  898. *
  899. * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
  900. * supported). It _should_, if possible, copy global data to RAM and
  901. * initialise the CPU caches (to speed up the relocation process)
  902. *
  903. * NOTE: At present only x86 uses this route, but it is intended that
  904. * all archs will move to this when generic relocation is implemented.
  905. */
  906. static init_fnc_t init_sequence_f_r[] = {
  907. init_cache_f_r,
  908. copy_uboot_to_ram,
  909. clear_bss,
  910. do_elf_reloc_fixups,
  911. NULL,
  912. };
  913. void board_init_f_r(void)
  914. {
  915. if (initcall_run_list(init_sequence_f_r))
  916. hang();
  917. /*
  918. * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
  919. * Transfer execution from Flash to RAM by calculating the address
  920. * of the in-RAM copy of board_init_r() and calling it
  921. */
  922. (board_init_r + gd->reloc_off)(gd, gd->relocaddr);
  923. /* NOTREACHED - board_init_r() does not return */
  924. hang();
  925. }
  926. #endif /* CONFIG_X86 */