mpc8313erdb.c 2.9 KB

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  1. /*
  2. * Copyright (C) Freescale Semiconductor, Inc. 2006-2007
  3. *
  4. * Author: Scott Wood <scottwood@freescale.com>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #include <common.h>
  25. #if defined(CONFIG_OF_FLAT_TREE)
  26. #include <ft_build.h>
  27. #elif defined(CONFIG_OF_LIBFDT)
  28. #include <libfdt.h>
  29. #endif
  30. #include <pci.h>
  31. #include <mpc83xx.h>
  32. DECLARE_GLOBAL_DATA_PTR;
  33. int board_early_init_f(void)
  34. {
  35. #ifndef CFG_8313ERDB_BROKEN_PMC
  36. volatile immap_t *im = (immap_t *)CFG_IMMR;
  37. if (im->pmc.pmccr1 & PMCCR1_POWER_OFF)
  38. gd->flags |= GD_FLG_SILENT;
  39. #endif
  40. return 0;
  41. }
  42. int checkboard(void)
  43. {
  44. puts("Board: Freescale MPC8313ERDB\n");
  45. return 0;
  46. }
  47. static struct pci_region pci_regions[] = {
  48. {
  49. bus_start: CFG_PCI1_MEM_BASE,
  50. phys_start: CFG_PCI1_MEM_PHYS,
  51. size: CFG_PCI1_MEM_SIZE,
  52. flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
  53. },
  54. {
  55. bus_start: CFG_PCI1_MMIO_BASE,
  56. phys_start: CFG_PCI1_MMIO_PHYS,
  57. size: CFG_PCI1_MMIO_SIZE,
  58. flags: PCI_REGION_MEM
  59. },
  60. {
  61. bus_start: CFG_PCI1_IO_BASE,
  62. phys_start: CFG_PCI1_IO_PHYS,
  63. size: CFG_PCI1_IO_SIZE,
  64. flags: PCI_REGION_IO
  65. }
  66. };
  67. void pci_init_board(void)
  68. {
  69. volatile immap_t *immr = (volatile immap_t *)CFG_IMMR;
  70. volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
  71. volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
  72. struct pci_region *reg[] = { pci_regions };
  73. int warmboot;
  74. /* Enable all 3 PCI_CLK_OUTPUTs. */
  75. clk->occr |= 0xe0000000;
  76. /*
  77. * Configure PCI Local Access Windows
  78. */
  79. pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR;
  80. pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB;
  81. pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR;
  82. pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
  83. warmboot = gd->bd->bi_bootflags & BOOTFLAG_WARM;
  84. #ifndef CFG_8313ERDB_BROKEN_PMC
  85. warmboot |= immr->pmc.pmccr1 & PMCCR1_POWER_OFF;
  86. #endif
  87. mpc83xx_pci_init(1, reg, warmboot);
  88. }
  89. #if defined(CONFIG_OF_BOARD_SETUP)
  90. void ft_board_setup(void *blob, bd_t *bd)
  91. {
  92. #if defined(CONFIG_OF_FLAT_TREE)
  93. u32 *p;
  94. int len;
  95. p = ft_get_prop(blob, "/memory/reg", &len);
  96. if (p != NULL) {
  97. *p++ = cpu_to_be32(bd->bi_memstart);
  98. *p = cpu_to_be32(bd->bi_memsize);
  99. }
  100. #endif
  101. ft_cpu_setup(blob, bd);
  102. #ifdef CONFIG_PCI
  103. ft_pci_setup(blob, bd);
  104. #endif
  105. }
  106. #endif