arm_dcc.c 3.9 KB

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  1. /*
  2. * Copyright (C) 2004-2007 ARM Limited.
  3. * Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  17. *
  18. * As a special exception, if other files instantiate templates or use macros
  19. * or inline functions from this file, or you compile this file and link it
  20. * with other works to produce a work based on this file, this file does not
  21. * by itself cause the resulting work to be covered by the GNU General Public
  22. * License. However the source code for this file must still be made available
  23. * in accordance with section (3) of the GNU General Public License.
  24. * This exception does not invalidate any other reasons why a work based on
  25. * this file might be covered by the GNU General Public License.
  26. */
  27. #include <common.h>
  28. #include <serial.h>
  29. #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V7)
  30. /*
  31. * ARMV6 & ARMV7
  32. */
  33. #define DCC_RBIT (1 << 30)
  34. #define DCC_WBIT (1 << 29)
  35. #define write_dcc(x) \
  36. __asm__ volatile ("mcr p14, 0, %0, c0, c5, 0\n" : : "r" (x))
  37. #define read_dcc(x) \
  38. __asm__ volatile ("mrc p14, 0, %0, c0, c5, 0\n" : "=r" (x))
  39. #define status_dcc(x) \
  40. __asm__ volatile ("mrc p14, 0, %0, c0, c1, 0\n" : "=r" (x))
  41. #elif defined(CONFIG_CPU_XSCALE)
  42. /*
  43. * XSCALE
  44. */
  45. #define DCC_RBIT (1 << 31)
  46. #define DCC_WBIT (1 << 28)
  47. #define write_dcc(x) \
  48. __asm__ volatile ("mcr p14, 0, %0, c8, c0, 0\n" : : "r" (x))
  49. #define read_dcc(x) \
  50. __asm__ volatile ("mrc p14, 0, %0, c9, c0, 0\n" : "=r" (x))
  51. #define status_dcc(x) \
  52. __asm__ volatile ("mrc p14, 0, %0, c14, c0, 0\n" : "=r" (x))
  53. #elif defined(CONFIG_CPU_ARMV8)
  54. /*
  55. * ARMV8
  56. */
  57. #define DCC_RBIT (1 << 30)
  58. #define DCC_WBIT (1 << 29)
  59. #define write_dcc(x) \
  60. __asm__ volatile ("msr dbgdtrtx_el0, %0\n" : : "r" (x))
  61. #define read_dcc(x) \
  62. __asm__ volatile ("mrs %0, dbgdtrrx_el0\n" : "=r" (x))
  63. #define status_dcc(x) \
  64. __asm__ volatile ("mrs %0, mdccsr_el0\n" : "=r" (x))
  65. #else
  66. #define DCC_RBIT (1 << 0)
  67. #define DCC_WBIT (1 << 1)
  68. #define write_dcc(x) \
  69. __asm__ volatile ("mcr p14, 0, %0, c1, c0, 0\n" : : "r" (x))
  70. #define read_dcc(x) \
  71. __asm__ volatile ("mrc p14, 0, %0, c1, c0, 0\n" : "=r" (x))
  72. #define status_dcc(x) \
  73. __asm__ volatile ("mrc p14, 0, %0, c0, c0, 0\n" : "=r" (x))
  74. #endif
  75. #define can_read_dcc(x) do { \
  76. status_dcc(x); \
  77. x &= DCC_RBIT; \
  78. } while (0);
  79. #define can_write_dcc(x) do { \
  80. status_dcc(x); \
  81. x &= DCC_WBIT; \
  82. x = (x == 0); \
  83. } while (0);
  84. #define TIMEOUT_COUNT 0x4000000
  85. static int arm_dcc_init(void)
  86. {
  87. return 0;
  88. }
  89. static int arm_dcc_getc(void)
  90. {
  91. int ch;
  92. register unsigned int reg;
  93. do {
  94. can_read_dcc(reg);
  95. } while (!reg);
  96. read_dcc(ch);
  97. return ch;
  98. }
  99. static void arm_dcc_putc(char ch)
  100. {
  101. register unsigned int reg;
  102. unsigned int timeout_count = TIMEOUT_COUNT;
  103. while (--timeout_count) {
  104. can_write_dcc(reg);
  105. if (reg)
  106. break;
  107. }
  108. if (timeout_count == 0)
  109. return;
  110. else
  111. write_dcc(ch);
  112. }
  113. static int arm_dcc_tstc(void)
  114. {
  115. register unsigned int reg;
  116. can_read_dcc(reg);
  117. return reg;
  118. }
  119. static void arm_dcc_setbrg(void)
  120. {
  121. }
  122. static struct serial_device arm_dcc_drv = {
  123. .name = "arm_dcc",
  124. .start = arm_dcc_init,
  125. .stop = NULL,
  126. .setbrg = arm_dcc_setbrg,
  127. .putc = arm_dcc_putc,
  128. .puts = default_serial_puts,
  129. .getc = arm_dcc_getc,
  130. .tstc = arm_dcc_tstc,
  131. };
  132. void arm_dcc_initialize(void)
  133. {
  134. serial_register(&arm_dcc_drv);
  135. }
  136. __weak struct serial_device *default_serial_console(void)
  137. {
  138. return &arm_dcc_drv;
  139. }