qbman_portal.h 6.0 KB

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  1. /*
  2. * Copyright (C) 2014 Freescale Semiconductor
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include "qbman_private.h"
  7. #include <fsl-mc/fsl_qbman_portal.h>
  8. #include <fsl-mc/fsl_dpaa_fd.h>
  9. /* All QBMan command and result structures use this "valid bit" encoding */
  10. #define QB_VALID_BIT ((uint32_t)0x80)
  11. /* Management command result codes */
  12. #define QBMAN_MC_RSLT_OK 0xf0
  13. /* TBD: as of QBMan 4.1, DQRR will be 8 rather than 4! */
  14. #define QBMAN_DQRR_SIZE 4
  15. /* --------------------- */
  16. /* portal data structure */
  17. /* --------------------- */
  18. struct qbman_swp {
  19. const struct qbman_swp_desc *desc;
  20. /* The qbman_sys (ie. arch/OS-specific) support code can put anything it
  21. * needs in here. */
  22. struct qbman_swp_sys sys;
  23. /* Management commands */
  24. struct {
  25. #ifdef QBMAN_CHECKING
  26. enum swp_mc_check {
  27. swp_mc_can_start, /* call __qbman_swp_mc_start() */
  28. swp_mc_can_submit, /* call __qbman_swp_mc_submit() */
  29. swp_mc_can_poll, /* call __qbman_swp_mc_result() */
  30. } check;
  31. #endif
  32. uint32_t valid_bit; /* 0x00 or 0x80 */
  33. } mc;
  34. /* Push dequeues */
  35. uint32_t sdq;
  36. /* Volatile dequeues */
  37. struct {
  38. /* VDQCR supports a "1 deep pipeline", meaning that if you know
  39. * the last-submitted command is already executing in the
  40. * hardware (as evidenced by at least 1 valid dequeue result),
  41. * you can write another dequeue command to the register, the
  42. * hardware will start executing it as soon as the
  43. * already-executing command terminates. (This minimises latency
  44. * and stalls.) With that in mind, this "busy" variable refers
  45. * to whether or not a command can be submitted, not whether or
  46. * not a previously-submitted command is still executing. In
  47. * other words, once proof is seen that the previously-submitted
  48. * command is executing, "vdq" is no longer "busy".
  49. */
  50. atomic_t busy;
  51. uint32_t valid_bit; /* 0x00 or 0x80 */
  52. /* We need to determine when vdq is no longer busy. This depends
  53. * on whether the "busy" (last-submitted) dequeue command is
  54. * targeting DQRR or main-memory, and detected is based on the
  55. * presence of the dequeue command's "token" showing up in
  56. * dequeue entries in DQRR or main-memory (respectively). Debug
  57. * builds will, when submitting vdq commands, verify that the
  58. * dequeue result location is not already equal to the command's
  59. * token value. */
  60. struct ldpaa_dq *storage; /* NULL if DQRR */
  61. uint32_t token;
  62. } vdq;
  63. /* DQRR */
  64. struct {
  65. uint32_t next_idx;
  66. uint32_t valid_bit;
  67. } dqrr;
  68. };
  69. /* -------------------------- */
  70. /* portal management commands */
  71. /* -------------------------- */
  72. /* Different management commands all use this common base layer of code to issue
  73. * commands and poll for results. The first function returns a pointer to where
  74. * the caller should fill in their MC command (though they should ignore the
  75. * verb byte), the second function commits merges in the caller-supplied command
  76. * verb (which should not include the valid-bit) and submits the command to
  77. * hardware, and the third function checks for a completed response (returns
  78. * non-NULL if only if the response is complete). */
  79. void *qbman_swp_mc_start(struct qbman_swp *p);
  80. void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint32_t cmd_verb);
  81. void *qbman_swp_mc_result(struct qbman_swp *p);
  82. /* Wraps up submit + poll-for-result */
  83. static inline void *qbman_swp_mc_complete(struct qbman_swp *swp, void *cmd,
  84. uint32_t cmd_verb)
  85. {
  86. int loopvar;
  87. qbman_swp_mc_submit(swp, cmd, cmd_verb);
  88. DBG_POLL_START(loopvar);
  89. do {
  90. DBG_POLL_CHECK(loopvar);
  91. cmd = qbman_swp_mc_result(swp);
  92. } while (!cmd);
  93. return cmd;
  94. }
  95. /* ------------ */
  96. /* qb_attr_code */
  97. /* ------------ */
  98. /* This struct locates a sub-field within a QBMan portal (CENA) cacheline which
  99. * is either serving as a configuration command or a query result. The
  100. * representation is inherently little-endian, as the indexing of the words is
  101. * itself little-endian in nature and layerscape is little endian for anything
  102. * that crosses a word boundary too (64-bit fields are the obvious examples).
  103. */
  104. struct qb_attr_code {
  105. unsigned int word; /* which uint32_t[] array member encodes the field */
  106. unsigned int lsoffset; /* encoding offset from ls-bit */
  107. unsigned int width; /* encoding width. (bool must be 1.) */
  108. };
  109. /* Macros to define codes */
  110. #define QB_CODE(a, b, c) { a, b, c}
  111. /* decode a field from a cacheline */
  112. static inline uint32_t qb_attr_code_decode(const struct qb_attr_code *code,
  113. const uint32_t *cacheline)
  114. {
  115. return d32_uint32_t(code->lsoffset, code->width, cacheline[code->word]);
  116. }
  117. /* encode a field to a cacheline */
  118. static inline void qb_attr_code_encode(const struct qb_attr_code *code,
  119. uint32_t *cacheline, uint32_t val)
  120. {
  121. cacheline[code->word] =
  122. r32_uint32_t(code->lsoffset, code->width, cacheline[code->word])
  123. | e32_uint32_t(code->lsoffset, code->width, val);
  124. }
  125. static inline void qb_attr_code_encode_64(const struct qb_attr_code *code,
  126. uint64_t *cacheline, uint64_t val)
  127. {
  128. cacheline[code->word / 2] = val;
  129. }
  130. /* ---------------------- */
  131. /* Descriptors/cachelines */
  132. /* ---------------------- */
  133. /* To avoid needless dynamic allocation, the driver API often gives the caller
  134. * a "descriptor" type that the caller can instantiate however they like.
  135. * Ultimately though, it is just a cacheline of binary storage (or something
  136. * smaller when it is known that the descriptor doesn't need all 64 bytes) for
  137. * holding pre-formatted pieces of hardware commands. The performance-critical
  138. * code can then copy these descriptors directly into hardware command
  139. * registers more efficiently than trying to construct/format commands
  140. * on-the-fly. The API user sees the descriptor as an array of 32-bit words in
  141. * order for the compiler to know its size, but the internal details are not
  142. * exposed. The following macro is used within the driver for converting *any*
  143. * descriptor pointer to a usable array pointer. The use of a macro (instead of
  144. * an inline) is necessary to work with different descriptor types and to work
  145. * correctly with const and non-const inputs (and similarly-qualified outputs).
  146. */
  147. #define qb_cl(d) (&(d)->dont_manipulate_directly[0])