sh_i2c.c 7.2 KB

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  1. /*
  2. * Copyright (C) 2011, 2013 Renesas Solutions Corp.
  3. * Copyright (C) 2011, 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include <common.h>
  8. #include <asm/io.h>
  9. DECLARE_GLOBAL_DATA_PTR;
  10. /* Every register is 32bit aligned, but only 8bits in size */
  11. #define ureg(name) u8 name; u8 __pad_##name##0; u16 __pad_##name##1;
  12. struct sh_i2c {
  13. ureg(icdr);
  14. ureg(iccr);
  15. ureg(icsr);
  16. ureg(icic);
  17. ureg(iccl);
  18. ureg(icch);
  19. };
  20. #undef ureg
  21. static struct sh_i2c *base;
  22. /* ICCR */
  23. #define SH_I2C_ICCR_ICE (1 << 7)
  24. #define SH_I2C_ICCR_RACK (1 << 6)
  25. #define SH_I2C_ICCR_RTS (1 << 4)
  26. #define SH_I2C_ICCR_BUSY (1 << 2)
  27. #define SH_I2C_ICCR_SCP (1 << 0)
  28. /* ICSR / ICIC */
  29. #define SH_IC_BUSY (1 << 4)
  30. #define SH_IC_TACK (1 << 2)
  31. #define SH_IC_WAIT (1 << 1)
  32. #define SH_IC_DTE (1 << 0)
  33. #ifdef CONFIG_SH_I2C_8BIT
  34. /* store 8th bit of iccl and icch in ICIC register */
  35. #define SH_I2C_ICIC_ICCLB8 (1 << 7)
  36. #define SH_I2C_ICIC_ICCHB8 (1 << 6)
  37. #endif
  38. static u16 iccl, icch;
  39. #define IRQ_WAIT 1000
  40. static void irq_dte(struct sh_i2c *base)
  41. {
  42. int i;
  43. for (i = 0 ; i < IRQ_WAIT ; i++) {
  44. if (SH_IC_DTE & readb(&base->icsr))
  45. break;
  46. udelay(10);
  47. }
  48. }
  49. static int irq_dte_with_tack(struct sh_i2c *base)
  50. {
  51. int i;
  52. for (i = 0 ; i < IRQ_WAIT ; i++) {
  53. if (SH_IC_DTE & readb(&base->icsr))
  54. break;
  55. if (SH_IC_TACK & readb(&base->icsr))
  56. return -1;
  57. udelay(10);
  58. }
  59. return 0;
  60. }
  61. static void irq_busy(struct sh_i2c *base)
  62. {
  63. int i;
  64. for (i = 0 ; i < IRQ_WAIT ; i++) {
  65. if (!(SH_IC_BUSY & readb(&base->icsr)))
  66. break;
  67. udelay(10);
  68. }
  69. }
  70. static int i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg, int stop)
  71. {
  72. u8 icic = SH_IC_TACK;
  73. clrbits_8(&base->iccr, SH_I2C_ICCR_ICE);
  74. setbits_8(&base->iccr, SH_I2C_ICCR_ICE);
  75. writeb(iccl & 0xff, &base->iccl);
  76. writeb(icch & 0xff, &base->icch);
  77. #ifdef CONFIG_SH_I2C_8BIT
  78. if (iccl > 0xff)
  79. icic |= SH_I2C_ICIC_ICCLB8;
  80. if (icch > 0xff)
  81. icic |= SH_I2C_ICIC_ICCHB8;
  82. #endif
  83. writeb(icic, &base->icic);
  84. writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), &base->iccr);
  85. irq_dte(base);
  86. clrbits_8(&base->icsr, SH_IC_TACK);
  87. writeb(id << 1, &base->icdr);
  88. if (irq_dte_with_tack(base) != 0)
  89. return -1;
  90. writeb(reg, &base->icdr);
  91. if (stop)
  92. writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS), &base->iccr);
  93. if (irq_dte_with_tack(base) != 0)
  94. return -1;
  95. return 0;
  96. }
  97. static void i2c_finish(struct sh_i2c *base)
  98. {
  99. writeb(0, &base->icsr);
  100. clrbits_8(&base->iccr, SH_I2C_ICCR_ICE);
  101. }
  102. static int i2c_raw_write(struct sh_i2c *base, u8 id, u8 reg, u8 val)
  103. {
  104. int ret = -1;
  105. if (i2c_set_addr(base, id, reg, 0) != 0)
  106. goto exit0;
  107. udelay(10);
  108. writeb(val, &base->icdr);
  109. if (irq_dte_with_tack(base) != 0)
  110. goto exit0;
  111. writeb((SH_I2C_ICCR_ICE | SH_I2C_ICCR_RTS), &base->iccr);
  112. if (irq_dte_with_tack(base) != 0)
  113. goto exit0;
  114. irq_busy(base);
  115. ret = 0;
  116. exit0:
  117. i2c_finish(base);
  118. return ret;
  119. }
  120. static int i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
  121. {
  122. int ret = -1;
  123. #if defined(CONFIG_SH73A0)
  124. if (i2c_set_addr(base, id, reg, 0) != 0)
  125. goto exit0;
  126. #else
  127. if (i2c_set_addr(base, id, reg, 1) != 0)
  128. goto exit0;
  129. udelay(100);
  130. #endif
  131. writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), &base->iccr);
  132. irq_dte(base);
  133. writeb(id << 1 | 0x01, &base->icdr);
  134. if (irq_dte_with_tack(base) != 0)
  135. goto exit0;
  136. writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_SCP), &base->iccr);
  137. if (irq_dte_with_tack(base) != 0)
  138. goto exit0;
  139. ret = readb(&base->icdr) & 0xff;
  140. writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RACK), &base->iccr);
  141. readb(&base->icdr); /* Dummy read */
  142. irq_busy(base);
  143. exit0:
  144. i2c_finish(base);
  145. return ret;
  146. }
  147. #ifdef CONFIG_I2C_MULTI_BUS
  148. static unsigned int current_bus;
  149. /**
  150. * i2c_set_bus_num - change active I2C bus
  151. * @bus: bus index, zero based
  152. * @returns: 0 on success, non-0 on failure
  153. */
  154. int i2c_set_bus_num(unsigned int bus)
  155. {
  156. if ((bus < 0) || (bus >= CONFIG_SYS_MAX_I2C_BUS)) {
  157. printf("Bad bus: %d\n", bus);
  158. return -1;
  159. }
  160. switch (bus) {
  161. case 0:
  162. base = (void *)CONFIG_SH_I2C_BASE0;
  163. break;
  164. case 1:
  165. base = (void *)CONFIG_SH_I2C_BASE1;
  166. break;
  167. #ifdef CONFIG_SH_I2C_BASE2
  168. case 2:
  169. base = (void *)CONFIG_SH_I2C_BASE2;
  170. break;
  171. #endif
  172. #ifdef CONFIG_SH_I2C_BASE3
  173. case 3:
  174. base = (void *)CONFIG_SH_I2C_BASE3;
  175. break;
  176. #endif
  177. #ifdef CONFIG_SH_I2C_BASE4
  178. case 4:
  179. base = (void *)CONFIG_SH_I2C_BASE4;
  180. break;
  181. #endif
  182. default:
  183. return -1;
  184. }
  185. current_bus = bus;
  186. return 0;
  187. }
  188. /**
  189. * i2c_get_bus_num - returns index of active I2C bus
  190. */
  191. unsigned int i2c_get_bus_num(void)
  192. {
  193. return current_bus;
  194. }
  195. #endif
  196. #define SH_I2C_ICCL_CALC(clk, date, t_low, t_high) \
  197. ((clk / rate) * (t_low / t_low + t_high))
  198. #define SH_I2C_ICCH_CALC(clk, date, t_low, t_high) \
  199. ((clk / rate) * (t_high / t_low + t_high))
  200. void i2c_init(int speed, int slaveaddr)
  201. {
  202. int num, denom, tmp;
  203. /* No i2c support prior to relocation */
  204. if (!(gd->flags & GD_FLG_RELOC))
  205. return;
  206. #ifdef CONFIG_I2C_MULTI_BUS
  207. current_bus = 0;
  208. #endif
  209. base = (struct sh_i2c *)CONFIG_SH_I2C_BASE0;
  210. /*
  211. * Calculate the value for iccl. From the data sheet:
  212. * iccl = (p-clock / transfer-rate) * (L / (L + H))
  213. * where L and H are the SCL low and high ratio.
  214. */
  215. num = CONFIG_SH_I2C_CLOCK * CONFIG_SH_I2C_DATA_LOW;
  216. denom = speed * (CONFIG_SH_I2C_DATA_HIGH + CONFIG_SH_I2C_DATA_LOW);
  217. tmp = num * 10 / denom;
  218. if (tmp % 10 >= 5)
  219. iccl = (u16)((num/denom) + 1);
  220. else
  221. iccl = (u16)(num/denom);
  222. /* Calculate the value for icch. From the data sheet:
  223. icch = (p clock / transfer rate) * (H / (L + H)) */
  224. num = CONFIG_SH_I2C_CLOCK * CONFIG_SH_I2C_DATA_HIGH;
  225. tmp = num * 10 / denom;
  226. if (tmp % 10 >= 5)
  227. icch = (u16)((num/denom) + 1);
  228. else
  229. icch = (u16)(num/denom);
  230. }
  231. /*
  232. * i2c_read: - Read multiple bytes from an i2c device
  233. *
  234. * The higher level routines take into account that this function is only
  235. * called with len < page length of the device (see configuration file)
  236. *
  237. * @chip: address of the chip which is to be read
  238. * @addr: i2c data address within the chip
  239. * @alen: length of the i2c data address (1..2 bytes)
  240. * @buffer: where to write the data
  241. * @len: how much byte do we want to read
  242. * @return: 0 in case of success
  243. */
  244. int i2c_read(u8 chip, u32 addr, int alen, u8 *buffer, int len)
  245. {
  246. int ret;
  247. int i = 0;
  248. for (i = 0 ; i < len ; i++) {
  249. ret = i2c_raw_read(base, chip, addr + i);
  250. if (ret < 0)
  251. return -1;
  252. buffer[i] = ret & 0xff;
  253. }
  254. return 0;
  255. }
  256. /*
  257. * i2c_write: - Write multiple bytes to an i2c device
  258. *
  259. * The higher level routines take into account that this function is only
  260. * called with len < page length of the device (see configuration file)
  261. *
  262. * @chip: address of the chip which is to be written
  263. * @addr: i2c data address within the chip
  264. * @alen: length of the i2c data address (1..2 bytes)
  265. * @buffer: where to find the data to be written
  266. * @len: how much byte do we want to read
  267. * @return: 0 in case of success
  268. */
  269. int i2c_write(u8 chip, u32 addr, int alen, u8 *buffer, int len)
  270. {
  271. int i = 0;
  272. for (i = 0; i < len ; i++)
  273. if (i2c_raw_write(base, chip, addr + i, buffer[i]) != 0)
  274. return -1;
  275. return 0;
  276. }
  277. /*
  278. * i2c_probe: - Test if a chip answers for a given i2c address
  279. *
  280. * @chip: address of the chip which is searched for
  281. * @return: 0 if a chip was found, -1 otherwhise
  282. */
  283. int i2c_probe(u8 chip)
  284. {
  285. int ret;
  286. ret = i2c_set_addr(base, chip, 0, 1);
  287. i2c_finish(base);
  288. return ret;
  289. }