Kconfig 35 KB

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  1. menu "ARM architecture"
  2. depends on ARM
  3. config SYS_ARCH
  4. default "arm"
  5. config ARM64
  6. bool
  7. select PHYS_64BIT
  8. select SYS_CACHE_SHIFT_6
  9. if ARM64
  10. config POSITION_INDEPENDENT
  11. bool "Generate position-independent pre-relocation code"
  12. help
  13. U-Boot expects to be linked to a specific hard-coded address, and to
  14. be loaded to and run from that address. This option lifts that
  15. restriction, thus allowing the code to be loaded to and executed
  16. from almost any address. This logic relies on the relocation
  17. information that is embedded into the binary to support U-Boot
  18. relocating itself to the top-of-RAM later during execution.
  19. config SYS_INIT_SP_BSS_OFFSET
  20. int
  21. help
  22. U-Boot typically uses a hard-coded value for the stack pointer
  23. before relocation. Define this option to instead calculate the
  24. initial SP at run-time. This is useful to avoid hard-coding addresses
  25. into U-Boot, so that can be loaded and executed at arbitrary
  26. addresses and thus avoid using arbitrary addresses at runtime. This
  27. option's value is the offset added to &_bss_start in order to
  28. calculate the stack pointer. This offset should be large enough so
  29. that the early malloc region, global data (gd), and early stack usage
  30. do not overlap any appended DTB.
  31. config LINUX_KERNEL_IMAGE_HEADER
  32. bool
  33. help
  34. Place a Linux kernel image header at the start of the U-Boot binary.
  35. The format of the header is described in the Linux kernel source at
  36. Documentation/arm64/booting.txt. This feature is useful since the
  37. image header reports the amount of memory (BSS and similar) that
  38. U-Boot needs to use, but which isn't part of the binary.
  39. if LINUX_KERNEL_IMAGE_HEADER
  40. config LNX_KRNL_IMG_TEXT_OFFSET_BASE
  41. hex
  42. help
  43. The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
  44. TEXT_OFFSET value written in to the Linux kernel image header.
  45. endif
  46. endif
  47. config STATIC_RELA
  48. bool
  49. default y if ARM64 && !POSITION_INDEPENDENT
  50. config DMA_ADDR_T_64BIT
  51. bool
  52. default y if ARM64
  53. config HAS_VBAR
  54. bool
  55. config HAS_THUMB2
  56. bool
  57. # Used for compatibility with asm files copied from the kernel
  58. config ARM_ASM_UNIFIED
  59. bool
  60. default y
  61. # Used for compatibility with asm files copied from the kernel
  62. config THUMB2_KERNEL
  63. bool
  64. config SYS_ARM_CACHE_CP15
  65. bool "CP15 based cache enabling support"
  66. help
  67. Select this if your processor suports enabling caches by using
  68. CP15 registers.
  69. config SYS_ARM_MMU
  70. bool "MMU-based Paged Memory Management Support"
  71. select SYS_ARM_CACHE_CP15
  72. help
  73. Select if you want MMU-based virtualised addressing space
  74. support by paged memory management.
  75. config SYS_ARM_MPU
  76. bool 'Use the ARM v7 PMSA Compliant MPU'
  77. help
  78. Some ARM systems without an MMU have instead a Memory Protection
  79. Unit (MPU) that defines the type and permissions for regions of
  80. memory.
  81. If your CPU has an MPU then you should choose 'y' here unless you
  82. know that you do not want to use the MPU.
  83. # If set, the workarounds for these ARM errata are applied early during U-Boot
  84. # startup. Note that in general these options force the workarounds to be
  85. # applied; no CPU-type/version detection exists, unlike the similar options in
  86. # the Linux kernel. Do not set these options unless they apply! Also note that
  87. # the following can be machine specific errata. These do have ability to
  88. # provide rudimentary version and machine specific checks, but expect no
  89. # product checks:
  90. # CONFIG_ARM_ERRATA_430973
  91. # CONFIG_ARM_ERRATA_454179
  92. # CONFIG_ARM_ERRATA_621766
  93. # CONFIG_ARM_ERRATA_798870
  94. # CONFIG_ARM_ERRATA_801819
  95. # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
  96. # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
  97. config ARM_ERRATA_430973
  98. bool
  99. config ARM_ERRATA_454179
  100. bool
  101. config ARM_ERRATA_621766
  102. bool
  103. config ARM_ERRATA_716044
  104. bool
  105. config ARM_ERRATA_725233
  106. bool
  107. config ARM_ERRATA_742230
  108. bool
  109. config ARM_ERRATA_743622
  110. bool
  111. config ARM_ERRATA_751472
  112. bool
  113. config ARM_ERRATA_761320
  114. bool
  115. config ARM_ERRATA_773022
  116. bool
  117. config ARM_ERRATA_774769
  118. bool
  119. config ARM_ERRATA_794072
  120. bool
  121. config ARM_ERRATA_798870
  122. bool
  123. config ARM_ERRATA_801819
  124. bool
  125. config ARM_ERRATA_826974
  126. bool
  127. config ARM_ERRATA_828024
  128. bool
  129. config ARM_ERRATA_829520
  130. bool
  131. config ARM_ERRATA_833069
  132. bool
  133. config ARM_ERRATA_833471
  134. bool
  135. config ARM_ERRATA_845369
  136. bool
  137. config ARM_ERRATA_852421
  138. bool
  139. config ARM_ERRATA_852423
  140. bool
  141. config ARM_ERRATA_855873
  142. bool
  143. config ARM_CORTEX_A8_CVE_2017_5715
  144. bool
  145. config ARM_CORTEX_A15_CVE_2017_5715
  146. bool
  147. config CPU_ARM720T
  148. bool
  149. select SYS_CACHE_SHIFT_5
  150. imply SYS_ARM_MMU
  151. config CPU_ARM920T
  152. bool
  153. select SYS_CACHE_SHIFT_5
  154. imply SYS_ARM_MMU
  155. config CPU_ARM926EJS
  156. bool
  157. select SYS_CACHE_SHIFT_5
  158. imply SYS_ARM_MMU
  159. config CPU_ARM946ES
  160. bool
  161. select SYS_CACHE_SHIFT_5
  162. imply SYS_ARM_MMU
  163. config CPU_ARM1136
  164. bool
  165. select SYS_CACHE_SHIFT_5
  166. imply SYS_ARM_MMU
  167. config CPU_ARM1176
  168. bool
  169. select HAS_VBAR
  170. select SYS_CACHE_SHIFT_5
  171. imply SYS_ARM_MMU
  172. config CPU_V7A
  173. bool
  174. select HAS_THUMB2
  175. select HAS_VBAR
  176. select SYS_CACHE_SHIFT_6
  177. imply SYS_ARM_MMU
  178. config CPU_V7M
  179. bool
  180. select HAS_THUMB2
  181. select SYS_ARM_MPU
  182. select SYS_CACHE_SHIFT_5
  183. select SYS_THUMB_BUILD
  184. select THUMB2_KERNEL
  185. config CPU_V7R
  186. bool
  187. select HAS_THUMB2
  188. select SYS_ARM_CACHE_CP15
  189. select SYS_ARM_MPU
  190. select SYS_CACHE_SHIFT_6
  191. config CPU_PXA
  192. bool
  193. select SYS_CACHE_SHIFT_5
  194. imply SYS_ARM_MMU
  195. config CPU_SA1100
  196. bool
  197. select SYS_CACHE_SHIFT_5
  198. imply SYS_ARM_MMU
  199. config SYS_CPU
  200. default "arm720t" if CPU_ARM720T
  201. default "arm920t" if CPU_ARM920T
  202. default "arm926ejs" if CPU_ARM926EJS
  203. default "arm946es" if CPU_ARM946ES
  204. default "arm1136" if CPU_ARM1136
  205. default "arm1176" if CPU_ARM1176
  206. default "armv7" if CPU_V7A
  207. default "armv7" if CPU_V7R
  208. default "armv7m" if CPU_V7M
  209. default "pxa" if CPU_PXA
  210. default "sa1100" if CPU_SA1100
  211. default "armv8" if ARM64
  212. config SYS_ARM_ARCH
  213. int
  214. default 4 if CPU_ARM720T
  215. default 4 if CPU_ARM920T
  216. default 5 if CPU_ARM926EJS
  217. default 5 if CPU_ARM946ES
  218. default 6 if CPU_ARM1136
  219. default 6 if CPU_ARM1176
  220. default 7 if CPU_V7A
  221. default 7 if CPU_V7M
  222. default 7 if CPU_V7R
  223. default 5 if CPU_PXA
  224. default 4 if CPU_SA1100
  225. default 8 if ARM64
  226. config SYS_CACHE_SHIFT_5
  227. bool
  228. config SYS_CACHE_SHIFT_6
  229. bool
  230. config SYS_CACHE_SHIFT_7
  231. bool
  232. config SYS_CACHELINE_SIZE
  233. int
  234. default 128 if SYS_CACHE_SHIFT_7
  235. default 64 if SYS_CACHE_SHIFT_6
  236. default 32 if SYS_CACHE_SHIFT_5
  237. config SYS_ARCH_TIMER
  238. bool "ARM Generic Timer support"
  239. depends on CPU_V7A || ARM64
  240. default y if ARM64
  241. help
  242. The ARM Generic Timer (aka arch-timer) provides an architected
  243. interface to a timer source on an SoC.
  244. It is mandantory for ARMv8 implementation and widely available
  245. on ARMv7 systems.
  246. config ARM_SMCCC
  247. bool "Support for ARM SMC Calling Convention (SMCCC)"
  248. depends on CPU_V7A || ARM64
  249. select ARM_PSCI_FW
  250. help
  251. Say Y here if you want to enable ARM SMC Calling Convention.
  252. This should be enabled if U-Boot needs to communicate with system
  253. firmware (for example, PSCI) according to SMCCC.
  254. config SEMIHOSTING
  255. bool "support boot from semihosting"
  256. help
  257. In emulated environments, semihosting is a way for
  258. the hosted environment to call out to the emulator to
  259. retrieve files from the host machine.
  260. config SYS_THUMB_BUILD
  261. bool "Build U-Boot using the Thumb instruction set"
  262. depends on !ARM64
  263. help
  264. Use this flag to build U-Boot using the Thumb instruction set for
  265. ARM architectures. Thumb instruction set provides better code
  266. density. For ARM architectures that support Thumb2 this flag will
  267. result in Thumb2 code generated by GCC.
  268. config SPL_SYS_THUMB_BUILD
  269. bool "Build SPL using the Thumb instruction set"
  270. default y if SYS_THUMB_BUILD
  271. depends on !ARM64
  272. help
  273. Use this flag to build SPL using the Thumb instruction set for
  274. ARM architectures. Thumb instruction set provides better code
  275. density. For ARM architectures that support Thumb2 this flag will
  276. result in Thumb2 code generated by GCC.
  277. config SYS_L2CACHE_OFF
  278. bool "L2cache off"
  279. help
  280. If SoC does not support L2CACHE or one do not want to enable
  281. L2CACHE, choose this option.
  282. config ENABLE_ARM_SOC_BOOT0_HOOK
  283. bool "prepare BOOT0 header"
  284. help
  285. If the SoC's BOOT0 requires a header area filled with (magic)
  286. values, then choose this option, and create a file included as
  287. <asm/arch/boot0.h> which contains the required assembler code.
  288. config ARM_CORTEX_CPU_IS_UP
  289. bool
  290. default n
  291. config USE_ARCH_MEMCPY
  292. bool "Use an assembly optimized implementation of memcpy"
  293. default y
  294. depends on !ARM64
  295. help
  296. Enable the generation of an optimized version of memcpy.
  297. Such implementation may be faster under some conditions
  298. but may increase the binary size.
  299. config SPL_USE_ARCH_MEMCPY
  300. bool "Use an assembly optimized implementation of memcpy for SPL"
  301. default y if USE_ARCH_MEMCPY
  302. depends on !ARM64
  303. help
  304. Enable the generation of an optimized version of memcpy.
  305. Such implementation may be faster under some conditions
  306. but may increase the binary size.
  307. config USE_ARCH_MEMSET
  308. bool "Use an assembly optimized implementation of memset"
  309. default y
  310. depends on !ARM64
  311. help
  312. Enable the generation of an optimized version of memset.
  313. Such implementation may be faster under some conditions
  314. but may increase the binary size.
  315. config SPL_USE_ARCH_MEMSET
  316. bool "Use an assembly optimized implementation of memset for SPL"
  317. default y if USE_ARCH_MEMSET
  318. depends on !ARM64
  319. help
  320. Enable the generation of an optimized version of memset.
  321. Such implementation may be faster under some conditions
  322. but may increase the binary size.
  323. config ARM64_SUPPORT_AARCH32
  324. bool "ARM64 system support AArch32 execution state"
  325. default y if ARM64 && !TARGET_THUNDERX_88XX
  326. help
  327. This ARM64 system supports AArch32 execution state.
  328. choice
  329. prompt "Target select"
  330. default TARGET_HIKEY
  331. config ARCH_AT91
  332. bool "Atmel AT91"
  333. select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
  334. config TARGET_EDB93XX
  335. bool "Support edb93xx"
  336. select CPU_ARM920T
  337. select PL010_SERIAL
  338. config TARGET_ASPENITE
  339. bool "Support aspenite"
  340. select CPU_ARM926EJS
  341. config TARGET_GPLUGD
  342. bool "Support gplugd"
  343. select CPU_ARM926EJS
  344. config ARCH_DAVINCI
  345. bool "TI DaVinci"
  346. select CPU_ARM926EJS
  347. imply CMD_SAVES
  348. help
  349. Support for TI's DaVinci platform.
  350. config KIRKWOOD
  351. bool "Marvell Kirkwood"
  352. select ARCH_MISC_INIT
  353. select BOARD_EARLY_INIT_F
  354. select CPU_ARM926EJS
  355. config ARCH_MVEBU
  356. bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
  357. select DM
  358. select DM_ETH
  359. select DM_SERIAL
  360. select DM_SPI
  361. select DM_SPI_FLASH
  362. select OF_CONTROL
  363. select OF_SEPARATE
  364. select SPI
  365. imply CMD_DM
  366. config TARGET_DEVKIT3250
  367. bool "Support devkit3250"
  368. select CPU_ARM926EJS
  369. select SUPPORT_SPL
  370. config TARGET_WORK_92105
  371. bool "Support work_92105"
  372. select CPU_ARM926EJS
  373. select SUPPORT_SPL
  374. config TARGET_APF27
  375. bool "Support apf27"
  376. select CPU_ARM926EJS
  377. select SUPPORT_SPL
  378. config ORION5X
  379. bool "Marvell Orion"
  380. select CPU_ARM926EJS
  381. config TARGET_SPEAR300
  382. bool "Support spear300"
  383. select BOARD_EARLY_INIT_F
  384. select CPU_ARM926EJS
  385. select PL011_SERIAL
  386. imply CMD_SAVES
  387. config TARGET_SPEAR310
  388. bool "Support spear310"
  389. select BOARD_EARLY_INIT_F
  390. select CPU_ARM926EJS
  391. select PL011_SERIAL
  392. imply CMD_SAVES
  393. config TARGET_SPEAR320
  394. bool "Support spear320"
  395. select BOARD_EARLY_INIT_F
  396. select CPU_ARM926EJS
  397. select PL011_SERIAL
  398. imply CMD_SAVES
  399. config TARGET_SPEAR600
  400. bool "Support spear600"
  401. select BOARD_EARLY_INIT_F
  402. select CPU_ARM926EJS
  403. select PL011_SERIAL
  404. imply CMD_SAVES
  405. config TARGET_STV0991
  406. bool "Support stv0991"
  407. select CPU_V7A
  408. select DM
  409. select DM_SERIAL
  410. select DM_SPI
  411. select DM_SPI_FLASH
  412. select PL01X_SERIAL
  413. select SPI
  414. select SPI_FLASH
  415. imply CMD_DM
  416. config TARGET_X600
  417. bool "Support x600"
  418. select BOARD_LATE_INIT
  419. select CPU_ARM926EJS
  420. select PL011_SERIAL
  421. select SUPPORT_SPL
  422. config TARGET_WOODBURN
  423. bool "Support woodburn"
  424. select CPU_ARM1136
  425. config TARGET_WOODBURN_SD
  426. bool "Support woodburn_sd"
  427. select CPU_ARM1136
  428. select SUPPORT_SPL
  429. config TARGET_FLEA3
  430. bool "Support flea3"
  431. select CPU_ARM1136
  432. config TARGET_MX35PDK
  433. bool "Support mx35pdk"
  434. select BOARD_LATE_INIT
  435. select CPU_ARM1136
  436. config ARCH_BCM283X
  437. bool "Broadcom BCM283X family"
  438. select DM
  439. select DM_GPIO
  440. select DM_SERIAL
  441. select OF_CONTROL
  442. select PL01X_SERIAL
  443. select SERIAL_SEARCH_ALL
  444. imply CMD_DM
  445. imply FAT_WRITE
  446. config TARGET_VEXPRESS_CA15_TC2
  447. bool "Support vexpress_ca15_tc2"
  448. select CPU_V7A
  449. select CPU_V7_HAS_NONSEC
  450. select CPU_V7_HAS_VIRT
  451. select PL011_SERIAL
  452. config ARCH_BCMSTB
  453. bool "Broadcom BCM7XXX family"
  454. select CPU_V7A
  455. select DM
  456. select OF_CONTROL
  457. select OF_PRIOR_STAGE
  458. imply CMD_DM
  459. help
  460. This enables support for Broadcom ARM-based set-top box
  461. chipsets, including the 7445 family of chips.
  462. config TARGET_VEXPRESS_CA5X2
  463. bool "Support vexpress_ca5x2"
  464. select CPU_V7A
  465. select PL011_SERIAL
  466. config TARGET_VEXPRESS_CA9X4
  467. bool "Support vexpress_ca9x4"
  468. select CPU_V7A
  469. select PL011_SERIAL
  470. config TARGET_BCM23550_W1D
  471. bool "Support bcm23550_w1d"
  472. select CPU_V7A
  473. imply CRC32_VERIFY
  474. imply FAT_WRITE
  475. config TARGET_BCM28155_AP
  476. bool "Support bcm28155_ap"
  477. select CPU_V7A
  478. imply CRC32_VERIFY
  479. imply FAT_WRITE
  480. config TARGET_BCMCYGNUS
  481. bool "Support bcmcygnus"
  482. select CPU_V7A
  483. imply BCM_SF2_ETH
  484. imply BCM_SF2_ETH_GMAC
  485. imply CMD_HASH
  486. imply CRC32_VERIFY
  487. imply FAT_WRITE
  488. imply HASH_VERIFY
  489. imply NETDEVICES
  490. config TARGET_BCMNSP
  491. bool "Support bcmnsp"
  492. select CPU_V7A
  493. config TARGET_BCMNS2
  494. bool "Support Broadcom Northstar2"
  495. select ARM64
  496. help
  497. Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
  498. ARMv8 Cortex-A57 processors targeting a broad range of networking
  499. applications
  500. config ARCH_EXYNOS
  501. bool "Samsung EXYNOS"
  502. select DM
  503. select DM_GPIO
  504. select DM_I2C
  505. select DM_KEYBOARD
  506. select DM_SERIAL
  507. select DM_SPI
  508. select DM_SPI_FLASH
  509. select SPI
  510. imply CMD_DM
  511. imply FAT_WRITE
  512. config ARCH_S5PC1XX
  513. bool "Samsung S5PC1XX"
  514. select CPU_V7A
  515. select DM
  516. select DM_GPIO
  517. select DM_I2C
  518. select DM_SERIAL
  519. imply CMD_DM
  520. config ARCH_HIGHBANK
  521. bool "Calxeda Highbank"
  522. select CPU_V7A
  523. select PL011_SERIAL
  524. config ARCH_INTEGRATOR
  525. bool "ARM Ltd. Integrator family"
  526. select DM
  527. select DM_SERIAL
  528. select PL01X_SERIAL
  529. imply CMD_DM
  530. config ARCH_KEYSTONE
  531. bool "TI Keystone"
  532. select CMD_POWEROFF
  533. select CPU_V7A
  534. select SUPPORT_SPL
  535. select SYS_ARCH_TIMER
  536. select SYS_THUMB_BUILD
  537. imply CMD_MTDPARTS
  538. imply CMD_SAVES
  539. imply FIT
  540. config ARCH_K3
  541. bool "Texas Instruments' K3 Architecture"
  542. select SPL
  543. select SUPPORT_SPL
  544. select FIT
  545. config ARCH_OMAP2PLUS
  546. bool "TI OMAP2+"
  547. select CPU_V7A
  548. select SPL_BOARD_INIT if SPL
  549. select SPL_STACK_R if SPL
  550. select SUPPORT_SPL
  551. imply FIT
  552. config ARCH_MESON
  553. bool "Amlogic Meson"
  554. imply DISTRO_DEFAULTS
  555. help
  556. Support for the Meson SoC family developed by Amlogic Inc.,
  557. targeted at media players and tablet computers. We currently
  558. support the S905 (GXBaby) 64-bit SoC.
  559. config ARCH_MX8M
  560. bool "NXP i.MX8M platform"
  561. select ARM64
  562. select DM
  563. select SUPPORT_SPL
  564. imply CMD_DM
  565. config ARCH_MX23
  566. bool "NXP i.MX23 family"
  567. select CPU_ARM926EJS
  568. select PL011_SERIAL
  569. select SUPPORT_SPL
  570. config ARCH_MX25
  571. bool "NXP MX25"
  572. select CPU_ARM926EJS
  573. imply MXC_GPIO
  574. config ARCH_MX28
  575. bool "NXP i.MX28 family"
  576. select CPU_ARM926EJS
  577. select PL011_SERIAL
  578. select SUPPORT_SPL
  579. config ARCH_MX31
  580. bool "NXP i.MX31 family"
  581. select CPU_ARM1136
  582. config ARCH_MX7ULP
  583. bool "NXP MX7ULP"
  584. select CPU_V7A
  585. select ROM_UNIFIED_SECTIONS
  586. imply MXC_GPIO
  587. config ARCH_MX7
  588. bool "Freescale MX7"
  589. select ARCH_MISC_INIT
  590. select BOARD_EARLY_INIT_F
  591. select CPU_V7A
  592. select SYS_FSL_HAS_SEC if SECURE_BOOT
  593. select SYS_FSL_SEC_COMPAT_4
  594. select SYS_FSL_SEC_LE
  595. imply MXC_GPIO
  596. config ARCH_MX6
  597. bool "Freescale MX6"
  598. select CPU_V7A
  599. select SYS_FSL_HAS_SEC if SECURE_BOOT
  600. select SYS_FSL_SEC_COMPAT_4
  601. select SYS_FSL_SEC_LE
  602. select SYS_THUMB_BUILD if SPL
  603. imply MXC_GPIO
  604. if ARCH_MX6
  605. config SPL_LDSCRIPT
  606. default "arch/arm/mach-omap2/u-boot-spl.lds"
  607. endif
  608. config ARCH_MX5
  609. bool "Freescale MX5"
  610. select BOARD_EARLY_INIT_F
  611. select CPU_V7A
  612. imply MXC_GPIO
  613. config ARCH_OWL
  614. bool "Actions Semi OWL SoCs"
  615. select ARM64
  616. select DM
  617. select DM_SERIAL
  618. select OF_CONTROL
  619. imply CMD_DM
  620. config ARCH_QEMU
  621. bool "QEMU Virtual Platform"
  622. select DM
  623. select DM_SERIAL
  624. select OF_CONTROL
  625. select PL01X_SERIAL
  626. imply CMD_DM
  627. imply DM_RTC
  628. imply RTC_PL031
  629. config ARCH_RMOBILE
  630. bool "Renesas ARM SoCs"
  631. select BOARD_EARLY_INIT_F
  632. select DM
  633. select DM_SERIAL
  634. imply CMD_DM
  635. imply FAT_WRITE
  636. imply SYS_THUMB_BUILD
  637. config TARGET_S32V234EVB
  638. bool "Support s32v234evb"
  639. select ARM64
  640. select SYS_FSL_ERRATUM_ESDHC111
  641. config ARCH_SNAPDRAGON
  642. bool "Qualcomm Snapdragon SoCs"
  643. select ARM64
  644. select DM
  645. select DM_GPIO
  646. select DM_SERIAL
  647. select MSM_SMEM
  648. select OF_CONTROL
  649. select OF_SEPARATE
  650. select SMEM
  651. select SPMI
  652. imply CMD_DM
  653. config ARCH_SOCFPGA
  654. bool "Altera SOCFPGA family"
  655. select ARCH_EARLY_INIT_R
  656. select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
  657. select ARM64 if TARGET_SOCFPGA_STRATIX10
  658. select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  659. select DM
  660. select DM_SERIAL
  661. select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  662. select OF_CONTROL
  663. select SPL_DM_RESET if DM_RESET
  664. select SPL_DM_SERIAL
  665. select SPL_LIBCOMMON_SUPPORT
  666. select SPL_LIBDISK_SUPPORT
  667. select SPL_LIBGENERIC_SUPPORT
  668. select SPL_MMC_SUPPORT if DM_MMC
  669. select SPL_NAND_SUPPORT if SPL_NAND_DENALI
  670. select SPL_OF_CONTROL
  671. select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
  672. select SPL_SERIAL_SUPPORT
  673. select SPL_SPI_FLASH_SUPPORT if SPL_SPI_SUPPORT
  674. select SPL_SPI_SUPPORT if DM_SPI
  675. select SPL_WATCHDOG_SUPPORT
  676. select SUPPORT_SPL
  677. select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
  678. select SYS_NS16550
  679. select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  680. imply CMD_DM
  681. imply CMD_MTDPARTS
  682. imply CRC32_VERIFY
  683. imply DM_SPI
  684. imply DM_SPI_FLASH
  685. imply FAT_WRITE
  686. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
  687. config ARCH_SUNXI
  688. bool "Support sunxi (Allwinner) SoCs"
  689. select BINMAN
  690. select CMD_GPIO
  691. select CMD_MMC if MMC
  692. select CMD_USB if DISTRO_DEFAULTS
  693. select DM
  694. select DM_ETH
  695. select DM_GPIO
  696. select DM_KEYBOARD
  697. select DM_SERIAL
  698. select DM_USB if DISTRO_DEFAULTS
  699. select OF_BOARD_SETUP
  700. select OF_CONTROL
  701. select OF_SEPARATE
  702. select SPECIFY_CONSOLE_INDEX
  703. select SPL_STACK_R if SPL
  704. select SPL_SYS_MALLOC_SIMPLE if SPL
  705. select SPL_SYS_THUMB_BUILD if !ARM64
  706. select SYS_NS16550
  707. select SYS_THUMB_BUILD if !ARM64
  708. select USB if DISTRO_DEFAULTS
  709. select USB_KEYBOARD if DISTRO_DEFAULTS
  710. select USB_STORAGE if DISTRO_DEFAULTS
  711. select USE_TINY_PRINTF
  712. imply CMD_DM
  713. imply CMD_GPT
  714. imply CMD_UBI if NAND
  715. imply DISTRO_DEFAULTS
  716. imply FAT_WRITE
  717. imply OF_LIBFDT_OVERLAY
  718. imply PRE_CONSOLE_BUFFER
  719. imply SPL_GPIO_SUPPORT
  720. imply SPL_LIBCOMMON_SUPPORT
  721. imply SPL_LIBDISK_SUPPORT
  722. imply SPL_LIBGENERIC_SUPPORT
  723. imply SPL_MMC_SUPPORT if MMC
  724. imply SPL_POWER_SUPPORT
  725. imply SPL_SERIAL_SUPPORT
  726. imply USB_GADGET
  727. config ARCH_VERSAL
  728. bool "Support Xilinx Versal Platform"
  729. select ARM64
  730. select CLK
  731. select DM
  732. select DM_SERIAL
  733. select OF_CONTROL
  734. config ARCH_VF610
  735. bool "Freescale Vybrid"
  736. select CPU_V7A
  737. select SYS_FSL_ERRATUM_ESDHC111
  738. imply CMD_MTDPARTS
  739. imply NAND
  740. config ARCH_ZYNQ
  741. bool "Xilinx Zynq based platform"
  742. select BOARD_EARLY_INIT_F if WDT
  743. select CLK
  744. select CLK_ZYNQ
  745. select CPU_V7A
  746. select DM
  747. select DM_ETH if NET
  748. select DM_MMC if MMC
  749. select DM_SERIAL
  750. select DM_SPI
  751. select DM_SPI_FLASH
  752. select DM_USB if USB
  753. select OF_CONTROL
  754. select SPI
  755. select SPL_BOARD_INIT if SPL
  756. select SPL_CLK if SPL
  757. select SPL_DM if SPL
  758. select SPL_OF_CONTROL if SPL
  759. select SPL_SEPARATE_BSS if SPL
  760. select SUPPORT_SPL
  761. imply ARCH_EARLY_INIT_R
  762. imply BOARD_LATE_INIT
  763. imply CMD_CLK
  764. imply CMD_DM
  765. imply CMD_SPL
  766. imply FAT_WRITE
  767. config ARCH_ZYNQMP_R5
  768. bool "Xilinx ZynqMP R5 based platform"
  769. select CLK
  770. select CPU_V7R
  771. select DM
  772. select DM_SERIAL
  773. select OF_CONTROL
  774. imply CMD_DM
  775. config ARCH_ZYNQMP
  776. bool "Xilinx ZynqMP based platform"
  777. select ARM64
  778. select CLK
  779. select DM
  780. select DM_SERIAL
  781. select DM_USB if USB
  782. select OF_CONTROL
  783. select SPL_BOARD_INIT if SPL
  784. select SPL_CLK if SPL
  785. select SUPPORT_SPL
  786. imply BOARD_LATE_INIT
  787. imply CMD_DM
  788. imply FAT_WRITE
  789. config TEGRA
  790. bool "NVIDIA Tegra"
  791. imply DISTRO_DEFAULTS
  792. imply FAT_WRITE
  793. config TARGET_VEXPRESS64_AEMV8A
  794. bool "Support vexpress_aemv8a"
  795. select ARM64
  796. select PL01X_SERIAL
  797. config TARGET_VEXPRESS64_BASE_FVP
  798. bool "Support Versatile Express ARMv8a FVP BASE model"
  799. select ARM64
  800. select PL01X_SERIAL
  801. select SEMIHOSTING
  802. config TARGET_VEXPRESS64_BASE_FVP_DRAM
  803. bool "Support Versatile Express ARMv8a FVP BASE model booting from DRAM"
  804. select ARM64
  805. select PL01X_SERIAL
  806. help
  807. This target is derived from TARGET_VEXPRESS64_BASE_FVP and over-rides
  808. the default config to allow the user to load the images directly into
  809. DRAM using model parameters rather than by using semi-hosting to load
  810. the files from the host filesystem.
  811. config TARGET_VEXPRESS64_JUNO
  812. bool "Support Versatile Express Juno Development Platform"
  813. select ARM64
  814. select PL01X_SERIAL
  815. config TARGET_LS2080A_EMU
  816. bool "Support ls2080a_emu"
  817. select ARCH_LS2080A
  818. select ARCH_MISC_INIT
  819. select ARM64
  820. select ARMV8_MULTIENTRY
  821. help
  822. Support for Freescale LS2080A_EMU platform
  823. The LS2080A Development System (EMULATOR) is a pre silicon
  824. development platform that supports the QorIQ LS2080A
  825. Layerscape Architecture processor.
  826. config TARGET_LS2080A_SIMU
  827. bool "Support ls2080a_simu"
  828. select ARCH_LS2080A
  829. select ARCH_MISC_INIT
  830. select ARM64
  831. select ARMV8_MULTIENTRY
  832. help
  833. Support for Freescale LS2080A_SIMU platform
  834. The LS2080A Development System (QDS) is a pre silicon
  835. development platform that supports the QorIQ LS2080A
  836. Layerscape Architecture processor.
  837. config TARGET_LS1088AQDS
  838. bool "Support ls1088aqds"
  839. select ARCH_LS1088A
  840. select ARCH_MISC_INIT
  841. select ARM64
  842. select ARMV8_MULTIENTRY
  843. select BOARD_LATE_INIT
  844. select SUPPORT_SPL
  845. help
  846. Support for NXP LS1088AQDS platform
  847. The LS1088A Development System (QDS) is a high-performance
  848. development platform that supports the QorIQ LS1088A
  849. Layerscape Architecture processor.
  850. config TARGET_LS2080AQDS
  851. bool "Support ls2080aqds"
  852. select ARCH_LS2080A
  853. select ARCH_MISC_INIT
  854. select ARM64
  855. select ARMV8_MULTIENTRY
  856. select BOARD_LATE_INIT
  857. select SUPPORT_SPL
  858. imply SCSI
  859. imply SCSI_AHCI
  860. help
  861. Support for Freescale LS2080AQDS platform
  862. The LS2080A Development System (QDS) is a high-performance
  863. development platform that supports the QorIQ LS2080A
  864. Layerscape Architecture processor.
  865. config TARGET_LS2080ARDB
  866. bool "Support ls2080ardb"
  867. select ARCH_LS2080A
  868. select ARCH_MISC_INIT
  869. select ARM64
  870. select ARMV8_MULTIENTRY
  871. select BOARD_LATE_INIT
  872. select SUPPORT_SPL
  873. imply SCSI
  874. imply SCSI_AHCI
  875. help
  876. Support for Freescale LS2080ARDB platform.
  877. The LS2080A Reference design board (RDB) is a high-performance
  878. development platform that supports the QorIQ LS2080A
  879. Layerscape Architecture processor.
  880. config TARGET_LS2081ARDB
  881. bool "Support ls2081ardb"
  882. select ARCH_LS2080A
  883. select ARCH_MISC_INIT
  884. select ARM64
  885. select ARMV8_MULTIENTRY
  886. select BOARD_LATE_INIT
  887. select SUPPORT_SPL
  888. help
  889. Support for Freescale LS2081ARDB platform.
  890. The LS2081A Reference design board (RDB) is a high-performance
  891. development platform that supports the QorIQ LS2081A/LS2041A
  892. Layerscape Architecture processor.
  893. config TARGET_HIKEY
  894. bool "Support HiKey 96boards Consumer Edition Platform"
  895. select ARM64
  896. select DM
  897. select DM_GPIO
  898. select DM_SERIAL
  899. select OF_CONTROL
  900. select PL01X_SERIAL
  901. select SPECIFY_CONSOLE_INDEX
  902. imply CMD_DM
  903. help
  904. Support for HiKey 96boards platform. It features a HI6220
  905. SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
  906. config TARGET_POPLAR
  907. bool "Support Poplar 96boards Enterprise Edition Platform"
  908. select ARM64
  909. select DM
  910. select DM_SERIAL
  911. select DM_USB
  912. select OF_CONTROL
  913. select PL01X_SERIAL
  914. imply CMD_DM
  915. help
  916. Support for Poplar 96boards EE platform. It features a HI3798cv200
  917. SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
  918. making it capable of running any commercial set-top solution based on
  919. Linux or Android.
  920. config TARGET_LS1012AQDS
  921. bool "Support ls1012aqds"
  922. select ARCH_LS1012A
  923. select ARM64
  924. select BOARD_LATE_INIT
  925. help
  926. Support for Freescale LS1012AQDS platform.
  927. The LS1012A Development System (QDS) is a high-performance
  928. development platform that supports the QorIQ LS1012A
  929. Layerscape Architecture processor.
  930. config TARGET_LS1012ARDB
  931. bool "Support ls1012ardb"
  932. select ARCH_LS1012A
  933. select ARM64
  934. select BOARD_LATE_INIT
  935. imply SCSI
  936. imply SCSI_AHCI
  937. help
  938. Support for Freescale LS1012ARDB platform.
  939. The LS1012A Reference design board (RDB) is a high-performance
  940. development platform that supports the QorIQ LS1012A
  941. Layerscape Architecture processor.
  942. config TARGET_LS1012A2G5RDB
  943. bool "Support ls1012a2g5rdb"
  944. select ARCH_LS1012A
  945. select ARM64
  946. select BOARD_LATE_INIT
  947. imply SCSI
  948. help
  949. Support for Freescale LS1012A2G5RDB platform.
  950. The LS1012A 2G5 Reference design board (RDB) is a high-performance
  951. development platform that supports the QorIQ LS1012A
  952. Layerscape Architecture processor.
  953. config TARGET_LS1012AFRWY
  954. bool "Support ls1012afrwy"
  955. select ARCH_LS1012A
  956. select ARM64
  957. select BOARD_LATE_INIT
  958. imply SCSI
  959. imply SCSI_AHCI
  960. help
  961. Support for Freescale LS1012AFRWY platform.
  962. The LS1012A FRWY board (FRWY) is a high-performance
  963. development platform that supports the QorIQ LS1012A
  964. Layerscape Architecture processor.
  965. config TARGET_LS1012AFRDM
  966. bool "Support ls1012afrdm"
  967. select ARCH_LS1012A
  968. select ARM64
  969. help
  970. Support for Freescale LS1012AFRDM platform.
  971. The LS1012A Freedom board (FRDM) is a high-performance
  972. development platform that supports the QorIQ LS1012A
  973. Layerscape Architecture processor.
  974. config TARGET_LS1088ARDB
  975. bool "Support ls1088ardb"
  976. select ARCH_LS1088A
  977. select ARCH_MISC_INIT
  978. select ARM64
  979. select ARMV8_MULTIENTRY
  980. select BOARD_LATE_INIT
  981. select SUPPORT_SPL
  982. help
  983. Support for NXP LS1088ARDB platform.
  984. The LS1088A Reference design board (RDB) is a high-performance
  985. development platform that supports the QorIQ LS1088A
  986. Layerscape Architecture processor.
  987. config TARGET_LS1021AQDS
  988. bool "Support ls1021aqds"
  989. select ARCH_LS1021A
  990. select ARCH_SUPPORT_PSCI
  991. select BOARD_EARLY_INIT_F
  992. select BOARD_LATE_INIT
  993. select CPU_V7A
  994. select CPU_V7_HAS_NONSEC
  995. select CPU_V7_HAS_VIRT
  996. select LS1_DEEP_SLEEP
  997. select SUPPORT_SPL
  998. select SYS_FSL_DDR
  999. imply SCSI
  1000. config TARGET_LS1021ATWR
  1001. bool "Support ls1021atwr"
  1002. select ARCH_LS1021A
  1003. select ARCH_SUPPORT_PSCI
  1004. select BOARD_EARLY_INIT_F
  1005. select BOARD_LATE_INIT
  1006. select CPU_V7A
  1007. select CPU_V7_HAS_NONSEC
  1008. select CPU_V7_HAS_VIRT
  1009. select LS1_DEEP_SLEEP
  1010. select SUPPORT_SPL
  1011. imply SCSI
  1012. config TARGET_LS1021AIOT
  1013. bool "Support ls1021aiot"
  1014. select ARCH_LS1021A
  1015. select ARCH_SUPPORT_PSCI
  1016. select BOARD_LATE_INIT
  1017. select CPU_V7A
  1018. select CPU_V7_HAS_NONSEC
  1019. select CPU_V7_HAS_VIRT
  1020. select SUPPORT_SPL
  1021. imply SCSI
  1022. help
  1023. Support for Freescale LS1021AIOT platform.
  1024. The LS1021A Freescale board (IOT) is a high-performance
  1025. development platform that supports the QorIQ LS1021A
  1026. Layerscape Architecture processor.
  1027. config TARGET_LS1043AQDS
  1028. bool "Support ls1043aqds"
  1029. select ARCH_LS1043A
  1030. select ARM64
  1031. select ARMV8_MULTIENTRY
  1032. select BOARD_EARLY_INIT_F
  1033. select BOARD_LATE_INIT
  1034. select SUPPORT_SPL
  1035. imply SCSI
  1036. help
  1037. Support for Freescale LS1043AQDS platform.
  1038. config TARGET_LS1043ARDB
  1039. bool "Support ls1043ardb"
  1040. select ARCH_LS1043A
  1041. select ARM64
  1042. select ARMV8_MULTIENTRY
  1043. select BOARD_EARLY_INIT_F
  1044. select BOARD_LATE_INIT
  1045. select SUPPORT_SPL
  1046. imply SCSI
  1047. help
  1048. Support for Freescale LS1043ARDB platform.
  1049. config TARGET_LS1046AQDS
  1050. bool "Support ls1046aqds"
  1051. select ARCH_LS1046A
  1052. select ARM64
  1053. select ARMV8_MULTIENTRY
  1054. select BOARD_EARLY_INIT_F
  1055. select BOARD_LATE_INIT
  1056. select DM_SPI_FLASH if DM_SPI
  1057. select SUPPORT_SPL
  1058. imply SCSI
  1059. help
  1060. Support for Freescale LS1046AQDS platform.
  1061. The LS1046A Development System (QDS) is a high-performance
  1062. development platform that supports the QorIQ LS1046A
  1063. Layerscape Architecture processor.
  1064. config TARGET_LS1046ARDB
  1065. bool "Support ls1046ardb"
  1066. select ARCH_LS1046A
  1067. select ARM64
  1068. select ARMV8_MULTIENTRY
  1069. select BOARD_EARLY_INIT_F
  1070. select BOARD_LATE_INIT
  1071. select DM_SPI_FLASH if DM_SPI
  1072. select POWER_MC34VR500
  1073. select SUPPORT_SPL
  1074. imply SCSI
  1075. help
  1076. Support for Freescale LS1046ARDB platform.
  1077. The LS1046A Reference Design Board (RDB) is a high-performance
  1078. development platform that supports the QorIQ LS1046A
  1079. Layerscape Architecture processor.
  1080. config TARGET_H2200
  1081. bool "Support h2200"
  1082. select CPU_PXA
  1083. config TARGET_ZIPITZ2
  1084. bool "Support zipitz2"
  1085. select CPU_PXA
  1086. config TARGET_COLIBRI_PXA270
  1087. bool "Support colibri_pxa270"
  1088. select CPU_PXA
  1089. config ARCH_UNIPHIER
  1090. bool "Socionext UniPhier SoCs"
  1091. select BOARD_LATE_INIT
  1092. select DM
  1093. select DM_GPIO
  1094. select DM_I2C
  1095. select DM_MMC
  1096. select DM_RESET
  1097. select DM_SERIAL
  1098. select DM_USB
  1099. select OF_BOARD_SETUP
  1100. select OF_CONTROL
  1101. select OF_LIBFDT
  1102. select PINCTRL
  1103. select SPL_BOARD_INIT if SPL
  1104. select SPL_DM if SPL
  1105. select SPL_LIBCOMMON_SUPPORT if SPL
  1106. select SPL_LIBGENERIC_SUPPORT if SPL
  1107. select SPL_OF_CONTROL if SPL
  1108. select SPL_PINCTRL if SPL
  1109. select SUPPORT_SPL
  1110. imply CMD_DM
  1111. imply DISTRO_DEFAULTS
  1112. imply FAT_WRITE
  1113. help
  1114. Support for UniPhier SoC family developed by Socionext Inc.
  1115. (formerly, System LSI Business Division of Panasonic Corporation)
  1116. config STM32
  1117. bool "Support STMicroelectronics STM32 MCU with cortex M"
  1118. select CPU_V7M
  1119. select DM
  1120. select DM_SERIAL
  1121. imply CMD_DM
  1122. config ARCH_STI
  1123. bool "Support STMicrolectronics SoCs"
  1124. select BLK
  1125. select CPU_V7A
  1126. select DM
  1127. select DM_MMC
  1128. select DM_RESET
  1129. select DM_SERIAL
  1130. imply CMD_DM
  1131. help
  1132. Support for STMicroelectronics STiH407/10 SoC family.
  1133. This SoC is used on Linaro 96Board STiH410-B2260
  1134. config ARCH_STM32MP
  1135. bool "Support STMicroelectronics STM32MP Socs with cortex A"
  1136. select ARCH_MISC_INIT
  1137. select BOARD_LATE_INIT
  1138. select CLK
  1139. select DM
  1140. select DM_GPIO
  1141. select DM_RESET
  1142. select DM_SERIAL
  1143. select MISC
  1144. select OF_CONTROL
  1145. select OF_LIBFDT
  1146. select PINCTRL
  1147. select REGMAP
  1148. select SUPPORT_SPL
  1149. select SYSCON
  1150. select SYSRESET
  1151. select SYS_THUMB_BUILD
  1152. imply CMD_DM
  1153. help
  1154. Support for STM32MP SoC family developed by STMicroelectronics,
  1155. MPUs based on ARM cortex A core
  1156. U-BOOT is running in DDR and SPL support is the unsecure First Stage
  1157. BootLoader (FSBL)
  1158. config ARCH_ROCKCHIP
  1159. bool "Support Rockchip SoCs"
  1160. select BLK
  1161. select DM
  1162. select DM_GPIO
  1163. select DM_I2C
  1164. select DM_MMC
  1165. select DM_PWM
  1166. select DM_REGULATOR
  1167. select DM_SERIAL
  1168. select DM_SPI
  1169. select DM_SPI_FLASH
  1170. select DM_USB if USB
  1171. select ENABLE_ARM_SOC_BOOT0_HOOK
  1172. select OF_CONTROL
  1173. select SPI
  1174. select SPL_DM if SPL
  1175. select SPL_SYS_MALLOC_SIMPLE if SPL
  1176. select SYS_MALLOC_F
  1177. select SYS_THUMB_BUILD if !ARM64
  1178. imply ADC
  1179. imply CMD_DM
  1180. imply DISTRO_DEFAULTS
  1181. imply FAT_WRITE
  1182. imply SARADC_ROCKCHIP
  1183. imply SPL_SYSRESET
  1184. imply SYS_NS16550
  1185. imply TPL_SYSRESET
  1186. imply USB_FUNCTION_FASTBOOT
  1187. config TARGET_THUNDERX_88XX
  1188. bool "Support ThunderX 88xx"
  1189. select ARM64
  1190. select OF_CONTROL
  1191. select PL01X_SERIAL
  1192. select SYS_CACHE_SHIFT_7
  1193. config ARCH_ASPEED
  1194. bool "Support Aspeed SoCs"
  1195. select DM
  1196. select OF_CONTROL
  1197. imply CMD_DM
  1198. endchoice
  1199. config TI_SECURE_DEVICE
  1200. bool "HS Device Type Support"
  1201. depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS
  1202. help
  1203. If a high secure (HS) device type is being used, this config
  1204. must be set. This option impacts various aspects of the
  1205. build system (to create signed boot images that can be
  1206. authenticated) and the code. See the doc/README.ti-secure
  1207. file for further details.
  1208. source "arch/arm/mach-aspeed/Kconfig"
  1209. source "arch/arm/mach-at91/Kconfig"
  1210. source "arch/arm/mach-bcm283x/Kconfig"
  1211. source "arch/arm/mach-bcmstb/Kconfig"
  1212. source "arch/arm/mach-davinci/Kconfig"
  1213. source "arch/arm/mach-exynos/Kconfig"
  1214. source "arch/arm/mach-highbank/Kconfig"
  1215. source "arch/arm/mach-integrator/Kconfig"
  1216. source "arch/arm/mach-k3/Kconfig"
  1217. source "arch/arm/mach-keystone/Kconfig"
  1218. source "arch/arm/mach-kirkwood/Kconfig"
  1219. source "arch/arm/mach-mvebu/Kconfig"
  1220. source "arch/arm/cpu/armv7/ls102xa/Kconfig"
  1221. source "arch/arm/mach-imx/mx2/Kconfig"
  1222. source "arch/arm/mach-imx/mx3/Kconfig"
  1223. source "arch/arm/mach-imx/mx5/Kconfig"
  1224. source "arch/arm/mach-imx/mx6/Kconfig"
  1225. source "arch/arm/mach-imx/mx7/Kconfig"
  1226. source "arch/arm/mach-imx/mx7ulp/Kconfig"
  1227. source "arch/arm/mach-imx/mx8m/Kconfig"
  1228. source "arch/arm/mach-imx/mxs/Kconfig"
  1229. source "arch/arm/mach-omap2/Kconfig"
  1230. source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
  1231. source "arch/arm/mach-orion5x/Kconfig"
  1232. source "arch/arm/mach-owl/Kconfig"
  1233. source "arch/arm/mach-rmobile/Kconfig"
  1234. source "arch/arm/mach-meson/Kconfig"
  1235. source "arch/arm/mach-qemu/Kconfig"
  1236. source "arch/arm/mach-rockchip/Kconfig"
  1237. source "arch/arm/mach-s5pc1xx/Kconfig"
  1238. source "arch/arm/mach-snapdragon/Kconfig"
  1239. source "arch/arm/mach-socfpga/Kconfig"
  1240. source "arch/arm/mach-sti/Kconfig"
  1241. source "arch/arm/mach-stm32/Kconfig"
  1242. source "arch/arm/mach-stm32mp/Kconfig"
  1243. source "arch/arm/mach-sunxi/Kconfig"
  1244. source "arch/arm/mach-tegra/Kconfig"
  1245. source "arch/arm/mach-uniphier/Kconfig"
  1246. source "arch/arm/cpu/armv7/vf610/Kconfig"
  1247. source "arch/arm/mach-zynq/Kconfig"
  1248. source "arch/arm/mach-versal/Kconfig"
  1249. source "arch/arm/mach-zynqmp-r5/Kconfig"
  1250. source "arch/arm/cpu/armv7/Kconfig"
  1251. source "arch/arm/cpu/armv8/zynqmp/Kconfig"
  1252. source "arch/arm/cpu/armv8/Kconfig"
  1253. source "arch/arm/mach-imx/Kconfig"
  1254. source "board/bosch/shc/Kconfig"
  1255. source "board/CarMediaLab/flea3/Kconfig"
  1256. source "board/Marvell/aspenite/Kconfig"
  1257. source "board/Marvell/gplugd/Kconfig"
  1258. source "board/armadeus/apf27/Kconfig"
  1259. source "board/armltd/vexpress/Kconfig"
  1260. source "board/armltd/vexpress64/Kconfig"
  1261. source "board/broadcom/bcm23550_w1d/Kconfig"
  1262. source "board/broadcom/bcm28155_ap/Kconfig"
  1263. source "board/broadcom/bcmcygnus/Kconfig"
  1264. source "board/broadcom/bcmnsp/Kconfig"
  1265. source "board/broadcom/bcmns2/Kconfig"
  1266. source "board/cavium/thunderx/Kconfig"
  1267. source "board/cirrus/edb93xx/Kconfig"
  1268. source "board/eets/pdu001/Kconfig"
  1269. source "board/freescale/ls2080a/Kconfig"
  1270. source "board/freescale/ls2080aqds/Kconfig"
  1271. source "board/freescale/ls2080ardb/Kconfig"
  1272. source "board/freescale/ls1088a/Kconfig"
  1273. source "board/freescale/ls1021aqds/Kconfig"
  1274. source "board/freescale/ls1043aqds/Kconfig"
  1275. source "board/freescale/ls1021atwr/Kconfig"
  1276. source "board/freescale/ls1021aiot/Kconfig"
  1277. source "board/freescale/ls1046aqds/Kconfig"
  1278. source "board/freescale/ls1043ardb/Kconfig"
  1279. source "board/freescale/ls1046ardb/Kconfig"
  1280. source "board/freescale/ls1012aqds/Kconfig"
  1281. source "board/freescale/ls1012ardb/Kconfig"
  1282. source "board/freescale/ls1012afrdm/Kconfig"
  1283. source "board/freescale/mx35pdk/Kconfig"
  1284. source "board/freescale/s32v234evb/Kconfig"
  1285. source "board/grinn/chiliboard/Kconfig"
  1286. source "board/gumstix/pepper/Kconfig"
  1287. source "board/h2200/Kconfig"
  1288. source "board/hisilicon/hikey/Kconfig"
  1289. source "board/hisilicon/poplar/Kconfig"
  1290. source "board/isee/igep003x/Kconfig"
  1291. source "board/phytec/pcm051/Kconfig"
  1292. source "board/silica/pengwyn/Kconfig"
  1293. source "board/spear/spear300/Kconfig"
  1294. source "board/spear/spear310/Kconfig"
  1295. source "board/spear/spear320/Kconfig"
  1296. source "board/spear/spear600/Kconfig"
  1297. source "board/spear/x600/Kconfig"
  1298. source "board/st/stv0991/Kconfig"
  1299. source "board/tcl/sl50/Kconfig"
  1300. source "board/ucRobotics/bubblegum_96/Kconfig"
  1301. source "board/birdland/bav335x/Kconfig"
  1302. source "board/timll/devkit3250/Kconfig"
  1303. source "board/toradex/colibri_pxa270/Kconfig"
  1304. source "board/vscom/baltos/Kconfig"
  1305. source "board/woodburn/Kconfig"
  1306. source "board/work-microwave/work_92105/Kconfig"
  1307. source "board/xilinx/Kconfig"
  1308. source "board/xilinx/zynq/Kconfig"
  1309. source "board/xilinx/zynqmp/Kconfig"
  1310. source "board/zipitz2/Kconfig"
  1311. source "arch/arm/Kconfig.debug"
  1312. endmenu
  1313. config SPL_LDSCRIPT
  1314. default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
  1315. default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
  1316. default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64