gpio.h 842 B

12345678910111213141516171819202122232425262728293031323334353637383940414243
  1. /*
  2. * LPC32xx GPIO interface
  3. *
  4. * (C) Copyright 2014 DENX Software Engineering GmbH
  5. * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. /**
  10. * GPIO Register map for LPC32xx
  11. */
  12. struct gpio_regs {
  13. u32 p3_inp_state;
  14. u32 p3_outp_set;
  15. u32 p3_outp_clr;
  16. u32 p3_outp_state;
  17. /* Watch out! the following are shared between p2 and p3 */
  18. u32 p2_p3_dir_set;
  19. u32 p2_p3_dir_clr;
  20. u32 p2_p3_dir_state;
  21. /* Now back to 'one register for one port' */
  22. u32 p2_inp_state;
  23. u32 p2_outp_set;
  24. u32 p2_outp_clr;
  25. u32 reserved1[6];
  26. u32 p0_inp_state;
  27. u32 p0_outp_set;
  28. u32 p0_outp_clr;
  29. u32 p0_outp_state;
  30. u32 p0_dir_set;
  31. u32 p0_dir_clr;
  32. u32 p0_dir_state;
  33. u32 reserved2;
  34. u32 p1_inp_state;
  35. u32 p1_outp_set;
  36. u32 p1_outp_clr;
  37. u32 p1_outp_state;
  38. u32 p1_dir_set;
  39. u32 p1_dir_clr;
  40. u32 p1_dir_state;
  41. };