mt7628a.dtsi 2.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. / {
  3. #address-cells = <1>;
  4. #size-cells = <1>;
  5. compatible = "ralink,mt7628a-soc";
  6. cpus {
  7. #address-cells = <1>;
  8. #size-cells = <0>;
  9. cpu@0 {
  10. compatible = "mti,mips24KEc";
  11. device_type = "cpu";
  12. reg = <0>;
  13. };
  14. };
  15. resetc: reset-controller {
  16. compatible = "ralink,rt2880-reset";
  17. #reset-cells = <1>;
  18. };
  19. cpuintc: interrupt-controller {
  20. #address-cells = <0>;
  21. #interrupt-cells = <1>;
  22. interrupt-controller;
  23. compatible = "mti,cpu-interrupt-controller";
  24. };
  25. palmbus@10000000 {
  26. compatible = "palmbus", "simple-bus";
  27. reg = <0x10000000 0x200000>;
  28. ranges = <0x0 0x10000000 0x1FFFFF>;
  29. #address-cells = <1>;
  30. #size-cells = <1>;
  31. sysc: system-controller@0 {
  32. compatible = "ralink,mt7620a-sysc", "syscon";
  33. reg = <0x0 0x100>;
  34. };
  35. syscon-reboot {
  36. compatible = "syscon-reboot";
  37. regmap = <&sysc>;
  38. offset = <0x34>;
  39. mask = <0x1>;
  40. };
  41. intc: interrupt-controller@200 {
  42. compatible = "ralink,rt2880-intc";
  43. reg = <0x200 0x100>;
  44. interrupt-controller;
  45. #interrupt-cells = <1>;
  46. resets = <&resetc 9>;
  47. reset-names = "intc";
  48. interrupt-parent = <&cpuintc>;
  49. interrupts = <2>;
  50. ralink,intc-registers = <0x9c 0xa0
  51. 0x6c 0xa4
  52. 0x80 0x78>;
  53. };
  54. memory-controller@300 {
  55. compatible = "ralink,mt7620a-memc";
  56. reg = <0x300 0x100>;
  57. };
  58. spi0: spi@b00 {
  59. compatible = "ralink,mt7621-spi";
  60. reg = <0xb00 0x40>;
  61. #address-cells = <1>;
  62. #size-cells = <0>;
  63. clock-frequency = <200000000>;
  64. };
  65. uart0: uartlite@c00 {
  66. compatible = "ns16550a";
  67. reg = <0xc00 0x100>;
  68. resets = <&resetc 12>;
  69. reset-names = "uart0";
  70. interrupt-parent = <&intc>;
  71. interrupts = <20>;
  72. reg-shift = <2>;
  73. };
  74. uart1: uart1@d00 {
  75. compatible = "ns16550a";
  76. reg = <0xd00 0x100>;
  77. resets = <&resetc 19>;
  78. reset-names = "uart1";
  79. interrupt-parent = <&intc>;
  80. interrupts = <21>;
  81. reg-shift = <2>;
  82. };
  83. uart2: uart2@e00 {
  84. compatible = "ns16550a";
  85. reg = <0xe00 0x100>;
  86. resets = <&resetc 20>;
  87. reset-names = "uart2";
  88. interrupt-parent = <&intc>;
  89. interrupts = <22>;
  90. reg-shift = <2>;
  91. };
  92. };
  93. usb_phy: usb-phy@10120000 {
  94. compatible = "mediatek,mt7628-usbphy";
  95. reg = <0x10120000 0x1000>;
  96. #phy-cells = <0>;
  97. ralink,sysctl = <&sysc>;
  98. resets = <&resetc 22 &resetc 25>;
  99. reset-names = "host", "device";
  100. };
  101. ehci@101c0000 {
  102. compatible = "generic-ehci";
  103. reg = <0x101c0000 0x1000>;
  104. phys = <&usb_phy>;
  105. phy-names = "usb";
  106. interrupt-parent = <&intc>;
  107. interrupts = <18>;
  108. };
  109. };