brcm,bcm6368.dtsi 3.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
  4. */
  5. #include <dt-bindings/clock/bcm6368-clock.h>
  6. #include <dt-bindings/gpio/gpio.h>
  7. #include <dt-bindings/reset/bcm6368-reset.h>
  8. #include "skeleton.dtsi"
  9. / {
  10. compatible = "brcm,bcm6368";
  11. aliases {
  12. spi0 = &spi;
  13. };
  14. cpus {
  15. reg = <0x10000000 0x4>;
  16. #address-cells = <1>;
  17. #size-cells = <0>;
  18. u-boot,dm-pre-reloc;
  19. cpu@0 {
  20. compatible = "brcm,bcm6368-cpu", "mips,mips4Kc";
  21. device_type = "cpu";
  22. reg = <0>;
  23. u-boot,dm-pre-reloc;
  24. };
  25. cpu@1 {
  26. compatible = "brcm,bcm6368-cpu", "mips,mips4Kc";
  27. device_type = "cpu";
  28. reg = <1>;
  29. u-boot,dm-pre-reloc;
  30. };
  31. };
  32. clocks {
  33. compatible = "simple-bus";
  34. #address-cells = <1>;
  35. #size-cells = <1>;
  36. u-boot,dm-pre-reloc;
  37. periph_osc: periph-osc {
  38. compatible = "fixed-clock";
  39. #clock-cells = <0>;
  40. clock-frequency = <50000000>;
  41. u-boot,dm-pre-reloc;
  42. };
  43. periph_clk: periph-clk {
  44. compatible = "brcm,bcm6345-clk";
  45. reg = <0x10000004 0x4>;
  46. #clock-cells = <1>;
  47. };
  48. };
  49. pflash: nor@18000000 {
  50. compatible = "cfi-flash";
  51. reg = <0x18000000 0x2000000>;
  52. bank-width = <2>;
  53. #address-cells = <1>;
  54. #size-cells = <1>;
  55. status = "disabled";
  56. };
  57. ubus {
  58. compatible = "simple-bus";
  59. #address-cells = <1>;
  60. #size-cells = <1>;
  61. u-boot,dm-pre-reloc;
  62. pll_cntl: syscon@10000008 {
  63. compatible = "syscon";
  64. reg = <0x10000008 0x4>;
  65. };
  66. syscon-reboot {
  67. compatible = "syscon-reboot";
  68. regmap = <&pll_cntl>;
  69. offset = <0x0>;
  70. mask = <0x1>;
  71. };
  72. periph_rst: reset-controller@10000010 {
  73. compatible = "brcm,bcm6345-reset";
  74. reg = <0x10000010 0x4>;
  75. #reset-cells = <1>;
  76. };
  77. wdt: watchdog@1000005c {
  78. compatible = "brcm,bcm6345-wdt";
  79. reg = <0x1000005c 0xc>;
  80. clocks = <&periph_osc>;
  81. };
  82. wdt-reboot {
  83. compatible = "wdt-reboot";
  84. wdt = <&wdt>;
  85. };
  86. gpio1: gpio-controller@10000080 {
  87. compatible = "brcm,bcm6345-gpio";
  88. reg = <0x10000080 0x4>, <0x10000088 0x4>;
  89. gpio-controller;
  90. #gpio-cells = <2>;
  91. ngpios = <6>;
  92. status = "disabled";
  93. };
  94. gpio0: gpio-controller@10000084 {
  95. compatible = "brcm,bcm6345-gpio";
  96. reg = <0x10000084 0x4>, <0x1000008c 0x4>;
  97. gpio-controller;
  98. #gpio-cells = <2>;
  99. status = "disabled";
  100. };
  101. leds: led-controller@100000d0 {
  102. compatible = "brcm,bcm6358-leds";
  103. reg = <0x100000d0 0x8>;
  104. #address-cells = <1>;
  105. #size-cells = <0>;
  106. status = "disabled";
  107. };
  108. uart0: serial@10000100 {
  109. compatible = "brcm,bcm6345-uart";
  110. reg = <0x10000100 0x18>;
  111. clocks = <&periph_osc>;
  112. status = "disabled";
  113. };
  114. uart1: serial@10000120 {
  115. compatible = "brcm,bcm6345-uart";
  116. reg = <0x10000120 0x18>;
  117. clocks = <&periph_osc>;
  118. status = "disabled";
  119. };
  120. spi: spi@10000800 {
  121. compatible = "brcm,bcm6358-spi";
  122. reg = <0x10000800 0x70c>;
  123. #address-cells = <1>;
  124. #size-cells = <0>;
  125. clocks = <&periph_clk BCM6368_CLK_SPI>;
  126. resets = <&periph_rst BCM6368_RST_SPI>;
  127. spi-max-frequency = <20000000>;
  128. num-cs = <6>;
  129. status = "disabled";
  130. };
  131. memory-controller@10001200 {
  132. compatible = "brcm,bcm6358-mc";
  133. reg = <0x10001200 0x4c>;
  134. u-boot,dm-pre-reloc;
  135. };
  136. ehci: usb-controller@10001500 {
  137. compatible = "brcm,bcm6368-ehci", "generic-ehci";
  138. reg = <0x10001500 0x100>;
  139. phys = <&usbh>;
  140. big-endian;
  141. status = "disabled";
  142. };
  143. ohci: usb-controller@10001600 {
  144. compatible = "brcm,bcm6368-ohci", "generic-ohci";
  145. reg = <0x10001600 0x100>;
  146. phys = <&usbh>;
  147. big-endian;
  148. status = "disabled";
  149. };
  150. usbh: usb-phy@10001700 {
  151. compatible = "brcm,bcm6368-usbh";
  152. reg = <0x10001700 0x38>;
  153. #phy-cells = <0>;
  154. clocks = <&periph_clk BCM6368_CLK_USBH>;
  155. clock-names = "usbh";
  156. resets = <&periph_rst BCM6368_RST_USBH>;
  157. status = "disabled";
  158. };
  159. };
  160. };