asix88179.c 18 KB

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  1. /*
  2. * Copyright (c) 2014 Rene Griessl <rgriessl@cit-ec.uni-bielefeld.de>
  3. * based on the U-Boot Asix driver as well as information
  4. * from the Linux AX88179_178a driver
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #include <common.h>
  9. #include <usb.h>
  10. #include <net.h>
  11. #include <linux/mii.h>
  12. #include "usb_ether.h"
  13. #include <malloc.h>
  14. #include <errno.h>
  15. /* ASIX AX88179 based USB 3.0 Ethernet Devices */
  16. #define AX88179_PHY_ID 0x03
  17. #define AX_EEPROM_LEN 0x100
  18. #define AX88179_EEPROM_MAGIC 0x17900b95
  19. #define AX_MCAST_FLTSIZE 8
  20. #define AX_MAX_MCAST 64
  21. #define AX_INT_PPLS_LINK (1 << 16)
  22. #define AX_RXHDR_L4_TYPE_MASK 0x1c
  23. #define AX_RXHDR_L4_TYPE_UDP 4
  24. #define AX_RXHDR_L4_TYPE_TCP 16
  25. #define AX_RXHDR_L3CSUM_ERR 2
  26. #define AX_RXHDR_L4CSUM_ERR 1
  27. #define AX_RXHDR_CRC_ERR (1 << 29)
  28. #define AX_RXHDR_DROP_ERR (1 << 31)
  29. #define AX_ENDPOINT_INT 0x01
  30. #define AX_ENDPOINT_IN 0x02
  31. #define AX_ENDPOINT_OUT 0x03
  32. #define AX_ACCESS_MAC 0x01
  33. #define AX_ACCESS_PHY 0x02
  34. #define AX_ACCESS_EEPROM 0x04
  35. #define AX_ACCESS_EFUS 0x05
  36. #define AX_PAUSE_WATERLVL_HIGH 0x54
  37. #define AX_PAUSE_WATERLVL_LOW 0x55
  38. #define PHYSICAL_LINK_STATUS 0x02
  39. #define AX_USB_SS (1 << 2)
  40. #define AX_USB_HS (1 << 1)
  41. #define GENERAL_STATUS 0x03
  42. #define AX_SECLD (1 << 2)
  43. #define AX_SROM_ADDR 0x07
  44. #define AX_SROM_CMD 0x0a
  45. #define EEP_RD (1 << 2)
  46. #define EEP_BUSY (1 << 4)
  47. #define AX_SROM_DATA_LOW 0x08
  48. #define AX_SROM_DATA_HIGH 0x09
  49. #define AX_RX_CTL 0x0b
  50. #define AX_RX_CTL_DROPCRCERR (1 << 8)
  51. #define AX_RX_CTL_IPE (1 << 9)
  52. #define AX_RX_CTL_START (1 << 7)
  53. #define AX_RX_CTL_AP (1 << 5)
  54. #define AX_RX_CTL_AM (1 << 4)
  55. #define AX_RX_CTL_AB (1 << 3)
  56. #define AX_RX_CTL_AMALL (1 << 1)
  57. #define AX_RX_CTL_PRO (1 << 0)
  58. #define AX_RX_CTL_STOP 0
  59. #define AX_NODE_ID 0x10
  60. #define AX_MULFLTARY 0x16
  61. #define AX_MEDIUM_STATUS_MODE 0x22
  62. #define AX_MEDIUM_GIGAMODE (1 << 0)
  63. #define AX_MEDIUM_FULL_DUPLEX (1 << 1)
  64. #define AX_MEDIUM_EN_125MHZ (1 << 3)
  65. #define AX_MEDIUM_RXFLOW_CTRLEN (1 << 4)
  66. #define AX_MEDIUM_TXFLOW_CTRLEN (1 << 5)
  67. #define AX_MEDIUM_RECEIVE_EN (1 << 8)
  68. #define AX_MEDIUM_PS (1 << 9)
  69. #define AX_MEDIUM_JUMBO_EN 0x8040
  70. #define AX_MONITOR_MOD 0x24
  71. #define AX_MONITOR_MODE_RWLC (1 << 1)
  72. #define AX_MONITOR_MODE_RWMP (1 << 2)
  73. #define AX_MONITOR_MODE_PMEPOL (1 << 5)
  74. #define AX_MONITOR_MODE_PMETYPE (1 << 6)
  75. #define AX_GPIO_CTRL 0x25
  76. #define AX_GPIO_CTRL_GPIO3EN (1 << 7)
  77. #define AX_GPIO_CTRL_GPIO2EN (1 << 6)
  78. #define AX_GPIO_CTRL_GPIO1EN (1 << 5)
  79. #define AX_PHYPWR_RSTCTL 0x26
  80. #define AX_PHYPWR_RSTCTL_BZ (1 << 4)
  81. #define AX_PHYPWR_RSTCTL_IPRL (1 << 5)
  82. #define AX_PHYPWR_RSTCTL_AT (1 << 12)
  83. #define AX_RX_BULKIN_QCTRL 0x2e
  84. #define AX_CLK_SELECT 0x33
  85. #define AX_CLK_SELECT_BCS (1 << 0)
  86. #define AX_CLK_SELECT_ACS (1 << 1)
  87. #define AX_CLK_SELECT_ULR (1 << 3)
  88. #define AX_RXCOE_CTL 0x34
  89. #define AX_RXCOE_IP (1 << 0)
  90. #define AX_RXCOE_TCP (1 << 1)
  91. #define AX_RXCOE_UDP (1 << 2)
  92. #define AX_RXCOE_TCPV6 (1 << 5)
  93. #define AX_RXCOE_UDPV6 (1 << 6)
  94. #define AX_TXCOE_CTL 0x35
  95. #define AX_TXCOE_IP (1 << 0)
  96. #define AX_TXCOE_TCP (1 << 1)
  97. #define AX_TXCOE_UDP (1 << 2)
  98. #define AX_TXCOE_TCPV6 (1 << 5)
  99. #define AX_TXCOE_UDPV6 (1 << 6)
  100. #define AX_LEDCTRL 0x73
  101. #define GMII_PHY_PHYSR 0x11
  102. #define GMII_PHY_PHYSR_SMASK 0xc000
  103. #define GMII_PHY_PHYSR_GIGA (1 << 15)
  104. #define GMII_PHY_PHYSR_100 (1 << 14)
  105. #define GMII_PHY_PHYSR_FULL (1 << 13)
  106. #define GMII_PHY_PHYSR_LINK (1 << 10)
  107. #define GMII_LED_ACT 0x1a
  108. #define GMII_LED_ACTIVE_MASK 0xff8f
  109. #define GMII_LED0_ACTIVE (1 << 4)
  110. #define GMII_LED1_ACTIVE (1 << 5)
  111. #define GMII_LED2_ACTIVE (1 << 6)
  112. #define GMII_LED_LINK 0x1c
  113. #define GMII_LED_LINK_MASK 0xf888
  114. #define GMII_LED0_LINK_10 (1 << 0)
  115. #define GMII_LED0_LINK_100 (1 << 1)
  116. #define GMII_LED0_LINK_1000 (1 << 2)
  117. #define GMII_LED1_LINK_10 (1 << 4)
  118. #define GMII_LED1_LINK_100 (1 << 5)
  119. #define GMII_LED1_LINK_1000 (1 << 6)
  120. #define GMII_LED2_LINK_10 (1 << 8)
  121. #define GMII_LED2_LINK_100 (1 << 9)
  122. #define GMII_LED2_LINK_1000 (1 << 10)
  123. #define LED0_ACTIVE (1 << 0)
  124. #define LED0_LINK_10 (1 << 1)
  125. #define LED0_LINK_100 (1 << 2)
  126. #define LED0_LINK_1000 (1 << 3)
  127. #define LED0_FD (1 << 4)
  128. #define LED0_USB3_MASK 0x001f
  129. #define LED1_ACTIVE (1 << 5)
  130. #define LED1_LINK_10 (1 << 6)
  131. #define LED1_LINK_100 (1 << 7)
  132. #define LED1_LINK_1000 (1 << 8)
  133. #define LED1_FD (1 << 9)
  134. #define LED1_USB3_MASK 0x03e0
  135. #define LED2_ACTIVE (1 << 10)
  136. #define LED2_LINK_1000 (1 << 13)
  137. #define LED2_LINK_100 (1 << 12)
  138. #define LED2_LINK_10 (1 << 11)
  139. #define LED2_FD (1 << 14)
  140. #define LED_VALID (1 << 15)
  141. #define LED2_USB3_MASK 0x7c00
  142. #define GMII_PHYPAGE 0x1e
  143. #define GMII_PHY_PAGE_SELECT 0x1f
  144. #define GMII_PHY_PGSEL_EXT 0x0007
  145. #define GMII_PHY_PGSEL_PAGE0 0x0000
  146. /* local defines */
  147. #define ASIX_BASE_NAME "axg"
  148. #define USB_CTRL_SET_TIMEOUT 5000
  149. #define USB_CTRL_GET_TIMEOUT 5000
  150. #define USB_BULK_SEND_TIMEOUT 5000
  151. #define USB_BULK_RECV_TIMEOUT 5000
  152. #define AX_RX_URB_SIZE 1024 * 0x12
  153. #define BLK_FRAME_SIZE 0x200
  154. #define PHY_CONNECT_TIMEOUT 5000
  155. #define TIMEOUT_RESOLUTION 50 /* ms */
  156. #define FLAG_NONE 0
  157. #define FLAG_TYPE_AX88179 (1U << 0)
  158. #define FLAG_TYPE_AX88178a (1U << 1)
  159. #define FLAG_TYPE_DLINK_DUB1312 (1U << 2)
  160. #define FLAG_TYPE_SITECOM (1U << 3)
  161. #define FLAG_TYPE_SAMSUNG (1U << 4)
  162. #define FLAG_TYPE_LENOVO (1U << 5)
  163. /* local vars */
  164. static const struct {
  165. unsigned char ctrl, timer_l, timer_h, size, ifg;
  166. } AX88179_BULKIN_SIZE[] = {
  167. {7, 0x4f, 0, 0x02, 0xff},
  168. {7, 0x20, 3, 0x03, 0xff},
  169. {7, 0xae, 7, 0x04, 0xff},
  170. {7, 0xcc, 0x4c, 0x04, 8},
  171. };
  172. static int curr_eth_dev; /* index for name of next device detected */
  173. /* driver private */
  174. struct asix_private {
  175. int flags;
  176. int rx_urb_size;
  177. int maxpacketsize;
  178. };
  179. /*
  180. * Asix infrastructure commands
  181. */
  182. static int asix_write_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index,
  183. u16 size, void *data)
  184. {
  185. int len;
  186. ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buf, size);
  187. debug("asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
  188. cmd, value, index, size);
  189. memcpy(buf, data, size);
  190. len = usb_control_msg(
  191. dev->pusb_dev,
  192. usb_sndctrlpipe(dev->pusb_dev, 0),
  193. cmd,
  194. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  195. value,
  196. index,
  197. buf,
  198. size,
  199. USB_CTRL_SET_TIMEOUT);
  200. return len == size ? 0 : ECOMM;
  201. }
  202. static int asix_read_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index,
  203. u16 size, void *data)
  204. {
  205. int len;
  206. ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buf, size);
  207. debug("asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
  208. cmd, value, index, size);
  209. len = usb_control_msg(
  210. dev->pusb_dev,
  211. usb_rcvctrlpipe(dev->pusb_dev, 0),
  212. cmd,
  213. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  214. value,
  215. index,
  216. buf,
  217. size,
  218. USB_CTRL_GET_TIMEOUT);
  219. memcpy(data, buf, size);
  220. return len == size ? 0 : ECOMM;
  221. }
  222. static int asix_read_mac(struct eth_device *eth)
  223. {
  224. struct ueth_data *dev = (struct ueth_data *)eth->priv;
  225. u8 buf[ETH_ALEN];
  226. asix_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, 6, 6, buf);
  227. debug("asix_read_mac() returning %02x:%02x:%02x:%02x:%02x:%02x\n",
  228. buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
  229. memcpy(eth->enetaddr, buf, ETH_ALEN);
  230. return 0;
  231. }
  232. static int asix_basic_reset(struct ueth_data *dev)
  233. {
  234. struct asix_private *dev_priv = (struct asix_private *)dev->dev_priv;
  235. u8 buf[5];
  236. u16 *tmp16;
  237. u8 *tmp;
  238. tmp16 = (u16 *)buf;
  239. tmp = (u8 *)buf;
  240. /* Power up ethernet PHY */
  241. *tmp16 = 0;
  242. asix_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
  243. *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
  244. asix_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
  245. mdelay(200);
  246. *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
  247. asix_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
  248. mdelay(200);
  249. /* RX bulk configuration */
  250. memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
  251. asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
  252. dev_priv->rx_urb_size = 128 * 20;
  253. /* Water Level configuration */
  254. *tmp = 0x34;
  255. asix_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
  256. *tmp = 0x52;
  257. asix_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH, 1, 1, tmp);
  258. /* Enable checksum offload */
  259. *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
  260. AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
  261. asix_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
  262. *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
  263. AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
  264. asix_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
  265. /* Configure RX control register => start operation */
  266. *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
  267. AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
  268. asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
  269. *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
  270. AX_MONITOR_MODE_RWMP;
  271. asix_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
  272. /* Configure default medium type => giga */
  273. *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
  274. AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
  275. AX_MEDIUM_GIGAMODE | AX_MEDIUM_JUMBO_EN;
  276. asix_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, tmp16);
  277. u16 adv = 0;
  278. adv = ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_LPACK |
  279. ADVERTISE_NPAGE | ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP;
  280. asix_write_cmd(dev, AX_ACCESS_PHY, 0x03, MII_ADVERTISE, 2, &adv);
  281. adv = ADVERTISE_1000FULL;
  282. asix_write_cmd(dev, AX_ACCESS_PHY, 0x03, MII_CTRL1000, 2, &adv);
  283. return 0;
  284. }
  285. static int asix_wait_link(struct ueth_data *dev)
  286. {
  287. int timeout = 0;
  288. int link_detected;
  289. u8 buf[2];
  290. u16 *tmp16;
  291. tmp16 = (u16 *)buf;
  292. do {
  293. asix_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  294. MII_BMSR, 2, buf);
  295. link_detected = *tmp16 & BMSR_LSTATUS;
  296. if (!link_detected) {
  297. if (timeout == 0)
  298. printf("Waiting for Ethernet connection... ");
  299. mdelay(TIMEOUT_RESOLUTION);
  300. timeout += TIMEOUT_RESOLUTION;
  301. }
  302. } while (!link_detected && timeout < PHY_CONNECT_TIMEOUT);
  303. if (link_detected) {
  304. if (timeout > 0)
  305. printf("done.\n");
  306. return 0;
  307. } else {
  308. printf("unable to connect.\n");
  309. return -ENETUNREACH;
  310. }
  311. }
  312. /*
  313. * Asix callbacks
  314. */
  315. static int asix_init(struct eth_device *eth, bd_t *bd)
  316. {
  317. struct ueth_data *dev = (struct ueth_data *)eth->priv;
  318. struct asix_private *dev_priv = (struct asix_private *)dev->dev_priv;
  319. u8 buf[2], tmp[5], link_sts;
  320. u16 *tmp16, mode;
  321. tmp16 = (u16 *)buf;
  322. debug("** %s()\n", __func__);
  323. /* Configure RX control register => start operation */
  324. *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
  325. AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
  326. if (asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16) != 0)
  327. goto out_err;
  328. if (asix_wait_link(dev) != 0) {
  329. /*reset device and try again*/
  330. printf("Reset Ethernet Device\n");
  331. asix_basic_reset(dev);
  332. if (asix_wait_link(dev) != 0)
  333. goto out_err;
  334. }
  335. /* Configure link */
  336. mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
  337. AX_MEDIUM_RXFLOW_CTRLEN;
  338. asix_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
  339. 1, 1, &link_sts);
  340. asix_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  341. GMII_PHY_PHYSR, 2, tmp16);
  342. if (!(*tmp16 & GMII_PHY_PHYSR_LINK)) {
  343. return 0;
  344. } else if (GMII_PHY_PHYSR_GIGA == (*tmp16 & GMII_PHY_PHYSR_SMASK)) {
  345. mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ |
  346. AX_MEDIUM_JUMBO_EN;
  347. if (link_sts & AX_USB_SS)
  348. memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
  349. else if (link_sts & AX_USB_HS)
  350. memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
  351. else
  352. memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
  353. } else if (GMII_PHY_PHYSR_100 == (*tmp16 & GMII_PHY_PHYSR_SMASK)) {
  354. mode |= AX_MEDIUM_PS;
  355. if (link_sts & (AX_USB_SS | AX_USB_HS))
  356. memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
  357. else
  358. memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
  359. } else {
  360. memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
  361. }
  362. /* RX bulk configuration */
  363. asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
  364. dev_priv->rx_urb_size = (1024 * (tmp[3] + 2));
  365. if (*tmp16 & GMII_PHY_PHYSR_FULL)
  366. mode |= AX_MEDIUM_FULL_DUPLEX;
  367. asix_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
  368. 2, 2, &mode);
  369. return 0;
  370. out_err:
  371. return -1;
  372. }
  373. static int asix_send(struct eth_device *eth, void *packet, int length)
  374. {
  375. struct ueth_data *dev = (struct ueth_data *)eth->priv;
  376. struct asix_private *dev_priv = (struct asix_private *)dev->dev_priv;
  377. int err;
  378. u32 packet_len, tx_hdr2;
  379. int actual_len, framesize;
  380. ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg,
  381. PKTSIZE + (2 * sizeof(packet_len)));
  382. debug("** %s(), len %d\n", __func__, length);
  383. packet_len = length;
  384. cpu_to_le32s(&packet_len);
  385. memcpy(msg, &packet_len, sizeof(packet_len));
  386. framesize = dev_priv->maxpacketsize;
  387. tx_hdr2 = 0;
  388. if (((length + 8) % framesize) == 0)
  389. tx_hdr2 |= 0x80008000; /* Enable padding */
  390. cpu_to_le32s(&tx_hdr2);
  391. memcpy(msg + sizeof(packet_len), &tx_hdr2, sizeof(tx_hdr2));
  392. memcpy(msg + sizeof(packet_len) + sizeof(tx_hdr2),
  393. (void *)packet, length);
  394. err = usb_bulk_msg(dev->pusb_dev,
  395. usb_sndbulkpipe(dev->pusb_dev, dev->ep_out),
  396. (void *)msg,
  397. length + sizeof(packet_len) + sizeof(tx_hdr2),
  398. &actual_len,
  399. USB_BULK_SEND_TIMEOUT);
  400. debug("Tx: len = %u, actual = %u, err = %d\n",
  401. length + sizeof(packet_len), actual_len, err);
  402. return err;
  403. }
  404. static int asix_recv(struct eth_device *eth)
  405. {
  406. struct ueth_data *dev = (struct ueth_data *)eth->priv;
  407. struct asix_private *dev_priv = (struct asix_private *)dev->dev_priv;
  408. u16 frame_pos;
  409. int err;
  410. int actual_len;
  411. int pkt_cnt;
  412. u32 rx_hdr;
  413. u16 hdr_off;
  414. u32 *pkt_hdr;
  415. ALLOC_CACHE_ALIGN_BUFFER(u8, recv_buf, dev_priv->rx_urb_size);
  416. actual_len = -1;
  417. debug("** %s()\n", __func__);
  418. err = usb_bulk_msg(dev->pusb_dev,
  419. usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in),
  420. (void *)recv_buf,
  421. dev_priv->rx_urb_size,
  422. &actual_len,
  423. USB_BULK_RECV_TIMEOUT);
  424. debug("Rx: len = %u, actual = %u, err = %d\n", dev_priv->rx_urb_size,
  425. actual_len, err);
  426. if (err != 0) {
  427. debug("Rx: failed to receive\n");
  428. return -ECOMM;
  429. }
  430. if (actual_len > dev_priv->rx_urb_size) {
  431. debug("Rx: received too many bytes %d\n", actual_len);
  432. return -EMSGSIZE;
  433. }
  434. rx_hdr = *(u32 *)(recv_buf + actual_len - 4);
  435. le32_to_cpus(&pkt_hdr);
  436. pkt_cnt = (u16)rx_hdr;
  437. hdr_off = (u16)(rx_hdr >> 16);
  438. pkt_hdr = (u32 *)(recv_buf + hdr_off);
  439. frame_pos = 0;
  440. while (pkt_cnt--) {
  441. u16 pkt_len;
  442. le32_to_cpus(pkt_hdr);
  443. pkt_len = (*pkt_hdr >> 16) & 0x1fff;
  444. frame_pos += 2;
  445. NetReceive(recv_buf + frame_pos, pkt_len);
  446. pkt_hdr++;
  447. frame_pos += ((pkt_len + 7) & 0xFFF8)-2;
  448. if (pkt_cnt == 0)
  449. return 0;
  450. }
  451. return err;
  452. }
  453. static void asix_halt(struct eth_device *eth)
  454. {
  455. debug("** %s()\n", __func__);
  456. }
  457. /*
  458. * Asix probing functions
  459. */
  460. void ax88179_eth_before_probe(void)
  461. {
  462. curr_eth_dev = 0;
  463. }
  464. struct asix_dongle {
  465. unsigned short vendor;
  466. unsigned short product;
  467. int flags;
  468. };
  469. static const struct asix_dongle asix_dongles[] = {
  470. { 0x0b95, 0x1790, FLAG_TYPE_AX88179 },
  471. { 0x0b95, 0x178a, FLAG_TYPE_AX88178a },
  472. { 0x2001, 0x4a00, FLAG_TYPE_DLINK_DUB1312 },
  473. { 0x0df6, 0x0072, FLAG_TYPE_SITECOM },
  474. { 0x04e8, 0xa100, FLAG_TYPE_SAMSUNG },
  475. { 0x17ef, 0x304b, FLAG_TYPE_LENOVO },
  476. { 0x0000, 0x0000, FLAG_NONE } /* END - Do not remove */
  477. };
  478. /* Probe to see if a new device is actually an asix device */
  479. int ax88179_eth_probe(struct usb_device *dev, unsigned int ifnum,
  480. struct ueth_data *ss)
  481. {
  482. struct usb_interface *iface;
  483. struct usb_interface_descriptor *iface_desc;
  484. struct asix_private *dev_priv;
  485. int ep_in_found = 0, ep_out_found = 0;
  486. int i;
  487. /* let's examine the device now */
  488. iface = &dev->config.if_desc[ifnum];
  489. iface_desc = &dev->config.if_desc[ifnum].desc;
  490. for (i = 0; asix_dongles[i].vendor != 0; i++) {
  491. if (dev->descriptor.idVendor == asix_dongles[i].vendor &&
  492. dev->descriptor.idProduct == asix_dongles[i].product)
  493. /* Found a supported dongle */
  494. break;
  495. }
  496. if (asix_dongles[i].vendor == 0)
  497. return 0;
  498. memset(ss, 0, sizeof(struct ueth_data));
  499. /* At this point, we know we've got a live one */
  500. debug("\n\nUSB Ethernet device detected: %#04x:%#04x\n",
  501. dev->descriptor.idVendor, dev->descriptor.idProduct);
  502. /* Initialize the ueth_data structure with some useful info */
  503. ss->ifnum = ifnum;
  504. ss->pusb_dev = dev;
  505. ss->subclass = iface_desc->bInterfaceSubClass;
  506. ss->protocol = iface_desc->bInterfaceProtocol;
  507. /* alloc driver private */
  508. ss->dev_priv = calloc(1, sizeof(struct asix_private));
  509. if (!ss->dev_priv)
  510. return 0;
  511. dev_priv = ss->dev_priv;
  512. dev_priv->flags = asix_dongles[i].flags;
  513. /*
  514. * We are expecting a minimum of 3 endpoints - in, out (bulk), and
  515. * int. We will ignore any others.
  516. */
  517. for (i = 0; i < iface_desc->bNumEndpoints; i++) {
  518. /* is it an interrupt endpoint? */
  519. if ((iface->ep_desc[i].bmAttributes &
  520. USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) {
  521. ss->ep_int = iface->ep_desc[i].bEndpointAddress &
  522. USB_ENDPOINT_NUMBER_MASK;
  523. ss->irqinterval = iface->ep_desc[i].bInterval;
  524. continue;
  525. }
  526. /* is it an BULK endpoint? */
  527. if (!((iface->ep_desc[i].bmAttributes &
  528. USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK))
  529. continue;
  530. u8 ep_addr = iface->ep_desc[i].bEndpointAddress;
  531. if ((ep_addr & USB_DIR_IN) && !ep_in_found) {
  532. ss->ep_in = ep_addr &
  533. USB_ENDPOINT_NUMBER_MASK;
  534. ep_in_found = 1;
  535. }
  536. if (!(ep_addr & USB_DIR_IN) && !ep_out_found) {
  537. ss->ep_out = ep_addr &
  538. USB_ENDPOINT_NUMBER_MASK;
  539. dev_priv->maxpacketsize =
  540. dev->epmaxpacketout[AX_ENDPOINT_OUT];
  541. ep_out_found = 1;
  542. }
  543. }
  544. debug("Endpoints In %d Out %d Int %d\n",
  545. ss->ep_in, ss->ep_out, ss->ep_int);
  546. /* Do some basic sanity checks, and bail if we find a problem */
  547. if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) ||
  548. !ss->ep_in || !ss->ep_out || !ss->ep_int) {
  549. debug("Problems with device\n");
  550. return 0;
  551. }
  552. dev->privptr = (void *)ss;
  553. return 1;
  554. }
  555. int ax88179_eth_get_info(struct usb_device *dev, struct ueth_data *ss,
  556. struct eth_device *eth)
  557. {
  558. if (!eth) {
  559. debug("%s: missing parameter.\n", __func__);
  560. return 0;
  561. }
  562. sprintf(eth->name, "%s%d", ASIX_BASE_NAME, curr_eth_dev++);
  563. eth->init = asix_init;
  564. eth->send = asix_send;
  565. eth->recv = asix_recv;
  566. eth->halt = asix_halt;
  567. eth->priv = ss;
  568. if (asix_basic_reset(ss))
  569. return 0;
  570. /* Get the MAC address */
  571. if (asix_read_mac(eth))
  572. return 0;
  573. debug("MAC %pM\n", eth->enetaddr);
  574. return 1;
  575. }