flash.c 20 KB

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  1. /*
  2. * (C) Copyright 2000-2004
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #if 0
  24. #define DEBUG
  25. #endif
  26. #include <common.h>
  27. #include <mpc8xx.h>
  28. #include <environment.h>
  29. #include <asm/processor.h>
  30. #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M)
  31. # ifndef CFG_OR_TIMING_FLASH_AT_50MHZ
  32. # define CFG_OR_TIMING_FLASH_AT_50MHZ (OR_ACS_DIV1 | OR_TRLX | OR_CSNT_SAM | \
  33. OR_SCY_2_CLK | OR_EHTR | OR_BI)
  34. # endif
  35. #endif /* CONFIG_TQM8xxL/M, !TQM866M */
  36. #ifndef CFG_ENV_ADDR
  37. #define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
  38. #endif
  39. flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
  40. /*-----------------------------------------------------------------------
  41. * Functions
  42. */
  43. static ulong flash_get_size (vu_long *addr, flash_info_t *info);
  44. static int write_word (flash_info_t *info, ulong dest, ulong data);
  45. /*-----------------------------------------------------------------------
  46. */
  47. unsigned long flash_init (void)
  48. {
  49. volatile immap_t *immap = (immap_t *)CFG_IMMR;
  50. volatile memctl8xx_t *memctl = &immap->im_memctl;
  51. unsigned long size_b0, size_b1;
  52. int i;
  53. #ifdef CFG_OR_TIMING_FLASH_AT_50MHZ
  54. int scy, trlx, flash_or_timing, clk_diff;
  55. DECLARE_GLOBAL_DATA_PTR;
  56. scy = (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_SCY_MSK) >> 4;
  57. if (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_TRLX) {
  58. trlx = OR_TRLX;
  59. scy *= 2;
  60. } else
  61. trlx = 0;
  62. /* We assume that each 10MHz of bus clock require 1-clk SCY
  63. * adjustment.
  64. */
  65. clk_diff = (gd->bus_clk / 1000000) - 50;
  66. /* We need proper rounding here. This is what the "+5" and "-5"
  67. * are here for.
  68. */
  69. if (clk_diff >= 0)
  70. scy += (clk_diff + 5) / 10;
  71. else
  72. scy += (clk_diff - 5) / 10;
  73. /* For bus frequencies above 50MHz, we want to use relaxed timing
  74. * (OR_TRLX).
  75. */
  76. if (gd->bus_clk >= 50000000)
  77. trlx = OR_TRLX;
  78. else
  79. trlx = 0;
  80. if (trlx)
  81. scy /= 2;
  82. if (scy > 0xf)
  83. scy = 0xf;
  84. if (scy < 1)
  85. scy = 1;
  86. flash_or_timing = (scy << 4) | trlx |
  87. (CFG_OR_TIMING_FLASH_AT_50MHZ & ~(OR_TRLX | OR_SCY_MSK));
  88. #endif
  89. /* Init: no FLASHes known */
  90. for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
  91. flash_info[i].flash_id = FLASH_UNKNOWN;
  92. }
  93. /* Static FLASH Bank configuration here - FIXME XXX */
  94. debug ("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_PRELIM);
  95. size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
  96. debug ("## Get flash bank 2 size @ 0x%08x\n",FLASH_BASE1_PRELIM);
  97. if (flash_info[0].flash_id == FLASH_UNKNOWN) {
  98. printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
  99. size_b0, size_b0<<20);
  100. }
  101. size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
  102. debug ("## Prelim. Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
  103. if (size_b1 > size_b0) {
  104. printf ("## ERROR: "
  105. "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
  106. size_b1, size_b1<<20,
  107. size_b0, size_b0<<20
  108. );
  109. flash_info[0].flash_id = FLASH_UNKNOWN;
  110. flash_info[1].flash_id = FLASH_UNKNOWN;
  111. flash_info[0].sector_count = -1;
  112. flash_info[1].sector_count = -1;
  113. flash_info[0].size = 0;
  114. flash_info[1].size = 0;
  115. return (0);
  116. }
  117. debug ("## Before remap: "
  118. "BR0: 0x%08x OR0: 0x%08x "
  119. "BR1: 0x%08x OR1: 0x%08x\n",
  120. memctl->memc_br0, memctl->memc_or0,
  121. memctl->memc_br1, memctl->memc_or1);
  122. /* Remap FLASH according to real size */
  123. #ifndef CFG_OR_TIMING_FLASH_AT_50MHZ
  124. memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
  125. #else
  126. memctl->memc_or0 = flash_or_timing | (-size_b0 & OR_AM_MSK);
  127. #endif
  128. memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
  129. debug ("## BR0: 0x%08x OR0: 0x%08x\n",
  130. memctl->memc_br0, memctl->memc_or0);
  131. /* Re-do sizing to get full correct info */
  132. size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
  133. #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
  134. /* monitor protection ON by default */
  135. debug ("Protect monitor: %08lx ... %08lx\n",
  136. (ulong)CFG_MONITOR_BASE,
  137. (ulong)CFG_MONITOR_BASE + monitor_flash_len - 1);
  138. flash_protect(FLAG_PROTECT_SET,
  139. CFG_MONITOR_BASE,
  140. CFG_MONITOR_BASE + monitor_flash_len - 1,
  141. &flash_info[0]);
  142. #endif
  143. #ifdef CFG_ENV_IS_IN_FLASH
  144. /* ENV protection ON by default */
  145. # ifdef CFG_ENV_ADDR_REDUND
  146. debug ("Protect primary environment: %08lx ... %08lx\n",
  147. (ulong)CFG_ENV_ADDR,
  148. (ulong)CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1);
  149. # else
  150. debug ("Protect environment: %08lx ... %08lx\n",
  151. (ulong)CFG_ENV_ADDR,
  152. (ulong)CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1);
  153. # endif
  154. flash_protect(FLAG_PROTECT_SET,
  155. CFG_ENV_ADDR,
  156. CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
  157. &flash_info[0]);
  158. #endif
  159. #ifdef CFG_ENV_ADDR_REDUND
  160. debug ("Protect redundand environment: %08lx ... %08lx\n",
  161. (ulong)CFG_ENV_ADDR_REDUND,
  162. (ulong)CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1);
  163. flash_protect(FLAG_PROTECT_SET,
  164. CFG_ENV_ADDR_REDUND,
  165. CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1,
  166. &flash_info[0]);
  167. #endif
  168. if (size_b1) {
  169. #ifndef CFG_OR_TIMING_FLASH_AT_50MHZ
  170. memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000);
  171. #else
  172. memctl->memc_or1 = flash_or_timing | (-size_b1 & 0xFFFF8000);
  173. #endif
  174. memctl->memc_br1 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
  175. BR_MS_GPCM | BR_V;
  176. debug ("## BR1: 0x%08x OR1: 0x%08x\n",
  177. memctl->memc_br1, memctl->memc_or1);
  178. /* Re-do sizing to get full correct info */
  179. size_b1 = flash_get_size((vu_long *)(CFG_FLASH_BASE + size_b0),
  180. &flash_info[1]);
  181. #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
  182. /* monitor protection ON by default */
  183. flash_protect(FLAG_PROTECT_SET,
  184. CFG_MONITOR_BASE,
  185. CFG_MONITOR_BASE+monitor_flash_len-1,
  186. &flash_info[1]);
  187. #endif
  188. #ifdef CFG_ENV_IS_IN_FLASH
  189. /* ENV protection ON by default */
  190. flash_protect(FLAG_PROTECT_SET,
  191. CFG_ENV_ADDR,
  192. CFG_ENV_ADDR+CFG_ENV_SIZE-1,
  193. &flash_info[1]);
  194. #endif
  195. } else {
  196. memctl->memc_br1 = 0; /* invalidate bank */
  197. flash_info[1].flash_id = FLASH_UNKNOWN;
  198. flash_info[1].sector_count = -1;
  199. flash_info[1].size = 0;
  200. debug ("## DISABLE BR1: 0x%08x OR1: 0x%08x\n",
  201. memctl->memc_br1, memctl->memc_or1);
  202. }
  203. debug ("## Final Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
  204. flash_info[0].size = size_b0;
  205. flash_info[1].size = size_b1;
  206. return (size_b0 + size_b1);
  207. }
  208. /*-----------------------------------------------------------------------
  209. */
  210. void flash_print_info (flash_info_t *info)
  211. {
  212. int i;
  213. if (info->flash_id == FLASH_UNKNOWN) {
  214. printf ("missing or unknown FLASH type\n");
  215. return;
  216. }
  217. switch (info->flash_id & FLASH_VENDMASK) {
  218. case FLASH_MAN_AMD: printf ("AMD "); break;
  219. case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
  220. default: printf ("Unknown Vendor "); break;
  221. }
  222. switch (info->flash_id & FLASH_TYPEMASK) {
  223. #ifdef CONFIG_TQM8xxM /* mirror bit flash */
  224. case FLASH_AMLV128U: printf ("AM29LV128ML (128Mbit, uniform sector size)\n");
  225. break;
  226. case FLASH_AMLV320U: printf ("AM29LV320ML (32Mbit, uniform sector size)\n");
  227. break;
  228. case FLASH_AMLV640U: printf ("AM29LV640ML (64Mbit, uniform sector size)\n");
  229. break;
  230. case FLASH_AMLV320B: printf ("AM29LV320MB (32Mbit, bottom boot sect)\n");
  231. break;
  232. # else /* ! TQM8xxM */
  233. case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
  234. break;
  235. case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
  236. break;
  237. case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
  238. break;
  239. case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
  240. break;
  241. case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
  242. break;
  243. case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
  244. break;
  245. #endif /* TQM8xxM */
  246. case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
  247. break;
  248. case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
  249. break;
  250. case FLASH_AMDL163B: printf ("AM29DL163B (16 Mbit, bottom boot sect)\n");
  251. break;
  252. default: printf ("Unknown Chip Type\n");
  253. break;
  254. }
  255. printf (" Size: %ld MB in %d Sectors\n",
  256. info->size >> 20, info->sector_count);
  257. printf (" Sector Start Addresses:");
  258. for (i=0; i<info->sector_count; ++i) {
  259. if ((i % 5) == 0)
  260. printf ("\n ");
  261. printf (" %08lX%s",
  262. info->start[i],
  263. info->protect[i] ? " (RO)" : " "
  264. );
  265. }
  266. printf ("\n");
  267. return;
  268. }
  269. /*-----------------------------------------------------------------------
  270. */
  271. /*-----------------------------------------------------------------------
  272. */
  273. /*
  274. * The following code cannot be run from FLASH!
  275. */
  276. static ulong flash_get_size (vu_long *addr, flash_info_t *info)
  277. {
  278. short i;
  279. ulong value;
  280. ulong base = (ulong)addr;
  281. /* Write auto select command: read Manufacturer ID */
  282. addr[0x0555] = 0x00AA00AA;
  283. addr[0x02AA] = 0x00550055;
  284. addr[0x0555] = 0x00900090;
  285. value = addr[0];
  286. debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
  287. switch (value) {
  288. case AMD_MANUFACT:
  289. debug ("Manufacturer: AMD\n");
  290. info->flash_id = FLASH_MAN_AMD;
  291. break;
  292. case FUJ_MANUFACT:
  293. debug ("Manufacturer: FUJITSU\n");
  294. info->flash_id = FLASH_MAN_FUJ;
  295. break;
  296. default:
  297. debug ("Manufacturer: *** unknown ***\n");
  298. info->flash_id = FLASH_UNKNOWN;
  299. info->sector_count = 0;
  300. info->size = 0;
  301. return (0); /* no or unknown flash */
  302. }
  303. value = addr[1]; /* device ID */
  304. debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
  305. switch (value) {
  306. #ifdef CONFIG_TQM8xxM /* mirror bit flash */
  307. case AMD_ID_MIRROR:
  308. debug ("Mirror Bit flash: addr[14] = %08lX addr[15] = %08lX\n",
  309. addr[14], addr[15]);
  310. /* Special case for AMLV320MH/L */
  311. if ((addr[14] & 0x00ff00ff) == 0x001d001d &&
  312. (addr[15] & 0x00ff00ff) == 0x00000000) {
  313. debug ("Chip: AMLV320MH/L\n");
  314. info->flash_id += FLASH_AMLV320U;
  315. info->sector_count = 64;
  316. info->size = 0x00800000; /* => 8 MB */
  317. break;
  318. }
  319. switch(addr[14]) {
  320. case AMD_ID_LV128U_2:
  321. if (addr[15] != AMD_ID_LV128U_3) {
  322. debug ("Chip: AMLV128U -> unknown\n");
  323. info->flash_id = FLASH_UNKNOWN;
  324. } else {
  325. debug ("Chip: AMLV128U\n");
  326. info->flash_id += FLASH_AMLV128U;
  327. info->sector_count = 256;
  328. info->size = 0x02000000;
  329. }
  330. break; /* => 32 MB */
  331. case AMD_ID_LV640U_2:
  332. if (addr[15] != AMD_ID_LV640U_3) {
  333. debug ("Chip: AMLV640U -> unknown\n");
  334. info->flash_id = FLASH_UNKNOWN;
  335. } else {
  336. debug ("Chip: AMLV640U\n");
  337. info->flash_id += FLASH_AMLV640U;
  338. info->sector_count = 128;
  339. info->size = 0x01000000;
  340. }
  341. break; /* => 16 MB */
  342. case AMD_ID_LV320B_2:
  343. if (addr[15] != AMD_ID_LV320B_3) {
  344. debug ("Chip: AMLV320B -> unknown\n");
  345. info->flash_id = FLASH_UNKNOWN;
  346. } else {
  347. debug ("Chip: AMLV320B\n");
  348. info->flash_id += FLASH_AMLV320B;
  349. info->sector_count = 71;
  350. info->size = 0x00800000;
  351. }
  352. break; /* => 8 MB */
  353. default:
  354. debug ("Chip: *** unknown ***\n");
  355. info->flash_id = FLASH_UNKNOWN;
  356. break;
  357. }
  358. break;
  359. # else /* ! TQM8xxM */
  360. case AMD_ID_LV400T:
  361. info->flash_id += FLASH_AM400T;
  362. info->sector_count = 11;
  363. info->size = 0x00100000;
  364. break; /* => 1 MB */
  365. case AMD_ID_LV400B:
  366. info->flash_id += FLASH_AM400B;
  367. info->sector_count = 11;
  368. info->size = 0x00100000;
  369. break; /* => 1 MB */
  370. case AMD_ID_LV800T:
  371. info->flash_id += FLASH_AM800T;
  372. info->sector_count = 19;
  373. info->size = 0x00200000;
  374. break; /* => 2 MB */
  375. case AMD_ID_LV800B:
  376. info->flash_id += FLASH_AM800B;
  377. info->sector_count = 19;
  378. info->size = 0x00200000;
  379. break; /* => 2 MB */
  380. case AMD_ID_LV320T:
  381. info->flash_id += FLASH_AM320T;
  382. info->sector_count = 71;
  383. info->size = 0x00800000;
  384. break; /* => 8 MB */
  385. case AMD_ID_LV320B:
  386. info->flash_id += FLASH_AM320B;
  387. info->sector_count = 71;
  388. info->size = 0x00800000;
  389. break; /* => 8 MB */
  390. #endif /* TQM8xxM */
  391. case AMD_ID_LV160T:
  392. info->flash_id += FLASH_AM160T;
  393. info->sector_count = 35;
  394. info->size = 0x00400000;
  395. break; /* => 4 MB */
  396. case AMD_ID_LV160B:
  397. info->flash_id += FLASH_AM160B;
  398. info->sector_count = 35;
  399. info->size = 0x00400000;
  400. break; /* => 4 MB */
  401. case AMD_ID_DL163B:
  402. info->flash_id += FLASH_AMDL163B;
  403. info->sector_count = 39;
  404. info->size = 0x00400000;
  405. break; /* => 4 MB */
  406. default:
  407. info->flash_id = FLASH_UNKNOWN;
  408. return (0); /* => no or unknown flash */
  409. }
  410. /* set up sector start address table */
  411. switch (value) {
  412. #ifdef CONFIG_TQM8xxM /* mirror bit flash */
  413. case AMD_ID_MIRROR:
  414. switch (info->flash_id & FLASH_TYPEMASK) {
  415. /* only known types here - no default */
  416. case FLASH_AMLV128U:
  417. case FLASH_AMLV640U:
  418. case FLASH_AMLV320U:
  419. for (i = 0; i < info->sector_count; i++) {
  420. info->start[i] = base;
  421. base += 0x20000;
  422. }
  423. break;
  424. case FLASH_AMLV320B:
  425. for (i = 0; i < info->sector_count; i++) {
  426. info->start[i] = base;
  427. /*
  428. * The first 8 sectors are 8 kB,
  429. * all the other ones are 64 kB
  430. */
  431. base += (i < 8)
  432. ? 2 * ( 8 << 10)
  433. : 2 * (64 << 10);
  434. }
  435. break;
  436. }
  437. break;
  438. # else /* ! TQM8xxM */
  439. case AMD_ID_LV400B:
  440. case AMD_ID_LV800B:
  441. /* set sector offsets for bottom boot block type */
  442. info->start[0] = base + 0x00000000;
  443. info->start[1] = base + 0x00008000;
  444. info->start[2] = base + 0x0000C000;
  445. info->start[3] = base + 0x00010000;
  446. for (i = 4; i < info->sector_count; i++) {
  447. info->start[i] = base + (i * 0x00020000) - 0x00060000;
  448. }
  449. break;
  450. case AMD_ID_LV400T:
  451. case AMD_ID_LV800T:
  452. /* set sector offsets for top boot block type */
  453. i = info->sector_count - 1;
  454. info->start[i--] = base + info->size - 0x00008000;
  455. info->start[i--] = base + info->size - 0x0000C000;
  456. info->start[i--] = base + info->size - 0x00010000;
  457. for (; i >= 0; i--) {
  458. info->start[i] = base + i * 0x00020000;
  459. }
  460. break;
  461. case AMD_ID_LV320B:
  462. for (i = 0; i < info->sector_count; i++) {
  463. info->start[i] = base;
  464. /*
  465. * The first 8 sectors are 8 kB,
  466. * all the other ones are 64 kB
  467. */
  468. base += (i < 8)
  469. ? 2 * ( 8 << 10)
  470. : 2 * (64 << 10);
  471. }
  472. break;
  473. case AMD_ID_LV320T:
  474. for (i = 0; i < info->sector_count; i++) {
  475. info->start[i] = base;
  476. /*
  477. * The last 8 sectors are 8 kB,
  478. * all the other ones are 64 kB
  479. */
  480. base += (i < (info->sector_count - 8))
  481. ? 2 * (64 << 10)
  482. : 2 * ( 8 << 10);
  483. }
  484. break;
  485. #endif /* TQM8xxM */
  486. case AMD_ID_LV160B:
  487. /* set sector offsets for bottom boot block type */
  488. info->start[0] = base + 0x00000000;
  489. info->start[1] = base + 0x00008000;
  490. info->start[2] = base + 0x0000C000;
  491. info->start[3] = base + 0x00010000;
  492. for (i = 4; i < info->sector_count; i++) {
  493. info->start[i] = base + (i * 0x00020000) - 0x00060000;
  494. }
  495. break;
  496. case AMD_ID_LV160T:
  497. /* set sector offsets for top boot block type */
  498. i = info->sector_count - 1;
  499. info->start[i--] = base + info->size - 0x00008000;
  500. info->start[i--] = base + info->size - 0x0000C000;
  501. info->start[i--] = base + info->size - 0x00010000;
  502. for (; i >= 0; i--) {
  503. info->start[i] = base + i * 0x00020000;
  504. }
  505. break;
  506. case AMD_ID_DL163B:
  507. for (i = 0; i < info->sector_count; i++) {
  508. info->start[i] = base;
  509. /*
  510. * The first 8 sectors are 8 kB,
  511. * all the other ones are 64 kB
  512. */
  513. base += (i < 8)
  514. ? 2 * ( 8 << 10)
  515. : 2 * (64 << 10);
  516. }
  517. break;
  518. default:
  519. return (0);
  520. break;
  521. }
  522. #if 0
  523. /* check for protected sectors */
  524. for (i = 0; i < info->sector_count; i++) {
  525. /* read sector protection at sector address, (A7 .. A0) = 0x02 */
  526. /* D0 = 1 if protected */
  527. addr = (volatile unsigned long *)(info->start[i]);
  528. info->protect[i] = addr[2] & 1;
  529. }
  530. #endif
  531. /*
  532. * Prevent writes to uninitialized FLASH.
  533. */
  534. if (info->flash_id != FLASH_UNKNOWN) {
  535. addr = (volatile unsigned long *)info->start[0];
  536. *addr = 0x00F000F0; /* reset bank */
  537. }
  538. return (info->size);
  539. }
  540. /*-----------------------------------------------------------------------
  541. */
  542. int flash_erase (flash_info_t *info, int s_first, int s_last)
  543. {
  544. vu_long *addr = (vu_long*)(info->start[0]);
  545. int flag, prot, sect, l_sect;
  546. ulong start, now, last;
  547. debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
  548. if ((s_first < 0) || (s_first > s_last)) {
  549. if (info->flash_id == FLASH_UNKNOWN) {
  550. printf ("- missing\n");
  551. } else {
  552. printf ("- no sectors to erase\n");
  553. }
  554. return 1;
  555. }
  556. if ((info->flash_id == FLASH_UNKNOWN) ||
  557. (info->flash_id > FLASH_AMD_COMP)) {
  558. printf ("Can't erase unknown flash type %08lx - aborted\n",
  559. info->flash_id);
  560. return 1;
  561. }
  562. prot = 0;
  563. for (sect=s_first; sect<=s_last; ++sect) {
  564. if (info->protect[sect]) {
  565. prot++;
  566. }
  567. }
  568. if (prot) {
  569. printf ("- Warning: %d protected sectors will not be erased!\n",
  570. prot);
  571. } else {
  572. printf ("\n");
  573. }
  574. l_sect = -1;
  575. /* Disable interrupts which might cause a timeout here */
  576. flag = disable_interrupts();
  577. addr[0x0555] = 0x00AA00AA;
  578. addr[0x02AA] = 0x00550055;
  579. addr[0x0555] = 0x00800080;
  580. addr[0x0555] = 0x00AA00AA;
  581. addr[0x02AA] = 0x00550055;
  582. /* Start erase on unprotected sectors */
  583. for (sect = s_first; sect<=s_last; sect++) {
  584. if (info->protect[sect] == 0) { /* not protected */
  585. addr = (vu_long*)(info->start[sect]);
  586. addr[0] = 0x00300030;
  587. l_sect = sect;
  588. }
  589. }
  590. /* re-enable interrupts if necessary */
  591. if (flag)
  592. enable_interrupts();
  593. /* wait at least 80us - let's wait 1 ms */
  594. udelay (1000);
  595. /*
  596. * We wait for the last triggered sector
  597. */
  598. if (l_sect < 0)
  599. goto DONE;
  600. start = get_timer (0);
  601. last = start;
  602. addr = (vu_long*)(info->start[l_sect]);
  603. while ((addr[0] & 0x00800080) != 0x00800080) {
  604. if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
  605. printf ("Timeout\n");
  606. return 1;
  607. }
  608. /* show that we're waiting */
  609. if ((now - last) > 1000) { /* every second */
  610. putc ('.');
  611. last = now;
  612. }
  613. }
  614. DONE:
  615. /* reset to read mode */
  616. addr = (volatile unsigned long *)info->start[0];
  617. addr[0] = 0x00F000F0; /* reset bank */
  618. printf (" done\n");
  619. return 0;
  620. }
  621. /*-----------------------------------------------------------------------
  622. * Copy memory to flash, returns:
  623. * 0 - OK
  624. * 1 - write timeout
  625. * 2 - Flash not erased
  626. */
  627. int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  628. {
  629. ulong cp, wp, data;
  630. int i, l, rc;
  631. wp = (addr & ~3); /* get lower word aligned address */
  632. /*
  633. * handle unaligned start bytes
  634. */
  635. if ((l = addr - wp) != 0) {
  636. data = 0;
  637. for (i=0, cp=wp; i<l; ++i, ++cp) {
  638. data = (data << 8) | (*(uchar *)cp);
  639. }
  640. for (; i<4 && cnt>0; ++i) {
  641. data = (data << 8) | *src++;
  642. --cnt;
  643. ++cp;
  644. }
  645. for (; cnt==0 && i<4; ++i, ++cp) {
  646. data = (data << 8) | (*(uchar *)cp);
  647. }
  648. if ((rc = write_word(info, wp, data)) != 0) {
  649. return (rc);
  650. }
  651. wp += 4;
  652. }
  653. /*
  654. * handle word aligned part
  655. */
  656. while (cnt >= 4) {
  657. data = 0;
  658. for (i=0; i<4; ++i) {
  659. data = (data << 8) | *src++;
  660. }
  661. if ((rc = write_word(info, wp, data)) != 0) {
  662. return (rc);
  663. }
  664. wp += 4;
  665. cnt -= 4;
  666. }
  667. if (cnt == 0) {
  668. return (0);
  669. }
  670. /*
  671. * handle unaligned tail bytes
  672. */
  673. data = 0;
  674. for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
  675. data = (data << 8) | *src++;
  676. --cnt;
  677. }
  678. for (; i<4; ++i, ++cp) {
  679. data = (data << 8) | (*(uchar *)cp);
  680. }
  681. return (write_word(info, wp, data));
  682. }
  683. /*-----------------------------------------------------------------------
  684. * Write a word to Flash, returns:
  685. * 0 - OK
  686. * 1 - write timeout
  687. * 2 - Flash not erased
  688. */
  689. static int write_word (flash_info_t *info, ulong dest, ulong data)
  690. {
  691. vu_long *addr = (vu_long*)(info->start[0]);
  692. ulong start;
  693. int flag;
  694. /* Check if Flash is (sufficiently) erased */
  695. if ((*((vu_long *)dest) & data) != data) {
  696. return (2);
  697. }
  698. /* Disable interrupts which might cause a timeout here */
  699. flag = disable_interrupts();
  700. addr[0x0555] = 0x00AA00AA;
  701. addr[0x02AA] = 0x00550055;
  702. addr[0x0555] = 0x00A000A0;
  703. *((vu_long *)dest) = data;
  704. /* re-enable interrupts if necessary */
  705. if (flag)
  706. enable_interrupts();
  707. /* data polling for D7 */
  708. start = get_timer (0);
  709. while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
  710. if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
  711. return (1);
  712. }
  713. }
  714. return (0);
  715. }
  716. /*-----------------------------------------------------------------------
  717. */