cmd_i2c.c 37 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /*
  24. * I2C Functions similar to the standard memory functions.
  25. *
  26. * There are several parameters in many of the commands that bear further
  27. * explanations:
  28. *
  29. * {i2c_chip} is the I2C chip address (the first byte sent on the bus).
  30. * Each I2C chip on the bus has a unique address. On the I2C data bus,
  31. * the address is the upper seven bits and the LSB is the "read/write"
  32. * bit. Note that the {i2c_chip} address specified on the command
  33. * line is not shifted up: e.g. a typical EEPROM memory chip may have
  34. * an I2C address of 0x50, but the data put on the bus will be 0xA0
  35. * for write and 0xA1 for read. This "non shifted" address notation
  36. * matches at least half of the data sheets :-/.
  37. *
  38. * {addr} is the address (or offset) within the chip. Small memory
  39. * chips have 8 bit addresses. Large memory chips have 16 bit
  40. * addresses. Other memory chips have 9, 10, or 11 bit addresses.
  41. * Many non-memory chips have multiple registers and {addr} is used
  42. * as the register index. Some non-memory chips have only one register
  43. * and therefore don't need any {addr} parameter.
  44. *
  45. * The default {addr} parameter is one byte (.1) which works well for
  46. * memories and registers with 8 bits of address space.
  47. *
  48. * You can specify the length of the {addr} field with the optional .0,
  49. * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are
  50. * manipulating a single register device which doesn't use an address
  51. * field, use "0.0" for the address and the ".0" length field will
  52. * suppress the address in the I2C data stream. This also works for
  53. * successive reads using the I2C auto-incrementing memory pointer.
  54. *
  55. * If you are manipulating a large memory with 2-byte addresses, use
  56. * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal).
  57. *
  58. * Then there are the unfortunate memory chips that spill the most
  59. * significant 1, 2, or 3 bits of address into the chip address byte.
  60. * This effectively makes one chip (logically) look like 2, 4, or
  61. * 8 chips. This is handled (awkwardly) by #defining
  62. * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the
  63. * {addr} field (since .1 is the default, it doesn't actually have to
  64. * be specified). Examples: given a memory chip at I2C chip address
  65. * 0x50, the following would happen...
  66. * i2c md 50 0 10 display 16 bytes starting at 0x000
  67. * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd>
  68. * i2c md 50 100 10 display 16 bytes starting at 0x100
  69. * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd>
  70. * i2c md 50 210 10 display 16 bytes starting at 0x210
  71. * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd>
  72. * This is awfully ugly. It would be nice if someone would think up
  73. * a better way of handling this.
  74. *
  75. * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de).
  76. */
  77. #include <common.h>
  78. #include <command.h>
  79. #include <environment.h>
  80. #include <i2c.h>
  81. #include <malloc.h>
  82. #include <asm/byteorder.h>
  83. /* Display values from last command.
  84. * Memory modify remembered values are different from display memory.
  85. */
  86. static uchar i2c_dp_last_chip;
  87. static uint i2c_dp_last_addr;
  88. static uint i2c_dp_last_alen;
  89. static uint i2c_dp_last_length = 0x10;
  90. static uchar i2c_mm_last_chip;
  91. static uint i2c_mm_last_addr;
  92. static uint i2c_mm_last_alen;
  93. /* If only one I2C bus is present, the list of devices to ignore when
  94. * the probe command is issued is represented by a 1D array of addresses.
  95. * When multiple buses are present, the list is an array of bus-address
  96. * pairs. The following macros take care of this */
  97. #if defined(CONFIG_SYS_I2C_NOPROBES)
  98. #if defined(CONFIG_I2C_MULTI_BUS)
  99. static struct
  100. {
  101. uchar bus;
  102. uchar addr;
  103. } i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
  104. #define GET_BUS_NUM i2c_get_bus_num()
  105. #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b))
  106. #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a))
  107. #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr
  108. #else /* single bus */
  109. static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
  110. #define GET_BUS_NUM 0
  111. #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
  112. #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
  113. #define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
  114. #endif /* CONFIG_MULTI_BUS */
  115. #define NUM_ELEMENTS_NOPROBE (sizeof(i2c_no_probes)/sizeof(i2c_no_probes[0]))
  116. #endif
  117. #if defined(CONFIG_I2C_MUX)
  118. static I2C_MUX_DEVICE *i2c_mux_devices = NULL;
  119. static int i2c_mux_busid = CONFIG_SYS_MAX_I2C_BUS;
  120. DECLARE_GLOBAL_DATA_PTR;
  121. #endif
  122. #define DISP_LINE_LEN 16
  123. /* implement possible board specific board init */
  124. void __def_i2c_init_board(void)
  125. {
  126. return;
  127. }
  128. void i2c_init_board(void)
  129. __attribute__((weak, alias("__def_i2c_init_board")));
  130. /* TODO: Implement architecture-specific get/set functions */
  131. unsigned int __def_i2c_get_bus_speed(void)
  132. {
  133. return CONFIG_SYS_I2C_SPEED;
  134. }
  135. unsigned int i2c_get_bus_speed(void)
  136. __attribute__((weak, alias("__def_i2c_get_bus_speed")));
  137. int __def_i2c_set_bus_speed(unsigned int speed)
  138. {
  139. if (speed != CONFIG_SYS_I2C_SPEED)
  140. return -1;
  141. return 0;
  142. }
  143. int i2c_set_bus_speed(unsigned int)
  144. __attribute__((weak, alias("__def_i2c_set_bus_speed")));
  145. /*
  146. * get_alen: small parser helper function to get address length
  147. * returns the address length
  148. */
  149. static uint get_alen(char *arg)
  150. {
  151. int j;
  152. int alen;
  153. alen = 1;
  154. for (j = 0; j < 8; j++) {
  155. if (arg[j] == '.') {
  156. alen = arg[j+1] - '0';
  157. break;
  158. } else if (arg[j] == '\0')
  159. break;
  160. }
  161. return alen;
  162. }
  163. /*
  164. * Syntax:
  165. * i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr}
  166. */
  167. static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  168. {
  169. u_char chip;
  170. uint devaddr, alen, length;
  171. u_char *memaddr;
  172. if (argc != 5)
  173. return cmd_usage(cmdtp);
  174. /*
  175. * I2C chip address
  176. */
  177. chip = simple_strtoul(argv[1], NULL, 16);
  178. /*
  179. * I2C data address within the chip. This can be 1 or
  180. * 2 bytes long. Some day it might be 3 bytes long :-).
  181. */
  182. devaddr = simple_strtoul(argv[2], NULL, 16);
  183. alen = get_alen(argv[2]);
  184. if (alen > 3)
  185. return cmd_usage(cmdtp);
  186. /*
  187. * Length is the number of objects, not number of bytes.
  188. */
  189. length = simple_strtoul(argv[3], NULL, 16);
  190. /*
  191. * memaddr is the address where to store things in memory
  192. */
  193. memaddr = (u_char *)simple_strtoul(argv[4], NULL, 16);
  194. if (i2c_read(chip, devaddr, alen, memaddr, length) != 0) {
  195. puts ("Error reading the chip.\n");
  196. return 1;
  197. }
  198. return 0;
  199. }
  200. /*
  201. * Syntax:
  202. * i2c md {i2c_chip} {addr}{.0, .1, .2} {len}
  203. */
  204. static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  205. {
  206. u_char chip;
  207. uint addr, alen, length;
  208. int j, nbytes, linebytes;
  209. /* We use the last specified parameters, unless new ones are
  210. * entered.
  211. */
  212. chip = i2c_dp_last_chip;
  213. addr = i2c_dp_last_addr;
  214. alen = i2c_dp_last_alen;
  215. length = i2c_dp_last_length;
  216. if (argc < 3)
  217. return cmd_usage(cmdtp);
  218. if ((flag & CMD_FLAG_REPEAT) == 0) {
  219. /*
  220. * New command specified.
  221. */
  222. /*
  223. * I2C chip address
  224. */
  225. chip = simple_strtoul(argv[1], NULL, 16);
  226. /*
  227. * I2C data address within the chip. This can be 1 or
  228. * 2 bytes long. Some day it might be 3 bytes long :-).
  229. */
  230. addr = simple_strtoul(argv[2], NULL, 16);
  231. alen = get_alen(argv[2]);
  232. if (alen > 3)
  233. return cmd_usage(cmdtp);
  234. /*
  235. * If another parameter, it is the length to display.
  236. * Length is the number of objects, not number of bytes.
  237. */
  238. if (argc > 3)
  239. length = simple_strtoul(argv[3], NULL, 16);
  240. }
  241. /*
  242. * Print the lines.
  243. *
  244. * We buffer all read data, so we can make sure data is read only
  245. * once.
  246. */
  247. nbytes = length;
  248. do {
  249. unsigned char linebuf[DISP_LINE_LEN];
  250. unsigned char *cp;
  251. linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
  252. if (i2c_read(chip, addr, alen, linebuf, linebytes) != 0)
  253. puts ("Error reading the chip.\n");
  254. else {
  255. printf("%04x:", addr);
  256. cp = linebuf;
  257. for (j=0; j<linebytes; j++) {
  258. printf(" %02x", *cp++);
  259. addr++;
  260. }
  261. puts (" ");
  262. cp = linebuf;
  263. for (j=0; j<linebytes; j++) {
  264. if ((*cp < 0x20) || (*cp > 0x7e))
  265. puts (".");
  266. else
  267. printf("%c", *cp);
  268. cp++;
  269. }
  270. putc ('\n');
  271. }
  272. nbytes -= linebytes;
  273. } while (nbytes > 0);
  274. i2c_dp_last_chip = chip;
  275. i2c_dp_last_addr = addr;
  276. i2c_dp_last_alen = alen;
  277. i2c_dp_last_length = length;
  278. return 0;
  279. }
  280. /* Write (fill) memory
  281. *
  282. * Syntax:
  283. * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
  284. */
  285. static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  286. {
  287. uchar chip;
  288. ulong addr;
  289. uint alen;
  290. uchar byte;
  291. int count;
  292. if ((argc < 4) || (argc > 5))
  293. return cmd_usage(cmdtp);
  294. /*
  295. * Chip is always specified.
  296. */
  297. chip = simple_strtoul(argv[1], NULL, 16);
  298. /*
  299. * Address is always specified.
  300. */
  301. addr = simple_strtoul(argv[2], NULL, 16);
  302. alen = get_alen(argv[2]);
  303. if (alen > 3)
  304. return cmd_usage(cmdtp);
  305. /*
  306. * Value to write is always specified.
  307. */
  308. byte = simple_strtoul(argv[3], NULL, 16);
  309. /*
  310. * Optional count
  311. */
  312. if (argc == 5)
  313. count = simple_strtoul(argv[4], NULL, 16);
  314. else
  315. count = 1;
  316. while (count-- > 0) {
  317. if (i2c_write(chip, addr++, alen, &byte, 1) != 0)
  318. puts ("Error writing the chip.\n");
  319. /*
  320. * Wait for the write to complete. The write can take
  321. * up to 10mSec (we allow a little more time).
  322. */
  323. /*
  324. * No write delay with FRAM devices.
  325. */
  326. #if !defined(CONFIG_SYS_I2C_FRAM)
  327. udelay(11000);
  328. #endif
  329. }
  330. return (0);
  331. }
  332. /* Calculate a CRC on memory
  333. *
  334. * Syntax:
  335. * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count}
  336. */
  337. static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  338. {
  339. uchar chip;
  340. ulong addr;
  341. uint alen;
  342. int count;
  343. uchar byte;
  344. ulong crc;
  345. ulong err;
  346. if (argc < 4)
  347. return cmd_usage(cmdtp);
  348. /*
  349. * Chip is always specified.
  350. */
  351. chip = simple_strtoul(argv[1], NULL, 16);
  352. /*
  353. * Address is always specified.
  354. */
  355. addr = simple_strtoul(argv[2], NULL, 16);
  356. alen = get_alen(argv[2]);
  357. if (alen > 3)
  358. return cmd_usage(cmdtp);
  359. /*
  360. * Count is always specified
  361. */
  362. count = simple_strtoul(argv[3], NULL, 16);
  363. printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1);
  364. /*
  365. * CRC a byte at a time. This is going to be slooow, but hey, the
  366. * memories are small and slow too so hopefully nobody notices.
  367. */
  368. crc = 0;
  369. err = 0;
  370. while (count-- > 0) {
  371. if (i2c_read(chip, addr, alen, &byte, 1) != 0)
  372. err++;
  373. crc = crc32 (crc, &byte, 1);
  374. addr++;
  375. }
  376. if (err > 0)
  377. puts ("Error reading the chip,\n");
  378. else
  379. printf ("%08lx\n", crc);
  380. return 0;
  381. }
  382. /* Modify memory.
  383. *
  384. * Syntax:
  385. * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
  386. * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
  387. */
  388. static int
  389. mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[])
  390. {
  391. uchar chip;
  392. ulong addr;
  393. uint alen;
  394. ulong data;
  395. int size = 1;
  396. int nbytes;
  397. extern char console_buffer[];
  398. if (argc != 3)
  399. return cmd_usage(cmdtp);
  400. #ifdef CONFIG_BOOT_RETRY_TIME
  401. reset_cmd_timeout(); /* got a good command to get here */
  402. #endif
  403. /*
  404. * We use the last specified parameters, unless new ones are
  405. * entered.
  406. */
  407. chip = i2c_mm_last_chip;
  408. addr = i2c_mm_last_addr;
  409. alen = i2c_mm_last_alen;
  410. if ((flag & CMD_FLAG_REPEAT) == 0) {
  411. /*
  412. * New command specified. Check for a size specification.
  413. * Defaults to byte if no or incorrect specification.
  414. */
  415. size = cmd_get_data_size(argv[0], 1);
  416. /*
  417. * Chip is always specified.
  418. */
  419. chip = simple_strtoul(argv[1], NULL, 16);
  420. /*
  421. * Address is always specified.
  422. */
  423. addr = simple_strtoul(argv[2], NULL, 16);
  424. alen = get_alen(argv[2]);
  425. if (alen > 3)
  426. return cmd_usage(cmdtp);
  427. }
  428. /*
  429. * Print the address, followed by value. Then accept input for
  430. * the next value. A non-converted value exits.
  431. */
  432. do {
  433. printf("%08lx:", addr);
  434. if (i2c_read(chip, addr, alen, (uchar *)&data, size) != 0)
  435. puts ("\nError reading the chip,\n");
  436. else {
  437. data = cpu_to_be32(data);
  438. if (size == 1)
  439. printf(" %02lx", (data >> 24) & 0x000000FF);
  440. else if (size == 2)
  441. printf(" %04lx", (data >> 16) & 0x0000FFFF);
  442. else
  443. printf(" %08lx", data);
  444. }
  445. nbytes = readline (" ? ");
  446. if (nbytes == 0) {
  447. /*
  448. * <CR> pressed as only input, don't modify current
  449. * location and move to next.
  450. */
  451. if (incrflag)
  452. addr += size;
  453. nbytes = size;
  454. #ifdef CONFIG_BOOT_RETRY_TIME
  455. reset_cmd_timeout(); /* good enough to not time out */
  456. #endif
  457. }
  458. #ifdef CONFIG_BOOT_RETRY_TIME
  459. else if (nbytes == -2)
  460. break; /* timed out, exit the command */
  461. #endif
  462. else {
  463. char *endp;
  464. data = simple_strtoul(console_buffer, &endp, 16);
  465. if (size == 1)
  466. data = data << 24;
  467. else if (size == 2)
  468. data = data << 16;
  469. data = be32_to_cpu(data);
  470. nbytes = endp - console_buffer;
  471. if (nbytes) {
  472. #ifdef CONFIG_BOOT_RETRY_TIME
  473. /*
  474. * good enough to not time out
  475. */
  476. reset_cmd_timeout();
  477. #endif
  478. if (i2c_write(chip, addr, alen, (uchar *)&data, size) != 0)
  479. puts ("Error writing the chip.\n");
  480. #ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
  481. udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
  482. #endif
  483. if (incrflag)
  484. addr += size;
  485. }
  486. }
  487. } while (nbytes);
  488. i2c_mm_last_chip = chip;
  489. i2c_mm_last_addr = addr;
  490. i2c_mm_last_alen = alen;
  491. return 0;
  492. }
  493. /*
  494. * Syntax:
  495. * i2c probe {addr}{.0, .1, .2}
  496. */
  497. static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  498. {
  499. int j;
  500. #if defined(CONFIG_SYS_I2C_NOPROBES)
  501. int k, skip;
  502. uchar bus = GET_BUS_NUM;
  503. #endif /* NOPROBES */
  504. puts ("Valid chip addresses:");
  505. for (j = 0; j < 128; j++) {
  506. #if defined(CONFIG_SYS_I2C_NOPROBES)
  507. skip = 0;
  508. for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) {
  509. if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) {
  510. skip = 1;
  511. break;
  512. }
  513. }
  514. if (skip)
  515. continue;
  516. #endif
  517. if (i2c_probe(j) == 0)
  518. printf(" %02X", j);
  519. }
  520. putc ('\n');
  521. #if defined(CONFIG_SYS_I2C_NOPROBES)
  522. puts ("Excluded chip addresses:");
  523. for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) {
  524. if (COMPARE_BUS(bus,k))
  525. printf(" %02X", NO_PROBE_ADDR(k));
  526. }
  527. putc ('\n');
  528. #endif
  529. return 0;
  530. }
  531. /*
  532. * Syntax:
  533. * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
  534. * {length} - Number of bytes to read
  535. * {delay} - A DECIMAL number and defaults to 1000 uSec
  536. */
  537. static int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  538. {
  539. u_char chip;
  540. ulong alen;
  541. uint addr;
  542. uint length;
  543. u_char bytes[16];
  544. int delay;
  545. if (argc < 3)
  546. return cmd_usage(cmdtp);
  547. /*
  548. * Chip is always specified.
  549. */
  550. chip = simple_strtoul(argv[1], NULL, 16);
  551. /*
  552. * Address is always specified.
  553. */
  554. addr = simple_strtoul(argv[2], NULL, 16);
  555. alen = get_alen(argv[2]);
  556. if (alen > 3)
  557. return cmd_usage(cmdtp);
  558. /*
  559. * Length is the number of objects, not number of bytes.
  560. */
  561. length = 1;
  562. length = simple_strtoul(argv[3], NULL, 16);
  563. if (length > sizeof(bytes))
  564. length = sizeof(bytes);
  565. /*
  566. * The delay time (uSec) is optional.
  567. */
  568. delay = 1000;
  569. if (argc > 3)
  570. delay = simple_strtoul(argv[4], NULL, 10);
  571. /*
  572. * Run the loop...
  573. */
  574. while (1) {
  575. if (i2c_read(chip, addr, alen, bytes, length) != 0)
  576. puts ("Error reading the chip.\n");
  577. udelay(delay);
  578. }
  579. /* NOTREACHED */
  580. return 0;
  581. }
  582. /*
  583. * The SDRAM command is separately configured because many
  584. * (most?) embedded boards don't use SDRAM DIMMs.
  585. */
  586. #if defined(CONFIG_CMD_SDRAM)
  587. static void print_ddr2_tcyc (u_char const b)
  588. {
  589. printf ("%d.", (b >> 4) & 0x0F);
  590. switch (b & 0x0F) {
  591. case 0x0:
  592. case 0x1:
  593. case 0x2:
  594. case 0x3:
  595. case 0x4:
  596. case 0x5:
  597. case 0x6:
  598. case 0x7:
  599. case 0x8:
  600. case 0x9:
  601. printf ("%d ns\n", b & 0x0F);
  602. break;
  603. case 0xA:
  604. puts ("25 ns\n");
  605. break;
  606. case 0xB:
  607. puts ("33 ns\n");
  608. break;
  609. case 0xC:
  610. puts ("66 ns\n");
  611. break;
  612. case 0xD:
  613. puts ("75 ns\n");
  614. break;
  615. default:
  616. puts ("?? ns\n");
  617. break;
  618. }
  619. }
  620. static void decode_bits (u_char const b, char const *str[], int const do_once)
  621. {
  622. u_char mask;
  623. for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) {
  624. if (b & mask) {
  625. puts (*str);
  626. if (do_once)
  627. return;
  628. }
  629. }
  630. }
  631. /*
  632. * Syntax:
  633. * i2c sdram {i2c_chip}
  634. */
  635. static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
  636. {
  637. enum { unknown, EDO, SDRAM, DDR2 } type;
  638. u_char chip;
  639. u_char data[128];
  640. u_char cksum;
  641. int j;
  642. static const char *decode_CAS_DDR2[] = {
  643. " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD"
  644. };
  645. static const char *decode_CAS_default[] = {
  646. " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1"
  647. };
  648. static const char *decode_CS_WE_default[] = {
  649. " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0"
  650. };
  651. static const char *decode_byte21_default[] = {
  652. " TBD (bit 7)\n",
  653. " Redundant row address\n",
  654. " Differential clock input\n",
  655. " Registerd DQMB inputs\n",
  656. " Buffered DQMB inputs\n",
  657. " On-card PLL\n",
  658. " Registered address/control lines\n",
  659. " Buffered address/control lines\n"
  660. };
  661. static const char *decode_byte22_DDR2[] = {
  662. " TBD (bit 7)\n",
  663. " TBD (bit 6)\n",
  664. " TBD (bit 5)\n",
  665. " TBD (bit 4)\n",
  666. " TBD (bit 3)\n",
  667. " Supports partial array self refresh\n",
  668. " Supports 50 ohm ODT\n",
  669. " Supports weak driver\n"
  670. };
  671. static const char *decode_row_density_DDR2[] = {
  672. "512 MiB", "256 MiB", "128 MiB", "16 GiB",
  673. "8 GiB", "4 GiB", "2 GiB", "1 GiB"
  674. };
  675. static const char *decode_row_density_default[] = {
  676. "512 MiB", "256 MiB", "128 MiB", "64 MiB",
  677. "32 MiB", "16 MiB", "8 MiB", "4 MiB"
  678. };
  679. if (argc < 2)
  680. return cmd_usage(cmdtp);
  681. /*
  682. * Chip is always specified.
  683. */
  684. chip = simple_strtoul (argv[1], NULL, 16);
  685. if (i2c_read (chip, 0, 1, data, sizeof (data)) != 0) {
  686. puts ("No SDRAM Serial Presence Detect found.\n");
  687. return 1;
  688. }
  689. cksum = 0;
  690. for (j = 0; j < 63; j++) {
  691. cksum += data[j];
  692. }
  693. if (cksum != data[63]) {
  694. printf ("WARNING: Configuration data checksum failure:\n"
  695. " is 0x%02x, calculated 0x%02x\n", data[63], cksum);
  696. }
  697. printf ("SPD data revision %d.%d\n",
  698. (data[62] >> 4) & 0x0F, data[62] & 0x0F);
  699. printf ("Bytes used 0x%02X\n", data[0]);
  700. printf ("Serial memory size 0x%02X\n", 1 << data[1]);
  701. puts ("Memory type ");
  702. switch (data[2]) {
  703. case 2:
  704. type = EDO;
  705. puts ("EDO\n");
  706. break;
  707. case 4:
  708. type = SDRAM;
  709. puts ("SDRAM\n");
  710. break;
  711. case 8:
  712. type = DDR2;
  713. puts ("DDR2\n");
  714. break;
  715. default:
  716. type = unknown;
  717. puts ("unknown\n");
  718. break;
  719. }
  720. puts ("Row address bits ");
  721. if ((data[3] & 0x00F0) == 0)
  722. printf ("%d\n", data[3] & 0x0F);
  723. else
  724. printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F);
  725. puts ("Column address bits ");
  726. if ((data[4] & 0x00F0) == 0)
  727. printf ("%d\n", data[4] & 0x0F);
  728. else
  729. printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F);
  730. switch (type) {
  731. case DDR2:
  732. printf ("Number of ranks %d\n",
  733. (data[5] & 0x07) + 1);
  734. break;
  735. default:
  736. printf ("Module rows %d\n", data[5]);
  737. break;
  738. }
  739. switch (type) {
  740. case DDR2:
  741. printf ("Module data width %d bits\n", data[6]);
  742. break;
  743. default:
  744. printf ("Module data width %d bits\n",
  745. (data[7] << 8) | data[6]);
  746. break;
  747. }
  748. puts ("Interface signal levels ");
  749. switch(data[8]) {
  750. case 0: puts ("TTL 5.0 V\n"); break;
  751. case 1: puts ("LVTTL\n"); break;
  752. case 2: puts ("HSTL 1.5 V\n"); break;
  753. case 3: puts ("SSTL 3.3 V\n"); break;
  754. case 4: puts ("SSTL 2.5 V\n"); break;
  755. case 5: puts ("SSTL 1.8 V\n"); break;
  756. default: puts ("unknown\n"); break;
  757. }
  758. switch (type) {
  759. case DDR2:
  760. printf ("SDRAM cycle time ");
  761. print_ddr2_tcyc (data[9]);
  762. break;
  763. default:
  764. printf ("SDRAM cycle time %d.%d ns\n",
  765. (data[9] >> 4) & 0x0F, data[9] & 0x0F);
  766. break;
  767. }
  768. switch (type) {
  769. case DDR2:
  770. printf ("SDRAM access time 0.%d%d ns\n",
  771. (data[10] >> 4) & 0x0F, data[10] & 0x0F);
  772. break;
  773. default:
  774. printf ("SDRAM access time %d.%d ns\n",
  775. (data[10] >> 4) & 0x0F, data[10] & 0x0F);
  776. break;
  777. }
  778. puts ("EDC configuration ");
  779. switch (data[11]) {
  780. case 0: puts ("None\n"); break;
  781. case 1: puts ("Parity\n"); break;
  782. case 2: puts ("ECC\n"); break;
  783. default: puts ("unknown\n"); break;
  784. }
  785. if ((data[12] & 0x80) == 0)
  786. puts ("No self refresh, rate ");
  787. else
  788. puts ("Self refresh, rate ");
  789. switch(data[12] & 0x7F) {
  790. case 0: puts ("15.625 us\n"); break;
  791. case 1: puts ("3.9 us\n"); break;
  792. case 2: puts ("7.8 us\n"); break;
  793. case 3: puts ("31.3 us\n"); break;
  794. case 4: puts ("62.5 us\n"); break;
  795. case 5: puts ("125 us\n"); break;
  796. default: puts ("unknown\n"); break;
  797. }
  798. switch (type) {
  799. case DDR2:
  800. printf ("SDRAM width (primary) %d\n", data[13]);
  801. break;
  802. default:
  803. printf ("SDRAM width (primary) %d\n", data[13] & 0x7F);
  804. if ((data[13] & 0x80) != 0) {
  805. printf (" (second bank) %d\n",
  806. 2 * (data[13] & 0x7F));
  807. }
  808. break;
  809. }
  810. switch (type) {
  811. case DDR2:
  812. if (data[14] != 0)
  813. printf ("EDC width %d\n", data[14]);
  814. break;
  815. default:
  816. if (data[14] != 0) {
  817. printf ("EDC width %d\n",
  818. data[14] & 0x7F);
  819. if ((data[14] & 0x80) != 0) {
  820. printf (" (second bank) %d\n",
  821. 2 * (data[14] & 0x7F));
  822. }
  823. }
  824. break;
  825. }
  826. if (DDR2 != type) {
  827. printf ("Min clock delay, back-to-back random column addresses "
  828. "%d\n", data[15]);
  829. }
  830. puts ("Burst length(s) ");
  831. if (data[16] & 0x80) puts (" Page");
  832. if (data[16] & 0x08) puts (" 8");
  833. if (data[16] & 0x04) puts (" 4");
  834. if (data[16] & 0x02) puts (" 2");
  835. if (data[16] & 0x01) puts (" 1");
  836. putc ('\n');
  837. printf ("Number of banks %d\n", data[17]);
  838. switch (type) {
  839. case DDR2:
  840. puts ("CAS latency(s) ");
  841. decode_bits (data[18], decode_CAS_DDR2, 0);
  842. putc ('\n');
  843. break;
  844. default:
  845. puts ("CAS latency(s) ");
  846. decode_bits (data[18], decode_CAS_default, 0);
  847. putc ('\n');
  848. break;
  849. }
  850. if (DDR2 != type) {
  851. puts ("CS latency(s) ");
  852. decode_bits (data[19], decode_CS_WE_default, 0);
  853. putc ('\n');
  854. }
  855. if (DDR2 != type) {
  856. puts ("WE latency(s) ");
  857. decode_bits (data[20], decode_CS_WE_default, 0);
  858. putc ('\n');
  859. }
  860. switch (type) {
  861. case DDR2:
  862. puts ("Module attributes:\n");
  863. if (data[21] & 0x80)
  864. puts (" TBD (bit 7)\n");
  865. if (data[21] & 0x40)
  866. puts (" Analysis probe installed\n");
  867. if (data[21] & 0x20)
  868. puts (" TBD (bit 5)\n");
  869. if (data[21] & 0x10)
  870. puts (" FET switch external enable\n");
  871. printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03);
  872. if (data[20] & 0x11) {
  873. printf (" %d active registers on DIMM\n",
  874. (data[21] & 0x03) + 1);
  875. }
  876. break;
  877. default:
  878. puts ("Module attributes:\n");
  879. if (!data[21])
  880. puts (" (none)\n");
  881. else
  882. decode_bits (data[21], decode_byte21_default, 0);
  883. break;
  884. }
  885. switch (type) {
  886. case DDR2:
  887. decode_bits (data[22], decode_byte22_DDR2, 0);
  888. break;
  889. default:
  890. puts ("Device attributes:\n");
  891. if (data[22] & 0x80) puts (" TBD (bit 7)\n");
  892. if (data[22] & 0x40) puts (" TBD (bit 6)\n");
  893. if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n");
  894. else puts (" Upper Vcc tolerance 10%\n");
  895. if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n");
  896. else puts (" Lower Vcc tolerance 10%\n");
  897. if (data[22] & 0x08) puts (" Supports write1/read burst\n");
  898. if (data[22] & 0x04) puts (" Supports precharge all\n");
  899. if (data[22] & 0x02) puts (" Supports auto precharge\n");
  900. if (data[22] & 0x01) puts (" Supports early RAS# precharge\n");
  901. break;
  902. }
  903. switch (type) {
  904. case DDR2:
  905. printf ("SDRAM cycle time (2nd highest CAS latency) ");
  906. print_ddr2_tcyc (data[23]);
  907. break;
  908. default:
  909. printf ("SDRAM cycle time (2nd highest CAS latency) %d."
  910. "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F);
  911. break;
  912. }
  913. switch (type) {
  914. case DDR2:
  915. printf ("SDRAM access from clock (2nd highest CAS latency) 0."
  916. "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
  917. break;
  918. default:
  919. printf ("SDRAM access from clock (2nd highest CAS latency) %d."
  920. "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
  921. break;
  922. }
  923. switch (type) {
  924. case DDR2:
  925. printf ("SDRAM cycle time (3rd highest CAS latency) ");
  926. print_ddr2_tcyc (data[25]);
  927. break;
  928. default:
  929. printf ("SDRAM cycle time (3rd highest CAS latency) %d."
  930. "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F);
  931. break;
  932. }
  933. switch (type) {
  934. case DDR2:
  935. printf ("SDRAM access from clock (3rd highest CAS latency) 0."
  936. "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
  937. break;
  938. default:
  939. printf ("SDRAM access from clock (3rd highest CAS latency) %d."
  940. "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
  941. break;
  942. }
  943. switch (type) {
  944. case DDR2:
  945. printf ("Minimum row precharge %d.%02d ns\n",
  946. (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03));
  947. break;
  948. default:
  949. printf ("Minimum row precharge %d ns\n", data[27]);
  950. break;
  951. }
  952. switch (type) {
  953. case DDR2:
  954. printf ("Row active to row active min %d.%02d ns\n",
  955. (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03));
  956. break;
  957. default:
  958. printf ("Row active to row active min %d ns\n", data[28]);
  959. break;
  960. }
  961. switch (type) {
  962. case DDR2:
  963. printf ("RAS to CAS delay min %d.%02d ns\n",
  964. (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03));
  965. break;
  966. default:
  967. printf ("RAS to CAS delay min %d ns\n", data[29]);
  968. break;
  969. }
  970. printf ("Minimum RAS pulse width %d ns\n", data[30]);
  971. switch (type) {
  972. case DDR2:
  973. puts ("Density of each row ");
  974. decode_bits (data[31], decode_row_density_DDR2, 1);
  975. putc ('\n');
  976. break;
  977. default:
  978. puts ("Density of each row ");
  979. decode_bits (data[31], decode_row_density_default, 1);
  980. putc ('\n');
  981. break;
  982. }
  983. switch (type) {
  984. case DDR2:
  985. puts ("Command and Address setup ");
  986. if (data[32] >= 0xA0) {
  987. printf ("1.%d%d ns\n",
  988. ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F);
  989. } else {
  990. printf ("0.%d%d ns\n",
  991. ((data[32] >> 4) & 0x0F), data[32] & 0x0F);
  992. }
  993. break;
  994. default:
  995. printf ("Command and Address setup %c%d.%d ns\n",
  996. (data[32] & 0x80) ? '-' : '+',
  997. (data[32] >> 4) & 0x07, data[32] & 0x0F);
  998. break;
  999. }
  1000. switch (type) {
  1001. case DDR2:
  1002. puts ("Command and Address hold ");
  1003. if (data[33] >= 0xA0) {
  1004. printf ("1.%d%d ns\n",
  1005. ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F);
  1006. } else {
  1007. printf ("0.%d%d ns\n",
  1008. ((data[33] >> 4) & 0x0F), data[33] & 0x0F);
  1009. }
  1010. break;
  1011. default:
  1012. printf ("Command and Address hold %c%d.%d ns\n",
  1013. (data[33] & 0x80) ? '-' : '+',
  1014. (data[33] >> 4) & 0x07, data[33] & 0x0F);
  1015. break;
  1016. }
  1017. switch (type) {
  1018. case DDR2:
  1019. printf ("Data signal input setup 0.%d%d ns\n",
  1020. (data[34] >> 4) & 0x0F, data[34] & 0x0F);
  1021. break;
  1022. default:
  1023. printf ("Data signal input setup %c%d.%d ns\n",
  1024. (data[34] & 0x80) ? '-' : '+',
  1025. (data[34] >> 4) & 0x07, data[34] & 0x0F);
  1026. break;
  1027. }
  1028. switch (type) {
  1029. case DDR2:
  1030. printf ("Data signal input hold 0.%d%d ns\n",
  1031. (data[35] >> 4) & 0x0F, data[35] & 0x0F);
  1032. break;
  1033. default:
  1034. printf ("Data signal input hold %c%d.%d ns\n",
  1035. (data[35] & 0x80) ? '-' : '+',
  1036. (data[35] >> 4) & 0x07, data[35] & 0x0F);
  1037. break;
  1038. }
  1039. puts ("Manufacturer's JEDEC ID ");
  1040. for (j = 64; j <= 71; j++)
  1041. printf ("%02X ", data[j]);
  1042. putc ('\n');
  1043. printf ("Manufacturing Location %02X\n", data[72]);
  1044. puts ("Manufacturer's Part Number ");
  1045. for (j = 73; j <= 90; j++)
  1046. printf ("%02X ", data[j]);
  1047. putc ('\n');
  1048. printf ("Revision Code %02X %02X\n", data[91], data[92]);
  1049. printf ("Manufacturing Date %02X %02X\n", data[93], data[94]);
  1050. puts ("Assembly Serial Number ");
  1051. for (j = 95; j <= 98; j++)
  1052. printf ("%02X ", data[j]);
  1053. putc ('\n');
  1054. if (DDR2 != type) {
  1055. printf ("Speed rating PC%d\n",
  1056. data[126] == 0x66 ? 66 : data[126]);
  1057. }
  1058. return 0;
  1059. }
  1060. #endif
  1061. #if defined(CONFIG_I2C_MUX)
  1062. static int do_i2c_add_bus(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
  1063. {
  1064. int ret=0;
  1065. if (argc == 1) {
  1066. /* show all busses */
  1067. I2C_MUX *mux;
  1068. I2C_MUX_DEVICE *device = i2c_mux_devices;
  1069. printf ("Busses reached over muxes:\n");
  1070. while (device != NULL) {
  1071. printf ("Bus ID: %x\n", device->busid);
  1072. printf (" reached over Mux(es):\n");
  1073. mux = device->mux;
  1074. while (mux != NULL) {
  1075. printf (" %s@%x ch: %x\n", mux->name, mux->chip, mux->channel);
  1076. mux = mux->next;
  1077. }
  1078. device = device->next;
  1079. }
  1080. } else {
  1081. (void)i2c_mux_ident_muxstring ((uchar *)argv[1]);
  1082. ret = 0;
  1083. }
  1084. return ret;
  1085. }
  1086. #endif /* CONFIG_I2C_MUX */
  1087. #if defined(CONFIG_I2C_MULTI_BUS)
  1088. static int do_i2c_bus_num(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
  1089. {
  1090. int bus_idx, ret=0;
  1091. if (argc == 1)
  1092. /* querying current setting */
  1093. printf("Current bus is %d\n", i2c_get_bus_num());
  1094. else {
  1095. bus_idx = simple_strtoul(argv[1], NULL, 10);
  1096. printf("Setting bus to %d\n", bus_idx);
  1097. ret = i2c_set_bus_num(bus_idx);
  1098. if (ret)
  1099. printf("Failure changing bus number (%d)\n", ret);
  1100. }
  1101. return ret;
  1102. }
  1103. #endif /* CONFIG_I2C_MULTI_BUS */
  1104. static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
  1105. {
  1106. int speed, ret=0;
  1107. if (argc == 1)
  1108. /* querying current speed */
  1109. printf("Current bus speed=%d\n", i2c_get_bus_speed());
  1110. else {
  1111. speed = simple_strtoul(argv[1], NULL, 10);
  1112. printf("Setting bus speed to %d Hz\n", speed);
  1113. ret = i2c_set_bus_speed(speed);
  1114. if (ret)
  1115. printf("Failure changing bus speed (%d)\n", ret);
  1116. }
  1117. return ret;
  1118. }
  1119. static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
  1120. {
  1121. return mod_i2c_mem (cmdtp, 1, flag, argc, argv);
  1122. }
  1123. static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
  1124. {
  1125. return mod_i2c_mem (cmdtp, 0, flag, argc, argv);
  1126. }
  1127. static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
  1128. {
  1129. i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  1130. return 0;
  1131. }
  1132. static cmd_tbl_t cmd_i2c_sub[] = {
  1133. #if defined(CONFIG_I2C_MUX)
  1134. U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_add_bus, "", ""),
  1135. #endif /* CONFIG_I2C_MUX */
  1136. U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""),
  1137. #if defined(CONFIG_I2C_MULTI_BUS)
  1138. U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
  1139. #endif /* CONFIG_I2C_MULTI_BUS */
  1140. U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""),
  1141. U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""),
  1142. U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""),
  1143. U_BOOT_CMD_MKENT(mw, 3, 1, do_i2c_mw, "", ""),
  1144. U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""),
  1145. U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""),
  1146. U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""),
  1147. U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""),
  1148. #if defined(CONFIG_CMD_SDRAM)
  1149. U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""),
  1150. #endif
  1151. U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""),
  1152. };
  1153. #ifdef CONFIG_NEEDS_MANUAL_RELOC
  1154. void i2c_reloc(void) {
  1155. fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub));
  1156. }
  1157. #endif
  1158. static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
  1159. {
  1160. cmd_tbl_t *c;
  1161. if (argc < 2)
  1162. return cmd_usage(cmdtp);
  1163. /* Strip off leading 'i2c' command argument */
  1164. argc--;
  1165. argv++;
  1166. c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub));
  1167. if (c)
  1168. return c->cmd(cmdtp, flag, argc, argv);
  1169. else
  1170. return cmd_usage(cmdtp);
  1171. }
  1172. /***************************************************/
  1173. U_BOOT_CMD(
  1174. i2c, 6, 1, do_i2c,
  1175. "I2C sub-system",
  1176. #if defined(CONFIG_I2C_MUX)
  1177. "bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes\ni2c "
  1178. #endif /* CONFIG_I2C_MUX */
  1179. "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
  1180. #if defined(CONFIG_I2C_MULTI_BUS)
  1181. "i2c dev [dev] - show or set current I2C bus\n"
  1182. #endif /* CONFIG_I2C_MULTI_BUS */
  1183. "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n"
  1184. "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n"
  1185. "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n"
  1186. "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n"
  1187. "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n"
  1188. "i2c probe - show devices on the I2C bus\n"
  1189. "i2c read chip address[.0, .1, .2] length memaddress - read to memory \n"
  1190. "i2c reset - re-init the I2C Controller\n"
  1191. #if defined(CONFIG_CMD_SDRAM)
  1192. "i2c sdram chip - print SDRAM configuration information\n"
  1193. #endif
  1194. "i2c speed [speed] - show or set I2C bus speed"
  1195. );
  1196. #if defined(CONFIG_I2C_MUX)
  1197. static int i2c_mux_add_device(I2C_MUX_DEVICE *dev)
  1198. {
  1199. I2C_MUX_DEVICE *devtmp = i2c_mux_devices;
  1200. if (i2c_mux_devices == NULL) {
  1201. i2c_mux_devices = dev;
  1202. return 0;
  1203. }
  1204. while (devtmp->next != NULL)
  1205. devtmp = devtmp->next;
  1206. devtmp->next = dev;
  1207. return 0;
  1208. }
  1209. I2C_MUX_DEVICE *i2c_mux_search_device(int id)
  1210. {
  1211. I2C_MUX_DEVICE *device = i2c_mux_devices;
  1212. while (device != NULL) {
  1213. if (device->busid == id)
  1214. return device;
  1215. device = device->next;
  1216. }
  1217. return NULL;
  1218. }
  1219. /* searches in the buf from *pos the next ':'.
  1220. * returns:
  1221. * 0 if found (with *pos = where)
  1222. * < 0 if an error occured
  1223. * > 0 if the end of buf is reached
  1224. */
  1225. static int i2c_mux_search_next (int *pos, uchar *buf, int len)
  1226. {
  1227. while ((buf[*pos] != ':') && (*pos < len)) {
  1228. *pos += 1;
  1229. }
  1230. if (*pos >= len)
  1231. return 1;
  1232. if (buf[*pos] != ':')
  1233. return -1;
  1234. return 0;
  1235. }
  1236. static int i2c_mux_get_busid (void)
  1237. {
  1238. int tmp = i2c_mux_busid;
  1239. i2c_mux_busid ++;
  1240. return tmp;
  1241. }
  1242. /* Analyses a Muxstring and immediately sends the
  1243. commands to the muxes. Runs from flash.
  1244. */
  1245. int i2c_mux_ident_muxstring_f (uchar *buf)
  1246. {
  1247. int pos = 0;
  1248. int oldpos;
  1249. int ret = 0;
  1250. int len = strlen((char *)buf);
  1251. int chip;
  1252. uchar channel;
  1253. int was = 0;
  1254. while (ret == 0) {
  1255. oldpos = pos;
  1256. /* search name */
  1257. ret = i2c_mux_search_next(&pos, buf, len);
  1258. if (ret != 0)
  1259. printf ("ERROR\n");
  1260. /* search address */
  1261. pos ++;
  1262. oldpos = pos;
  1263. ret = i2c_mux_search_next(&pos, buf, len);
  1264. if (ret != 0)
  1265. printf ("ERROR\n");
  1266. buf[pos] = 0;
  1267. chip = simple_strtoul((char *)&buf[oldpos], NULL, 16);
  1268. buf[pos] = ':';
  1269. /* search channel */
  1270. pos ++;
  1271. oldpos = pos;
  1272. ret = i2c_mux_search_next(&pos, buf, len);
  1273. if (ret < 0)
  1274. printf ("ERROR\n");
  1275. was = 0;
  1276. if (buf[pos] != 0) {
  1277. buf[pos] = 0;
  1278. was = 1;
  1279. }
  1280. channel = simple_strtoul((char *)&buf[oldpos], NULL, 16);
  1281. if (was)
  1282. buf[pos] = ':';
  1283. if (i2c_write(chip, 0, 0, &channel, 1) != 0) {
  1284. printf ("Error setting Mux: chip:%x channel: \
  1285. %x\n", chip, channel);
  1286. return -1;
  1287. }
  1288. pos ++;
  1289. oldpos = pos;
  1290. }
  1291. return 0;
  1292. }
  1293. /* Analyses a Muxstring and if this String is correct
  1294. * adds a new I2C Bus.
  1295. */
  1296. I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf)
  1297. {
  1298. I2C_MUX_DEVICE *device;
  1299. I2C_MUX *mux;
  1300. int pos = 0;
  1301. int oldpos;
  1302. int ret = 0;
  1303. int len = strlen((char *)buf);
  1304. int was = 0;
  1305. device = (I2C_MUX_DEVICE *)malloc (sizeof(I2C_MUX_DEVICE));
  1306. device->mux = NULL;
  1307. device->busid = i2c_mux_get_busid ();
  1308. device->next = NULL;
  1309. while (ret == 0) {
  1310. mux = (I2C_MUX *)malloc (sizeof(I2C_MUX));
  1311. mux->next = NULL;
  1312. /* search name of mux */
  1313. oldpos = pos;
  1314. ret = i2c_mux_search_next(&pos, buf, len);
  1315. if (ret != 0)
  1316. printf ("%s no name.\n", __FUNCTION__);
  1317. mux->name = (char *)malloc (pos - oldpos + 1);
  1318. memcpy (mux->name, &buf[oldpos], pos - oldpos);
  1319. mux->name[pos - oldpos] = 0;
  1320. /* search address */
  1321. pos ++;
  1322. oldpos = pos;
  1323. ret = i2c_mux_search_next(&pos, buf, len);
  1324. if (ret != 0)
  1325. printf ("%s no mux address.\n", __FUNCTION__);
  1326. buf[pos] = 0;
  1327. mux->chip = simple_strtoul((char *)&buf[oldpos], NULL, 16);
  1328. buf[pos] = ':';
  1329. /* search channel */
  1330. pos ++;
  1331. oldpos = pos;
  1332. ret = i2c_mux_search_next(&pos, buf, len);
  1333. if (ret < 0)
  1334. printf ("%s no mux channel.\n", __FUNCTION__);
  1335. was = 0;
  1336. if (buf[pos] != 0) {
  1337. buf[pos] = 0;
  1338. was = 1;
  1339. }
  1340. mux->channel = simple_strtoul((char *)&buf[oldpos], NULL, 16);
  1341. if (was)
  1342. buf[pos] = ':';
  1343. if (device->mux == NULL)
  1344. device->mux = mux;
  1345. else {
  1346. I2C_MUX *muxtmp = device->mux;
  1347. while (muxtmp->next != NULL) {
  1348. muxtmp = muxtmp->next;
  1349. }
  1350. muxtmp->next = mux;
  1351. }
  1352. pos ++;
  1353. oldpos = pos;
  1354. }
  1355. if (ret > 0) {
  1356. /* Add Device */
  1357. i2c_mux_add_device (device);
  1358. return device;
  1359. }
  1360. return NULL;
  1361. }
  1362. int i2x_mux_select_mux(int bus)
  1363. {
  1364. I2C_MUX_DEVICE *dev;
  1365. I2C_MUX *mux;
  1366. if ((gd->flags & GD_FLG_RELOC) != GD_FLG_RELOC) {
  1367. /* select Default Mux Bus */
  1368. #if defined(CONFIG_SYS_I2C_IVM_BUS)
  1369. i2c_mux_ident_muxstring_f ((uchar *)CONFIG_SYS_I2C_IVM_BUS);
  1370. #else
  1371. {
  1372. unsigned char *buf;
  1373. buf = (unsigned char *) getenv("EEprom_ivm");
  1374. if (buf != NULL)
  1375. i2c_mux_ident_muxstring_f (buf);
  1376. }
  1377. #endif
  1378. return 0;
  1379. }
  1380. dev = i2c_mux_search_device(bus);
  1381. if (dev == NULL)
  1382. return -1;
  1383. mux = dev->mux;
  1384. while (mux != NULL) {
  1385. /* do deblocking on each level of mux, before mux config */
  1386. i2c_init_board();
  1387. if (i2c_write(mux->chip, 0, 0, &mux->channel, 1) != 0) {
  1388. printf ("Error setting Mux: chip:%x channel: \
  1389. %x\n", mux->chip, mux->channel);
  1390. return -1;
  1391. }
  1392. mux = mux->next;
  1393. }
  1394. /* do deblocking on each level of mux and after mux config */
  1395. i2c_init_board();
  1396. return 0;
  1397. }
  1398. #endif /* CONFIG_I2C_MUX */