miiphyutil.c 13 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. /*
  8. * This provides a bit-banged interface to the ethernet MII management
  9. * channel.
  10. */
  11. #include <common.h>
  12. #include <miiphy.h>
  13. #include <phy.h>
  14. #include <asm/types.h>
  15. #include <linux/list.h>
  16. #include <malloc.h>
  17. #include <net.h>
  18. /* local debug macro */
  19. #undef MII_DEBUG
  20. #undef debug
  21. #ifdef MII_DEBUG
  22. #define debug(fmt, args...) printf(fmt, ##args)
  23. #else
  24. #define debug(fmt, args...)
  25. #endif /* MII_DEBUG */
  26. static struct list_head mii_devs;
  27. static struct mii_dev *current_mii;
  28. /*
  29. * Lookup the mii_dev struct by the registered device name.
  30. */
  31. struct mii_dev *miiphy_get_dev_by_name(const char *devname)
  32. {
  33. struct list_head *entry;
  34. struct mii_dev *dev;
  35. if (!devname) {
  36. printf("NULL device name!\n");
  37. return NULL;
  38. }
  39. list_for_each(entry, &mii_devs) {
  40. dev = list_entry(entry, struct mii_dev, link);
  41. if (strcmp(dev->name, devname) == 0)
  42. return dev;
  43. }
  44. return NULL;
  45. }
  46. /*****************************************************************************
  47. *
  48. * Initialize global data. Need to be called before any other miiphy routine.
  49. */
  50. void miiphy_init(void)
  51. {
  52. INIT_LIST_HEAD(&mii_devs);
  53. current_mii = NULL;
  54. }
  55. static int legacy_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
  56. {
  57. unsigned short val;
  58. int ret;
  59. struct legacy_mii_dev *ldev = bus->priv;
  60. ret = ldev->read(bus->name, addr, reg, &val);
  61. return ret ? -1 : (int)val;
  62. }
  63. static int legacy_miiphy_write(struct mii_dev *bus, int addr, int devad,
  64. int reg, u16 val)
  65. {
  66. struct legacy_mii_dev *ldev = bus->priv;
  67. return ldev->write(bus->name, addr, reg, val);
  68. }
  69. /*****************************************************************************
  70. *
  71. * Register read and write MII access routines for the device <name>.
  72. * This API is now deprecated. Please use mdio_alloc and mdio_register, instead.
  73. */
  74. void miiphy_register(const char *name,
  75. int (*read)(const char *devname, unsigned char addr,
  76. unsigned char reg, unsigned short *value),
  77. int (*write)(const char *devname, unsigned char addr,
  78. unsigned char reg, unsigned short value))
  79. {
  80. struct mii_dev *new_dev;
  81. struct legacy_mii_dev *ldev;
  82. BUG_ON(strlen(name) >= MDIO_NAME_LEN);
  83. /* check if we have unique name */
  84. new_dev = miiphy_get_dev_by_name(name);
  85. if (new_dev) {
  86. printf("miiphy_register: non unique device name '%s'\n", name);
  87. return;
  88. }
  89. /* allocate memory */
  90. new_dev = mdio_alloc();
  91. ldev = malloc(sizeof(*ldev));
  92. if (new_dev == NULL || ldev == NULL) {
  93. printf("miiphy_register: cannot allocate memory for '%s'\n",
  94. name);
  95. return;
  96. }
  97. /* initalize mii_dev struct fields */
  98. new_dev->read = legacy_miiphy_read;
  99. new_dev->write = legacy_miiphy_write;
  100. strncpy(new_dev->name, name, MDIO_NAME_LEN);
  101. new_dev->name[MDIO_NAME_LEN - 1] = 0;
  102. ldev->read = read;
  103. ldev->write = write;
  104. new_dev->priv = ldev;
  105. debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
  106. new_dev->name, ldev->read, ldev->write);
  107. /* add it to the list */
  108. list_add_tail(&new_dev->link, &mii_devs);
  109. if (!current_mii)
  110. current_mii = new_dev;
  111. }
  112. struct mii_dev *mdio_alloc(void)
  113. {
  114. struct mii_dev *bus;
  115. bus = malloc(sizeof(*bus));
  116. if (!bus)
  117. return bus;
  118. memset(bus, 0, sizeof(*bus));
  119. /* initalize mii_dev struct fields */
  120. INIT_LIST_HEAD(&bus->link);
  121. return bus;
  122. }
  123. int mdio_register(struct mii_dev *bus)
  124. {
  125. if (!bus || !bus->name || !bus->read || !bus->write)
  126. return -1;
  127. /* check if we have unique name */
  128. if (miiphy_get_dev_by_name(bus->name)) {
  129. printf("mdio_register: non unique device name '%s'\n",
  130. bus->name);
  131. return -1;
  132. }
  133. /* add it to the list */
  134. list_add_tail(&bus->link, &mii_devs);
  135. if (!current_mii)
  136. current_mii = bus;
  137. return 0;
  138. }
  139. void mdio_list_devices(void)
  140. {
  141. struct list_head *entry;
  142. list_for_each(entry, &mii_devs) {
  143. int i;
  144. struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
  145. printf("%s:\n", bus->name);
  146. for (i = 0; i < PHY_MAX_ADDR; i++) {
  147. struct phy_device *phydev = bus->phymap[i];
  148. if (phydev) {
  149. printf("%d - %s", i, phydev->drv->name);
  150. if (phydev->dev)
  151. printf(" <--> %s\n", phydev->dev->name);
  152. else
  153. printf("\n");
  154. }
  155. }
  156. }
  157. }
  158. int miiphy_set_current_dev(const char *devname)
  159. {
  160. struct mii_dev *dev;
  161. dev = miiphy_get_dev_by_name(devname);
  162. if (dev) {
  163. current_mii = dev;
  164. return 0;
  165. }
  166. printf("No such device: %s\n", devname);
  167. return 1;
  168. }
  169. struct mii_dev *mdio_get_current_dev(void)
  170. {
  171. return current_mii;
  172. }
  173. struct phy_device *mdio_phydev_for_ethname(const char *ethname)
  174. {
  175. struct list_head *entry;
  176. struct mii_dev *bus;
  177. list_for_each(entry, &mii_devs) {
  178. int i;
  179. bus = list_entry(entry, struct mii_dev, link);
  180. for (i = 0; i < PHY_MAX_ADDR; i++) {
  181. if (!bus->phymap[i] || !bus->phymap[i]->dev)
  182. continue;
  183. if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
  184. return bus->phymap[i];
  185. }
  186. }
  187. printf("%s is not a known ethernet\n", ethname);
  188. return NULL;
  189. }
  190. const char *miiphy_get_current_dev(void)
  191. {
  192. if (current_mii)
  193. return current_mii->name;
  194. return NULL;
  195. }
  196. static struct mii_dev *miiphy_get_active_dev(const char *devname)
  197. {
  198. /* If the current mii is the one we want, return it */
  199. if (current_mii)
  200. if (strcmp(current_mii->name, devname) == 0)
  201. return current_mii;
  202. /* Otherwise, set the active one to the one we want */
  203. if (miiphy_set_current_dev(devname))
  204. return NULL;
  205. else
  206. return current_mii;
  207. }
  208. /*****************************************************************************
  209. *
  210. * Read to variable <value> from the PHY attached to device <devname>,
  211. * use PHY address <addr> and register <reg>.
  212. *
  213. * This API is deprecated. Use phy_read on a phy_device found via phy_connect
  214. *
  215. * Returns:
  216. * 0 on success
  217. */
  218. int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
  219. unsigned short *value)
  220. {
  221. struct mii_dev *bus;
  222. int ret;
  223. bus = miiphy_get_active_dev(devname);
  224. if (!bus)
  225. return 1;
  226. ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
  227. if (ret < 0)
  228. return 1;
  229. *value = (unsigned short)ret;
  230. return 0;
  231. }
  232. /*****************************************************************************
  233. *
  234. * Write <value> to the PHY attached to device <devname>,
  235. * use PHY address <addr> and register <reg>.
  236. *
  237. * This API is deprecated. Use phy_write on a phy_device found by phy_connect
  238. *
  239. * Returns:
  240. * 0 on success
  241. */
  242. int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
  243. unsigned short value)
  244. {
  245. struct mii_dev *bus;
  246. bus = miiphy_get_active_dev(devname);
  247. if (bus)
  248. return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
  249. return 1;
  250. }
  251. /*****************************************************************************
  252. *
  253. * Print out list of registered MII capable devices.
  254. */
  255. void miiphy_listdev(void)
  256. {
  257. struct list_head *entry;
  258. struct mii_dev *dev;
  259. puts("MII devices: ");
  260. list_for_each(entry, &mii_devs) {
  261. dev = list_entry(entry, struct mii_dev, link);
  262. printf("'%s' ", dev->name);
  263. }
  264. puts("\n");
  265. if (current_mii)
  266. printf("Current device: '%s'\n", current_mii->name);
  267. }
  268. /*****************************************************************************
  269. *
  270. * Read the OUI, manufacture's model number, and revision number.
  271. *
  272. * OUI: 22 bits (unsigned int)
  273. * Model: 6 bits (unsigned char)
  274. * Revision: 4 bits (unsigned char)
  275. *
  276. * This API is deprecated.
  277. *
  278. * Returns:
  279. * 0 on success
  280. */
  281. int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
  282. unsigned char *model, unsigned char *rev)
  283. {
  284. unsigned int reg = 0;
  285. unsigned short tmp;
  286. if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
  287. debug("PHY ID register 2 read failed\n");
  288. return -1;
  289. }
  290. reg = tmp;
  291. debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
  292. if (reg == 0xFFFF) {
  293. /* No physical device present at this address */
  294. return -1;
  295. }
  296. if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
  297. debug("PHY ID register 1 read failed\n");
  298. return -1;
  299. }
  300. reg |= tmp << 16;
  301. debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
  302. *oui = (reg >> 10);
  303. *model = (unsigned char)((reg >> 4) & 0x0000003F);
  304. *rev = (unsigned char)(reg & 0x0000000F);
  305. return 0;
  306. }
  307. #ifndef CONFIG_PHYLIB
  308. /*****************************************************************************
  309. *
  310. * Reset the PHY.
  311. *
  312. * This API is deprecated. Use PHYLIB.
  313. *
  314. * Returns:
  315. * 0 on success
  316. */
  317. int miiphy_reset(const char *devname, unsigned char addr)
  318. {
  319. unsigned short reg;
  320. int timeout = 500;
  321. if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
  322. debug("PHY status read failed\n");
  323. return -1;
  324. }
  325. if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
  326. debug("PHY reset failed\n");
  327. return -1;
  328. }
  329. #ifdef CONFIG_PHY_RESET_DELAY
  330. udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
  331. #endif
  332. /*
  333. * Poll the control register for the reset bit to go to 0 (it is
  334. * auto-clearing). This should happen within 0.5 seconds per the
  335. * IEEE spec.
  336. */
  337. reg = 0x8000;
  338. while (((reg & 0x8000) != 0) && timeout--) {
  339. if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
  340. debug("PHY status read failed\n");
  341. return -1;
  342. }
  343. udelay(1000);
  344. }
  345. if ((reg & 0x8000) == 0) {
  346. return 0;
  347. } else {
  348. puts("PHY reset timed out\n");
  349. return -1;
  350. }
  351. return 0;
  352. }
  353. #endif /* !PHYLIB */
  354. /*****************************************************************************
  355. *
  356. * Determine the ethernet speed (10/100/1000). Return 10 on error.
  357. */
  358. int miiphy_speed(const char *devname, unsigned char addr)
  359. {
  360. u16 bmcr, anlpar;
  361. #if defined(CONFIG_PHY_GIGE)
  362. u16 btsr;
  363. /*
  364. * Check for 1000BASE-X. If it is supported, then assume that the speed
  365. * is 1000.
  366. */
  367. if (miiphy_is_1000base_x(devname, addr))
  368. return _1000BASET;
  369. /*
  370. * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
  371. */
  372. /* Check for 1000BASE-T. */
  373. if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
  374. printf("PHY 1000BT status");
  375. goto miiphy_read_failed;
  376. }
  377. if (btsr != 0xFFFF &&
  378. (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
  379. return _1000BASET;
  380. #endif /* CONFIG_PHY_GIGE */
  381. /* Check Basic Management Control Register first. */
  382. if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
  383. printf("PHY speed");
  384. goto miiphy_read_failed;
  385. }
  386. /* Check if auto-negotiation is on. */
  387. if (bmcr & BMCR_ANENABLE) {
  388. /* Get auto-negotiation results. */
  389. if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
  390. printf("PHY AN speed");
  391. goto miiphy_read_failed;
  392. }
  393. return (anlpar & LPA_100) ? _100BASET : _10BASET;
  394. }
  395. /* Get speed from basic control settings. */
  396. return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
  397. miiphy_read_failed:
  398. printf(" read failed, assuming 10BASE-T\n");
  399. return _10BASET;
  400. }
  401. /*****************************************************************************
  402. *
  403. * Determine full/half duplex. Return half on error.
  404. */
  405. int miiphy_duplex(const char *devname, unsigned char addr)
  406. {
  407. u16 bmcr, anlpar;
  408. #if defined(CONFIG_PHY_GIGE)
  409. u16 btsr;
  410. /* Check for 1000BASE-X. */
  411. if (miiphy_is_1000base_x(devname, addr)) {
  412. /* 1000BASE-X */
  413. if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
  414. printf("1000BASE-X PHY AN duplex");
  415. goto miiphy_read_failed;
  416. }
  417. }
  418. /*
  419. * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
  420. */
  421. /* Check for 1000BASE-T. */
  422. if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
  423. printf("PHY 1000BT status");
  424. goto miiphy_read_failed;
  425. }
  426. if (btsr != 0xFFFF) {
  427. if (btsr & PHY_1000BTSR_1000FD) {
  428. return FULL;
  429. } else if (btsr & PHY_1000BTSR_1000HD) {
  430. return HALF;
  431. }
  432. }
  433. #endif /* CONFIG_PHY_GIGE */
  434. /* Check Basic Management Control Register first. */
  435. if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
  436. puts("PHY duplex");
  437. goto miiphy_read_failed;
  438. }
  439. /* Check if auto-negotiation is on. */
  440. if (bmcr & BMCR_ANENABLE) {
  441. /* Get auto-negotiation results. */
  442. if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
  443. puts("PHY AN duplex");
  444. goto miiphy_read_failed;
  445. }
  446. return (anlpar & (LPA_10FULL | LPA_100FULL)) ?
  447. FULL : HALF;
  448. }
  449. /* Get speed from basic control settings. */
  450. return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
  451. miiphy_read_failed:
  452. printf(" read failed, assuming half duplex\n");
  453. return HALF;
  454. }
  455. /*****************************************************************************
  456. *
  457. * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
  458. * 1000BASE-T, or on error.
  459. */
  460. int miiphy_is_1000base_x(const char *devname, unsigned char addr)
  461. {
  462. #if defined(CONFIG_PHY_GIGE)
  463. u16 exsr;
  464. if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
  465. printf("PHY extended status read failed, assuming no "
  466. "1000BASE-X\n");
  467. return 0;
  468. }
  469. return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
  470. #else
  471. return 0;
  472. #endif
  473. }
  474. #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  475. /*****************************************************************************
  476. *
  477. * Determine link status
  478. */
  479. int miiphy_link(const char *devname, unsigned char addr)
  480. {
  481. unsigned short reg;
  482. /* dummy read; needed to latch some phys */
  483. (void)miiphy_read(devname, addr, MII_BMSR, &reg);
  484. if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
  485. puts("MII_BMSR read failed, assuming no link\n");
  486. return 0;
  487. }
  488. /* Determine if a link is active */
  489. if ((reg & BMSR_LSTATUS) != 0) {
  490. return 1;
  491. } else {
  492. return 0;
  493. }
  494. }
  495. #endif