s5p_sdhci.c 5.0 KB

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  1. /*
  2. * (C) Copyright 2012 SAMSUNG Electronics
  3. * Jaehoon Chung <jh80.chung@samsung.com>
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include <common.h>
  8. #include <malloc.h>
  9. #include <sdhci.h>
  10. #include <fdtdec.h>
  11. #include <libfdt.h>
  12. #include <asm/gpio.h>
  13. #include <asm/arch/mmc.h>
  14. #include <asm/arch/clk.h>
  15. #include <errno.h>
  16. #include <asm/arch/pinmux.h>
  17. static char *S5P_NAME = "SAMSUNG SDHCI";
  18. static void s5p_sdhci_set_control_reg(struct sdhci_host *host)
  19. {
  20. unsigned long val, ctrl;
  21. /*
  22. * SELCLKPADDS[17:16]
  23. * 00 = 2mA
  24. * 01 = 4mA
  25. * 10 = 7mA
  26. * 11 = 9mA
  27. */
  28. sdhci_writel(host, SDHCI_CTRL4_DRIVE_MASK(0x3), SDHCI_CONTROL4);
  29. val = sdhci_readl(host, SDHCI_CONTROL2);
  30. val &= SDHCI_CTRL2_SELBASECLK_MASK(3);
  31. val |= SDHCI_CTRL2_ENSTAASYNCCLR |
  32. SDHCI_CTRL2_ENCMDCNFMSK |
  33. SDHCI_CTRL2_ENFBCLKRX |
  34. SDHCI_CTRL2_ENCLKOUTHOLD;
  35. sdhci_writel(host, val, SDHCI_CONTROL2);
  36. /*
  37. * FCSEL3[31] FCSEL2[23] FCSEL1[15] FCSEL0[7]
  38. * FCSel[1:0] : Rx Feedback Clock Delay Control
  39. * Inverter delay means10ns delay if SDCLK 50MHz setting
  40. * 01 = Delay1 (basic delay)
  41. * 11 = Delay2 (basic delay + 2ns)
  42. * 00 = Delay3 (inverter delay)
  43. * 10 = Delay4 (inverter delay + 2ns)
  44. */
  45. val = SDHCI_CTRL3_FCSEL0 | SDHCI_CTRL3_FCSEL1;
  46. sdhci_writel(host, val, SDHCI_CONTROL3);
  47. /*
  48. * SELBASECLK[5:4]
  49. * 00/01 = HCLK
  50. * 10 = EPLL
  51. * 11 = XTI or XEXTCLK
  52. */
  53. ctrl = sdhci_readl(host, SDHCI_CONTROL2);
  54. ctrl &= ~SDHCI_CTRL2_SELBASECLK_MASK(0x3);
  55. ctrl |= SDHCI_CTRL2_SELBASECLK_MASK(0x2);
  56. sdhci_writel(host, ctrl, SDHCI_CONTROL2);
  57. }
  58. static int s5p_sdhci_core_init(struct sdhci_host *host)
  59. {
  60. host->name = S5P_NAME;
  61. host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
  62. SDHCI_QUIRK_32BIT_DMA_ADDR |
  63. SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_USE_WIDE8;
  64. host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
  65. host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
  66. host->set_control_reg = &s5p_sdhci_set_control_reg;
  67. host->set_clock = set_mmc_clk;
  68. if (host->bus_width == 8)
  69. host->host_caps |= MMC_MODE_8BIT;
  70. return add_sdhci(host, 52000000, 400000);
  71. }
  72. int s5p_sdhci_init(u32 regbase, int index, int bus_width)
  73. {
  74. struct sdhci_host *host = calloc(1, sizeof(struct sdhci_host));
  75. if (!host) {
  76. printf("sdhci__host allocation fail!\n");
  77. return 1;
  78. }
  79. host->ioaddr = (void *)regbase;
  80. host->index = index;
  81. host->bus_width = bus_width;
  82. return s5p_sdhci_core_init(host);
  83. }
  84. #if CONFIG_IS_ENABLED(OF_CONTROL)
  85. struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS];
  86. static int do_sdhci_init(struct sdhci_host *host)
  87. {
  88. int dev_id, flag, ret;
  89. flag = host->bus_width == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE;
  90. dev_id = host->index + PERIPH_ID_SDMMC0;
  91. ret = exynos_pinmux_config(dev_id, flag);
  92. if (ret) {
  93. printf("external SD not configured\n");
  94. return ret;
  95. }
  96. if (dm_gpio_is_valid(&host->pwr_gpio)) {
  97. dm_gpio_set_value(&host->pwr_gpio, 1);
  98. ret = exynos_pinmux_config(dev_id, flag);
  99. if (ret) {
  100. debug("MMC not configured\n");
  101. return ret;
  102. }
  103. }
  104. if (dm_gpio_is_valid(&host->cd_gpio)) {
  105. ret = dm_gpio_get_value(&host->cd_gpio);
  106. if (ret) {
  107. debug("no SD card detected (%d)\n", ret);
  108. return -ENODEV;
  109. }
  110. }
  111. return s5p_sdhci_core_init(host);
  112. }
  113. static int sdhci_get_config(const void *blob, int node, struct sdhci_host *host)
  114. {
  115. int bus_width, dev_id;
  116. unsigned int base;
  117. /* Get device id */
  118. dev_id = pinmux_decode_periph_id(blob, node);
  119. if (dev_id < PERIPH_ID_SDMMC0 && dev_id > PERIPH_ID_SDMMC3) {
  120. debug("MMC: Can't get device id\n");
  121. return -1;
  122. }
  123. host->index = dev_id - PERIPH_ID_SDMMC0;
  124. /* Get bus width */
  125. bus_width = fdtdec_get_int(blob, node, "samsung,bus-width", 0);
  126. if (bus_width <= 0) {
  127. debug("MMC: Can't get bus-width\n");
  128. return -1;
  129. }
  130. host->bus_width = bus_width;
  131. /* Get the base address from the device node */
  132. base = fdtdec_get_addr(blob, node, "reg");
  133. if (!base) {
  134. debug("MMC: Can't get base address\n");
  135. return -1;
  136. }
  137. host->ioaddr = (void *)base;
  138. gpio_request_by_name_nodev(blob, node, "pwr-gpios", 0, &host->pwr_gpio,
  139. GPIOD_IS_OUT);
  140. gpio_request_by_name_nodev(blob, node, "cd-gpios", 0, &host->cd_gpio,
  141. GPIOD_IS_IN);
  142. return 0;
  143. }
  144. static int process_nodes(const void *blob, int node_list[], int count)
  145. {
  146. struct sdhci_host *host;
  147. int i, node, ret;
  148. int failed = 0;
  149. debug("%s: count = %d\n", __func__, count);
  150. /* build sdhci_host[] for each controller */
  151. for (i = 0; i < count; i++) {
  152. node = node_list[i];
  153. if (node <= 0)
  154. continue;
  155. host = &sdhci_host[i];
  156. ret = sdhci_get_config(blob, node, host);
  157. if (ret) {
  158. printf("%s: failed to decode dev %d (%d)\n", __func__, i, ret);
  159. failed++;
  160. continue;
  161. }
  162. ret = do_sdhci_init(host);
  163. if (ret && ret != -ENODEV) {
  164. printf("%s: failed to initialize dev %d (%d)\n", __func__, i, ret);
  165. failed++;
  166. }
  167. }
  168. /* we only consider it an error when all nodes fail */
  169. return (failed == count ? -1 : 0);
  170. }
  171. int exynos_mmc_init(const void *blob)
  172. {
  173. int count;
  174. int node_list[SDHCI_MAX_HOSTS];
  175. count = fdtdec_find_aliases_for_id(blob, "mmc",
  176. COMPAT_SAMSUNG_EXYNOS_MMC, node_list,
  177. SDHCI_MAX_HOSTS);
  178. return process_nodes(blob, node_list, count);
  179. }
  180. #endif