spi-mem.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2018 Exceet Electronics GmbH
  4. * Copyright (C) 2018 Bootlin
  5. *
  6. * Author: Boris Brezillon <boris.brezillon@bootlin.com>
  7. */
  8. #ifndef __UBOOT__
  9. #include <linux/dmaengine.h>
  10. #include <linux/pm_runtime.h>
  11. #include "internals.h"
  12. #else
  13. #include <spi.h>
  14. #include <spi-mem.h>
  15. #endif
  16. #ifndef __UBOOT__
  17. /**
  18. * spi_controller_dma_map_mem_op_data() - DMA-map the buffer attached to a
  19. * memory operation
  20. * @ctlr: the SPI controller requesting this dma_map()
  21. * @op: the memory operation containing the buffer to map
  22. * @sgt: a pointer to a non-initialized sg_table that will be filled by this
  23. * function
  24. *
  25. * Some controllers might want to do DMA on the data buffer embedded in @op.
  26. * This helper prepares everything for you and provides a ready-to-use
  27. * sg_table. This function is not intended to be called from spi drivers.
  28. * Only SPI controller drivers should use it.
  29. * Note that the caller must ensure the memory region pointed by
  30. * op->data.buf.{in,out} is DMA-able before calling this function.
  31. *
  32. * Return: 0 in case of success, a negative error code otherwise.
  33. */
  34. int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr,
  35. const struct spi_mem_op *op,
  36. struct sg_table *sgt)
  37. {
  38. struct device *dmadev;
  39. if (!op->data.nbytes)
  40. return -EINVAL;
  41. if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
  42. dmadev = ctlr->dma_tx->device->dev;
  43. else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
  44. dmadev = ctlr->dma_rx->device->dev;
  45. else
  46. dmadev = ctlr->dev.parent;
  47. if (!dmadev)
  48. return -EINVAL;
  49. return spi_map_buf(ctlr, dmadev, sgt, op->data.buf.in, op->data.nbytes,
  50. op->data.dir == SPI_MEM_DATA_IN ?
  51. DMA_FROM_DEVICE : DMA_TO_DEVICE);
  52. }
  53. EXPORT_SYMBOL_GPL(spi_controller_dma_map_mem_op_data);
  54. /**
  55. * spi_controller_dma_unmap_mem_op_data() - DMA-unmap the buffer attached to a
  56. * memory operation
  57. * @ctlr: the SPI controller requesting this dma_unmap()
  58. * @op: the memory operation containing the buffer to unmap
  59. * @sgt: a pointer to an sg_table previously initialized by
  60. * spi_controller_dma_map_mem_op_data()
  61. *
  62. * Some controllers might want to do DMA on the data buffer embedded in @op.
  63. * This helper prepares things so that the CPU can access the
  64. * op->data.buf.{in,out} buffer again.
  65. *
  66. * This function is not intended to be called from SPI drivers. Only SPI
  67. * controller drivers should use it.
  68. *
  69. * This function should be called after the DMA operation has finished and is
  70. * only valid if the previous spi_controller_dma_map_mem_op_data() call
  71. * returned 0.
  72. *
  73. * Return: 0 in case of success, a negative error code otherwise.
  74. */
  75. void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
  76. const struct spi_mem_op *op,
  77. struct sg_table *sgt)
  78. {
  79. struct device *dmadev;
  80. if (!op->data.nbytes)
  81. return;
  82. if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
  83. dmadev = ctlr->dma_tx->device->dev;
  84. else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
  85. dmadev = ctlr->dma_rx->device->dev;
  86. else
  87. dmadev = ctlr->dev.parent;
  88. spi_unmap_buf(ctlr, dmadev, sgt,
  89. op->data.dir == SPI_MEM_DATA_IN ?
  90. DMA_FROM_DEVICE : DMA_TO_DEVICE);
  91. }
  92. EXPORT_SYMBOL_GPL(spi_controller_dma_unmap_mem_op_data);
  93. #endif /* __UBOOT__ */
  94. static int spi_check_buswidth_req(struct spi_slave *slave, u8 buswidth, bool tx)
  95. {
  96. u32 mode = slave->mode;
  97. switch (buswidth) {
  98. case 1:
  99. return 0;
  100. case 2:
  101. if ((tx && (mode & (SPI_TX_DUAL | SPI_TX_QUAD))) ||
  102. (!tx && (mode & (SPI_RX_DUAL | SPI_RX_QUAD))))
  103. return 0;
  104. break;
  105. case 4:
  106. if ((tx && (mode & SPI_TX_QUAD)) ||
  107. (!tx && (mode & SPI_RX_QUAD)))
  108. return 0;
  109. break;
  110. default:
  111. break;
  112. }
  113. return -ENOTSUPP;
  114. }
  115. bool spi_mem_default_supports_op(struct spi_slave *slave,
  116. const struct spi_mem_op *op)
  117. {
  118. if (spi_check_buswidth_req(slave, op->cmd.buswidth, true))
  119. return false;
  120. if (op->addr.nbytes &&
  121. spi_check_buswidth_req(slave, op->addr.buswidth, true))
  122. return false;
  123. if (op->dummy.nbytes &&
  124. spi_check_buswidth_req(slave, op->dummy.buswidth, true))
  125. return false;
  126. if (op->data.nbytes &&
  127. spi_check_buswidth_req(slave, op->data.buswidth,
  128. op->data.dir == SPI_MEM_DATA_OUT))
  129. return false;
  130. return true;
  131. }
  132. EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
  133. /**
  134. * spi_mem_supports_op() - Check if a memory device and the controller it is
  135. * connected to support a specific memory operation
  136. * @slave: the SPI device
  137. * @op: the memory operation to check
  138. *
  139. * Some controllers are only supporting Single or Dual IOs, others might only
  140. * support specific opcodes, or it can even be that the controller and device
  141. * both support Quad IOs but the hardware prevents you from using it because
  142. * only 2 IO lines are connected.
  143. *
  144. * This function checks whether a specific operation is supported.
  145. *
  146. * Return: true if @op is supported, false otherwise.
  147. */
  148. bool spi_mem_supports_op(struct spi_slave *slave,
  149. const struct spi_mem_op *op)
  150. {
  151. struct udevice *bus = slave->dev->parent;
  152. struct dm_spi_ops *ops = spi_get_ops(bus);
  153. if (ops->mem_ops && ops->mem_ops->supports_op)
  154. return ops->mem_ops->supports_op(slave, op);
  155. return spi_mem_default_supports_op(slave, op);
  156. }
  157. EXPORT_SYMBOL_GPL(spi_mem_supports_op);
  158. /**
  159. * spi_mem_exec_op() - Execute a memory operation
  160. * @slave: the SPI device
  161. * @op: the memory operation to execute
  162. *
  163. * Executes a memory operation.
  164. *
  165. * This function first checks that @op is supported and then tries to execute
  166. * it.
  167. *
  168. * Return: 0 in case of success, a negative error code otherwise.
  169. */
  170. int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
  171. {
  172. struct udevice *bus = slave->dev->parent;
  173. struct dm_spi_ops *ops = spi_get_ops(bus);
  174. unsigned int pos = 0;
  175. const u8 *tx_buf = NULL;
  176. u8 *rx_buf = NULL;
  177. u8 *op_buf;
  178. int op_len;
  179. u32 flag;
  180. int ret;
  181. int i;
  182. if (!spi_mem_supports_op(slave, op))
  183. return -ENOTSUPP;
  184. if (ops->mem_ops) {
  185. #ifndef __UBOOT__
  186. /*
  187. * Flush the message queue before executing our SPI memory
  188. * operation to prevent preemption of regular SPI transfers.
  189. */
  190. spi_flush_queue(ctlr);
  191. if (ctlr->auto_runtime_pm) {
  192. ret = pm_runtime_get_sync(ctlr->dev.parent);
  193. if (ret < 0) {
  194. dev_err(&ctlr->dev,
  195. "Failed to power device: %d\n",
  196. ret);
  197. return ret;
  198. }
  199. }
  200. mutex_lock(&ctlr->bus_lock_mutex);
  201. mutex_lock(&ctlr->io_mutex);
  202. #endif
  203. ret = ops->mem_ops->exec_op(slave, op);
  204. #ifndef __UBOOT__
  205. mutex_unlock(&ctlr->io_mutex);
  206. mutex_unlock(&ctlr->bus_lock_mutex);
  207. if (ctlr->auto_runtime_pm)
  208. pm_runtime_put(ctlr->dev.parent);
  209. #endif
  210. /*
  211. * Some controllers only optimize specific paths (typically the
  212. * read path) and expect the core to use the regular SPI
  213. * interface in other cases.
  214. */
  215. if (!ret || ret != -ENOTSUPP)
  216. return ret;
  217. }
  218. #ifndef __UBOOT__
  219. tmpbufsize = sizeof(op->cmd.opcode) + op->addr.nbytes +
  220. op->dummy.nbytes;
  221. /*
  222. * Allocate a buffer to transmit the CMD, ADDR cycles with kmalloc() so
  223. * we're guaranteed that this buffer is DMA-able, as required by the
  224. * SPI layer.
  225. */
  226. tmpbuf = kzalloc(tmpbufsize, GFP_KERNEL | GFP_DMA);
  227. if (!tmpbuf)
  228. return -ENOMEM;
  229. spi_message_init(&msg);
  230. tmpbuf[0] = op->cmd.opcode;
  231. xfers[xferpos].tx_buf = tmpbuf;
  232. xfers[xferpos].len = sizeof(op->cmd.opcode);
  233. xfers[xferpos].tx_nbits = op->cmd.buswidth;
  234. spi_message_add_tail(&xfers[xferpos], &msg);
  235. xferpos++;
  236. totalxferlen++;
  237. if (op->addr.nbytes) {
  238. int i;
  239. for (i = 0; i < op->addr.nbytes; i++)
  240. tmpbuf[i + 1] = op->addr.val >>
  241. (8 * (op->addr.nbytes - i - 1));
  242. xfers[xferpos].tx_buf = tmpbuf + 1;
  243. xfers[xferpos].len = op->addr.nbytes;
  244. xfers[xferpos].tx_nbits = op->addr.buswidth;
  245. spi_message_add_tail(&xfers[xferpos], &msg);
  246. xferpos++;
  247. totalxferlen += op->addr.nbytes;
  248. }
  249. if (op->dummy.nbytes) {
  250. memset(tmpbuf + op->addr.nbytes + 1, 0xff, op->dummy.nbytes);
  251. xfers[xferpos].tx_buf = tmpbuf + op->addr.nbytes + 1;
  252. xfers[xferpos].len = op->dummy.nbytes;
  253. xfers[xferpos].tx_nbits = op->dummy.buswidth;
  254. spi_message_add_tail(&xfers[xferpos], &msg);
  255. xferpos++;
  256. totalxferlen += op->dummy.nbytes;
  257. }
  258. if (op->data.nbytes) {
  259. if (op->data.dir == SPI_MEM_DATA_IN) {
  260. xfers[xferpos].rx_buf = op->data.buf.in;
  261. xfers[xferpos].rx_nbits = op->data.buswidth;
  262. } else {
  263. xfers[xferpos].tx_buf = op->data.buf.out;
  264. xfers[xferpos].tx_nbits = op->data.buswidth;
  265. }
  266. xfers[xferpos].len = op->data.nbytes;
  267. spi_message_add_tail(&xfers[xferpos], &msg);
  268. xferpos++;
  269. totalxferlen += op->data.nbytes;
  270. }
  271. ret = spi_sync(slave, &msg);
  272. kfree(tmpbuf);
  273. if (ret)
  274. return ret;
  275. if (msg.actual_length != totalxferlen)
  276. return -EIO;
  277. #else
  278. /* U-Boot does not support parallel SPI data lanes */
  279. if ((op->cmd.buswidth != 1) ||
  280. (op->addr.nbytes && op->addr.buswidth != 1) ||
  281. (op->dummy.nbytes && op->dummy.buswidth != 1) ||
  282. (op->data.nbytes && op->data.buswidth != 1)) {
  283. printf("Dual/Quad raw SPI transfers not supported\n");
  284. return -ENOTSUPP;
  285. }
  286. if (op->data.nbytes) {
  287. if (op->data.dir == SPI_MEM_DATA_IN)
  288. rx_buf = op->data.buf.in;
  289. else
  290. tx_buf = op->data.buf.out;
  291. }
  292. op_len = sizeof(op->cmd.opcode) + op->addr.nbytes + op->dummy.nbytes;
  293. op_buf = calloc(1, op_len);
  294. ret = spi_claim_bus(slave);
  295. if (ret < 0)
  296. return ret;
  297. op_buf[pos++] = op->cmd.opcode;
  298. if (op->addr.nbytes) {
  299. for (i = 0; i < op->addr.nbytes; i++)
  300. op_buf[pos + i] = op->addr.val >>
  301. (8 * (op->addr.nbytes - i - 1));
  302. pos += op->addr.nbytes;
  303. }
  304. if (op->dummy.nbytes)
  305. memset(op_buf + pos, 0xff, op->dummy.nbytes);
  306. /* 1st transfer: opcode + address + dummy cycles */
  307. flag = SPI_XFER_BEGIN;
  308. /* Make sure to set END bit if no tx or rx data messages follow */
  309. if (!tx_buf && !rx_buf)
  310. flag |= SPI_XFER_END;
  311. ret = spi_xfer(slave, op_len * 8, op_buf, NULL, flag);
  312. if (ret)
  313. return ret;
  314. /* 2nd transfer: rx or tx data path */
  315. if (tx_buf || rx_buf) {
  316. ret = spi_xfer(slave, op->data.nbytes * 8, tx_buf,
  317. rx_buf, SPI_XFER_END);
  318. if (ret)
  319. return ret;
  320. }
  321. spi_release_bus(slave);
  322. for (i = 0; i < pos; i++)
  323. debug("%02x ", op_buf[i]);
  324. debug("| [%dB %s] ",
  325. tx_buf || rx_buf ? op->data.nbytes : 0,
  326. tx_buf || rx_buf ? (tx_buf ? "out" : "in") : "-");
  327. for (i = 0; i < op->data.nbytes; i++)
  328. debug("%02x ", tx_buf ? tx_buf[i] : rx_buf[i]);
  329. debug("[ret %d]\n", ret);
  330. free(op_buf);
  331. if (ret < 0)
  332. return ret;
  333. #endif /* __UBOOT__ */
  334. return 0;
  335. }
  336. EXPORT_SYMBOL_GPL(spi_mem_exec_op);
  337. /**
  338. * spi_mem_adjust_op_size() - Adjust the data size of a SPI mem operation to
  339. * match controller limitations
  340. * @slave: the SPI device
  341. * @op: the operation to adjust
  342. *
  343. * Some controllers have FIFO limitations and must split a data transfer
  344. * operation into multiple ones, others require a specific alignment for
  345. * optimized accesses. This function allows SPI mem drivers to split a single
  346. * operation into multiple sub-operations when required.
  347. *
  348. * Return: a negative error code if the controller can't properly adjust @op,
  349. * 0 otherwise. Note that @op->data.nbytes will be updated if @op
  350. * can't be handled in a single step.
  351. */
  352. int spi_mem_adjust_op_size(struct spi_slave *slave, struct spi_mem_op *op)
  353. {
  354. struct udevice *bus = slave->dev->parent;
  355. struct dm_spi_ops *ops = spi_get_ops(bus);
  356. if (ops->mem_ops && ops->mem_ops->adjust_op_size)
  357. return ops->mem_ops->adjust_op_size(slave, op);
  358. return 0;
  359. }
  360. EXPORT_SYMBOL_GPL(spi_mem_adjust_op_size);
  361. #ifndef __UBOOT__
  362. static inline struct spi_mem_driver *to_spi_mem_drv(struct device_driver *drv)
  363. {
  364. return container_of(drv, struct spi_mem_driver, spidrv.driver);
  365. }
  366. static int spi_mem_probe(struct spi_device *spi)
  367. {
  368. struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
  369. struct spi_mem *mem;
  370. mem = devm_kzalloc(&spi->dev, sizeof(*mem), GFP_KERNEL);
  371. if (!mem)
  372. return -ENOMEM;
  373. mem->spi = spi;
  374. spi_set_drvdata(spi, mem);
  375. return memdrv->probe(mem);
  376. }
  377. static int spi_mem_remove(struct spi_device *spi)
  378. {
  379. struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
  380. struct spi_mem *mem = spi_get_drvdata(spi);
  381. if (memdrv->remove)
  382. return memdrv->remove(mem);
  383. return 0;
  384. }
  385. static void spi_mem_shutdown(struct spi_device *spi)
  386. {
  387. struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
  388. struct spi_mem *mem = spi_get_drvdata(spi);
  389. if (memdrv->shutdown)
  390. memdrv->shutdown(mem);
  391. }
  392. /**
  393. * spi_mem_driver_register_with_owner() - Register a SPI memory driver
  394. * @memdrv: the SPI memory driver to register
  395. * @owner: the owner of this driver
  396. *
  397. * Registers a SPI memory driver.
  398. *
  399. * Return: 0 in case of success, a negative error core otherwise.
  400. */
  401. int spi_mem_driver_register_with_owner(struct spi_mem_driver *memdrv,
  402. struct module *owner)
  403. {
  404. memdrv->spidrv.probe = spi_mem_probe;
  405. memdrv->spidrv.remove = spi_mem_remove;
  406. memdrv->spidrv.shutdown = spi_mem_shutdown;
  407. return __spi_register_driver(owner, &memdrv->spidrv);
  408. }
  409. EXPORT_SYMBOL_GPL(spi_mem_driver_register_with_owner);
  410. /**
  411. * spi_mem_driver_unregister_with_owner() - Unregister a SPI memory driver
  412. * @memdrv: the SPI memory driver to unregister
  413. *
  414. * Unregisters a SPI memory driver.
  415. */
  416. void spi_mem_driver_unregister(struct spi_mem_driver *memdrv)
  417. {
  418. spi_unregister_driver(&memdrv->spidrv);
  419. }
  420. EXPORT_SYMBOL_GPL(spi_mem_driver_unregister);
  421. #endif /* __UBOOT__ */