flash.c 9.8 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
  4. *
  5. * (C) Copyright 2002
  6. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  7. *
  8. * Adapted for Interphase 4539 by Wolfgang Grandegger <wg@denx.de>.
  9. *
  10. * SPDX-License-Identifier: GPL-2.0+
  11. */
  12. #include <config.h>
  13. #include <common.h>
  14. #include <flash.h>
  15. #include <asm/io.h>
  16. flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
  17. extern int hwc_flash_size(void);
  18. static ulong flash_get_size (u32 addr, flash_info_t *info);
  19. static int flash_get_offsets (u32 base, flash_info_t *info);
  20. static int write_word (flash_info_t *info, ulong dest, ulong data);
  21. static void flash_reset (u32 addr);
  22. #define out8(a,v) *(volatile unsigned char*)(a) = v
  23. #define in8(a) *(volatile unsigned char*)(a)
  24. #define in32(a) *(volatile unsigned long*)(a)
  25. #define iobarrier_rw() eieio()
  26. unsigned long flash_init (void)
  27. {
  28. unsigned int i;
  29. unsigned long flash_size = 0;
  30. unsigned long bank_size;
  31. unsigned int bank = 0;
  32. /* Init: no FLASHes known */
  33. for (i=0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
  34. flash_info[i].flash_id = FLASH_UNKNOWN;
  35. flash_info[i].sector_count = 0;
  36. flash_info[i].size = 0;
  37. }
  38. /* Initialise the BOOT Flash */
  39. if (bank == CONFIG_SYS_MAX_FLASH_BANKS) {
  40. puts ("Warning: not all Flashes are initialised !");
  41. return flash_size;
  42. }
  43. bank_size = flash_get_size (CONFIG_SYS_FLASH_BASE, flash_info + bank);
  44. if (bank_size) {
  45. #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE && \
  46. CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MAX_FLASH_SIZE
  47. /* monitor protection ON by default */
  48. flash_protect(FLAG_PROTECT_SET,
  49. CONFIG_SYS_MONITOR_BASE,
  50. CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
  51. flash_info + bank);
  52. #endif
  53. #ifdef CONFIG_ENV_IS_IN_FLASH
  54. /* ENV protection ON by default */
  55. flash_protect(FLAG_PROTECT_SET,
  56. CONFIG_ENV_ADDR,
  57. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
  58. flash_info + bank);
  59. #endif
  60. /* HWC protection ON by default */
  61. flash_protect(FLAG_PROTECT_SET,
  62. CONFIG_SYS_FLASH_BASE,
  63. CONFIG_SYS_FLASH_BASE + 0x10000 - 1,
  64. flash_info + bank);
  65. flash_size += bank_size;
  66. bank++;
  67. } else {
  68. puts ("Warning: the BOOT Flash is not initialised !");
  69. }
  70. return flash_size;
  71. }
  72. /*
  73. * The following code cannot be run from FLASH!
  74. */
  75. static ulong flash_get_size (u32 addr, flash_info_t *info)
  76. {
  77. volatile uchar value;
  78. #if 0
  79. int i;
  80. #endif
  81. /* Write auto select command: read Manufacturer ID */
  82. out8(addr + 0x0555, 0xAA);
  83. iobarrier_rw();
  84. udelay(10);
  85. out8(addr + 0x02AA, 0x55);
  86. iobarrier_rw();
  87. udelay(10);
  88. out8(addr + 0x0555, 0x90);
  89. iobarrier_rw();
  90. udelay(10);
  91. value = in8(addr);
  92. iobarrier_rw();
  93. udelay(10);
  94. switch (value | (value << 16)) {
  95. case AMD_MANUFACT:
  96. info->flash_id = FLASH_MAN_AMD;
  97. break;
  98. case FUJ_MANUFACT:
  99. info->flash_id = FLASH_MAN_FUJ;
  100. break;
  101. default:
  102. info->flash_id = FLASH_UNKNOWN;
  103. flash_reset (addr);
  104. return 0;
  105. }
  106. value = in8(addr + 1); /* device ID */
  107. iobarrier_rw();
  108. switch (value) {
  109. case AMD_ID_LV033C:
  110. info->flash_id += FLASH_AM033C;
  111. info->size = hwc_flash_size();
  112. if (info->size > CONFIG_SYS_MAX_FLASH_SIZE) {
  113. printf("U-Boot supports only %d MB\n",
  114. CONFIG_SYS_MAX_FLASH_SIZE);
  115. info->size = CONFIG_SYS_MAX_FLASH_SIZE;
  116. }
  117. info->sector_count = info->size / 0x10000;
  118. break; /* => 4 MB */
  119. default:
  120. info->flash_id = FLASH_UNKNOWN;
  121. flash_reset (addr);
  122. return (0); /* => no or unknown flash */
  123. }
  124. if (!flash_get_offsets (addr, info)) {
  125. flash_reset (addr);
  126. return 0;
  127. }
  128. #if 0
  129. /* check for protected sectors */
  130. for (i = 0; i < info->sector_count; i++) {
  131. /* read sector protection at sector address, (A7 .. A0) = 0x02 */
  132. /* D0 = 1 if protected */
  133. value = in8(info->start[i] + 2);
  134. iobarrier_rw();
  135. info->protect[i] = (value & 1) != 0;
  136. }
  137. #endif
  138. /*
  139. * Reset bank to read mode
  140. */
  141. flash_reset (addr);
  142. return (info->size);
  143. }
  144. static int flash_get_offsets (u32 base, flash_info_t *info)
  145. {
  146. unsigned int i, size;
  147. switch (info->flash_id & FLASH_TYPEMASK) {
  148. case FLASH_AM033C:
  149. /* set sector offsets for uniform sector type */
  150. size = info->size / info->sector_count;
  151. for (i = 0; i < info->sector_count; i++) {
  152. info->start[i] = base + i * size;
  153. }
  154. break;
  155. default:
  156. return 0;
  157. }
  158. return 1;
  159. }
  160. int flash_erase (flash_info_t *info, int s_first, int s_last)
  161. {
  162. volatile u32 addr = info->start[0];
  163. int flag, prot, sect, l_sect;
  164. ulong start, now, last;
  165. if (s_first < 0 || s_first > s_last) {
  166. if (info->flash_id == FLASH_UNKNOWN) {
  167. printf ("- missing\n");
  168. } else {
  169. printf ("- no sectors to erase\n");
  170. }
  171. return 1;
  172. }
  173. if (info->flash_id == FLASH_UNKNOWN ||
  174. info->flash_id > FLASH_AMD_COMP) {
  175. printf ("Can't erase unknown flash type %08lx - aborted\n",
  176. info->flash_id);
  177. return 1;
  178. }
  179. prot = 0;
  180. for (sect=s_first; sect<=s_last; ++sect) {
  181. if (info->protect[sect]) {
  182. prot++;
  183. }
  184. }
  185. if (prot) {
  186. printf ("- Warning: %d protected sectors will not be erased!\n",
  187. prot);
  188. } else {
  189. printf ("\n");
  190. }
  191. l_sect = -1;
  192. /* Disable interrupts which might cause a timeout here */
  193. flag = disable_interrupts();
  194. out8(addr + 0x555, 0xAA);
  195. iobarrier_rw();
  196. out8(addr + 0x2AA, 0x55);
  197. iobarrier_rw();
  198. out8(addr + 0x555, 0x80);
  199. iobarrier_rw();
  200. out8(addr + 0x555, 0xAA);
  201. iobarrier_rw();
  202. out8(addr + 0x2AA, 0x55);
  203. iobarrier_rw();
  204. /* Start erase on unprotected sectors */
  205. for (sect = s_first; sect<=s_last; sect++) {
  206. if (info->protect[sect] == 0) { /* not protected */
  207. addr = info->start[sect];
  208. out8(addr, 0x30);
  209. iobarrier_rw();
  210. l_sect = sect;
  211. }
  212. }
  213. /* re-enable interrupts if necessary */
  214. if (flag)
  215. enable_interrupts();
  216. /* wait at least 80us - let's wait 1 ms */
  217. udelay (1000);
  218. /*
  219. * We wait for the last triggered sector
  220. */
  221. if (l_sect < 0)
  222. goto DONE;
  223. start = get_timer (0);
  224. last = start;
  225. addr = info->start[l_sect];
  226. while ((in8(addr) & 0x80) != 0x80) {
  227. if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
  228. printf ("Timeout\n");
  229. return 1;
  230. }
  231. /* show that we're waiting */
  232. if ((now - last) > 1000) { /* every second */
  233. putc ('.');
  234. last = now;
  235. }
  236. iobarrier_rw();
  237. }
  238. DONE:
  239. /* reset to read mode */
  240. flash_reset (info->start[0]);
  241. printf (" done\n");
  242. return 0;
  243. }
  244. /*
  245. * Copy memory to flash, returns:
  246. * 0 - OK
  247. * 1 - write timeout
  248. * 2 - Flash not erased
  249. */
  250. int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  251. {
  252. ulong cp, wp, data;
  253. int i, l, rc;
  254. wp = (addr & ~3); /* get lower word aligned address */
  255. /*
  256. * handle unaligned start bytes
  257. */
  258. if ((l = addr - wp) != 0) {
  259. data = 0;
  260. for (i=0, cp=wp; i<l; ++i, ++cp) {
  261. data = (data << 8) | (*(uchar *)cp);
  262. }
  263. for (; i<4 && cnt>0; ++i) {
  264. data = (data << 8) | *src++;
  265. --cnt;
  266. ++cp;
  267. }
  268. for (; cnt==0 && i<4; ++i, ++cp) {
  269. data = (data << 8) | (*(uchar *)cp);
  270. }
  271. if ((rc = write_word(info, wp, data)) != 0) {
  272. return (rc);
  273. }
  274. wp += 4;
  275. }
  276. /*
  277. * handle word aligned part
  278. */
  279. while (cnt >= 4) {
  280. data = 0;
  281. for (i=0; i<4; ++i) {
  282. data = (data << 8) | *src++;
  283. }
  284. if ((rc = write_word(info, wp, data)) != 0) {
  285. return (rc);
  286. }
  287. wp += 4;
  288. cnt -= 4;
  289. }
  290. if (cnt == 0) {
  291. return (0);
  292. }
  293. /*
  294. * handle unaligned tail bytes
  295. */
  296. data = 0;
  297. for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
  298. data = (data << 8) | *src++;
  299. --cnt;
  300. }
  301. for (; i<4; ++i, ++cp) {
  302. data = (data << 8) | (*(uchar *)cp);
  303. }
  304. return (write_word(info, wp, data));
  305. }
  306. /*
  307. * Write a word to Flash, returns:
  308. * 0 - OK
  309. * 1 - write timeout
  310. * 2 - Flash not erased
  311. */
  312. static int write_word (flash_info_t *info, ulong dest, ulong data)
  313. {
  314. volatile u32 addr = info->start[0];
  315. ulong start;
  316. int flag, i;
  317. /* Check if Flash is (sufficiently) erased */
  318. if ((in32(dest) & data) != data) {
  319. return (2);
  320. }
  321. /* Disable interrupts which might cause a timeout here */
  322. flag = disable_interrupts();
  323. /* first, perform an unlock bypass command to speed up flash writes */
  324. out8(addr + 0x555, 0xAA);
  325. iobarrier_rw();
  326. out8(addr + 0x2AA, 0x55);
  327. iobarrier_rw();
  328. out8(addr + 0x555, 0x20);
  329. iobarrier_rw();
  330. /* write each byte out */
  331. for (i = 0; i < 4; i++) {
  332. char *data_ch = (char *)&data;
  333. out8(addr, 0xA0);
  334. iobarrier_rw();
  335. out8(dest+i, data_ch[i]);
  336. iobarrier_rw();
  337. udelay(10); /* XXX */
  338. }
  339. /* we're done, now do an unlock bypass reset */
  340. out8(addr, 0x90);
  341. iobarrier_rw();
  342. out8(addr, 0x00);
  343. iobarrier_rw();
  344. /* re-enable interrupts if necessary */
  345. if (flag)
  346. enable_interrupts();
  347. /* data polling for D7 */
  348. start = get_timer (0);
  349. while ((in32(dest) & 0x80808080) != (data & 0x80808080)) {
  350. if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
  351. return (1);
  352. }
  353. iobarrier_rw();
  354. }
  355. flash_reset (addr);
  356. return (0);
  357. }
  358. /*
  359. * Reset bank to read mode
  360. */
  361. static void flash_reset (u32 addr)
  362. {
  363. out8(addr, 0xF0); /* reset bank */
  364. iobarrier_rw();
  365. }
  366. void flash_print_info (flash_info_t *info)
  367. {
  368. int i;
  369. if (info->flash_id == FLASH_UNKNOWN) {
  370. printf ("missing or unknown FLASH type\n");
  371. return;
  372. }
  373. switch (info->flash_id & FLASH_VENDMASK) {
  374. case FLASH_MAN_AMD: printf ("AMD "); break;
  375. case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
  376. case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
  377. default: printf ("Unknown Vendor "); break;
  378. }
  379. switch (info->flash_id & FLASH_TYPEMASK) {
  380. case FLASH_AM033C: printf ("AM29LV033C (32 Mbit, uniform sectors)\n");
  381. break;
  382. default: printf ("Unknown Chip Type\n");
  383. break;
  384. }
  385. if (info->size % 0x100000 == 0) {
  386. printf (" Size: %ld MB in %d Sectors\n",
  387. info->size / 0x100000, info->sector_count);
  388. }
  389. else if (info->size % 0x400 == 0) {
  390. printf (" Size: %ld KB in %d Sectors\n",
  391. info->size / 0x400, info->sector_count);
  392. }
  393. else {
  394. printf (" Size: %ld B in %d Sectors\n",
  395. info->size, info->sector_count);
  396. }
  397. printf (" Sector Start Addresses:");
  398. for (i=0; i<info->sector_count; ++i) {
  399. if ((i % 5) == 0)
  400. printf ("\n ");
  401. printf (" %08lX%s",
  402. info->start[i],
  403. info->protect[i] ? " (RO)" : " "
  404. );
  405. }
  406. printf ("\n");
  407. }