sysreset_rockchip.c 1.0 KB

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  1. /*
  2. * (C) Copyright 2017 Rockchip Electronics Co., Ltd
  3. *
  4. * SPDX-License-Identifier: GPL-2.0
  5. */
  6. #include <common.h>
  7. #include <dm.h>
  8. #include <errno.h>
  9. #include <sysreset.h>
  10. #include <asm/io.h>
  11. #include <asm/arch/clock.h>
  12. #include <asm/arch/cru_rk3328.h>
  13. #include <asm/arch/hardware.h>
  14. #include <linux/err.h>
  15. int rockchip_sysreset_request(struct udevice *dev, enum sysreset_t type)
  16. {
  17. struct sysreset_reg *offset = dev_get_priv(dev);
  18. unsigned long cru_base = (unsigned long)rockchip_get_cru();
  19. if (IS_ERR_VALUE(cru_base))
  20. return (int)cru_base;
  21. switch (type) {
  22. case SYSRESET_WARM:
  23. writel(0xeca8, cru_base + offset->glb_srst_snd_value);
  24. break;
  25. case SYSRESET_COLD:
  26. writel(0xfdb9, cru_base + offset->glb_srst_fst_value);
  27. break;
  28. default:
  29. return -EPROTONOSUPPORT;
  30. }
  31. return -EINPROGRESS;
  32. }
  33. static struct sysreset_ops rockchip_sysreset = {
  34. .request = rockchip_sysreset_request,
  35. };
  36. U_BOOT_DRIVER(sysreset_rockchip) = {
  37. .name = "rockchip_sysreset",
  38. .id = UCLASS_SYSRESET,
  39. .ops = &rockchip_sysreset,
  40. };