zynqmp-zcu100-revC.dts 7.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * dts file for Xilinx ZynqMP ZCU100 revC
  4. *
  5. * (C) Copyright 2016 - 2018, Xilinx, Inc.
  6. *
  7. * Michal Simek <michal.simek@xilinx.com>
  8. * Nathalie Chan King Choy
  9. */
  10. /dts-v1/;
  11. #include "zynqmp.dtsi"
  12. #include "zynqmp-clk.dtsi"
  13. #include <dt-bindings/input/input.h>
  14. #include <dt-bindings/interrupt-controller/irq.h>
  15. #include <dt-bindings/gpio/gpio.h>
  16. #include <dt-bindings/phy/phy.h>
  17. / {
  18. model = "ZynqMP ZCU100 RevC";
  19. compatible = "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100", "xlnx,zynqmp";
  20. aliases {
  21. gpio0 = &gpio;
  22. i2c0 = &i2c1;
  23. rtc0 = &rtc;
  24. serial0 = &uart1;
  25. serial1 = &uart0;
  26. serial2 = &dcc;
  27. spi0 = &spi0;
  28. spi1 = &spi1;
  29. usb0 = &usb0;
  30. usb1 = &usb1;
  31. mmc0 = &sdhci0;
  32. mmc1 = &sdhci1;
  33. };
  34. chosen {
  35. bootargs = "earlycon";
  36. stdout-path = "serial0:115200n8";
  37. };
  38. memory@0 {
  39. device_type = "memory";
  40. reg = <0x0 0x0 0x0 0x80000000>;
  41. };
  42. gpio-keys {
  43. compatible = "gpio-keys";
  44. autorepeat;
  45. sw4 {
  46. label = "sw4";
  47. gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
  48. linux,code = <KEY_POWER>;
  49. gpio-key,wakeup;
  50. autorepeat;
  51. };
  52. };
  53. iio-hwmon {
  54. compatible = "iio-hwmon";
  55. io-channels = <&xilinx_ams 0>, <&xilinx_ams 1>, <&xilinx_ams 2>,
  56. <&xilinx_ams 3>, <&xilinx_ams 4>, <&xilinx_ams 5>,
  57. <&xilinx_ams 6>, <&xilinx_ams 7>, <&xilinx_ams 8>,
  58. <&xilinx_ams 9>, <&xilinx_ams 10>,
  59. <&xilinx_ams 11>, <&xilinx_ams 12>;
  60. };
  61. leds {
  62. compatible = "gpio-leds";
  63. ds2 {
  64. label = "ds2";
  65. gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
  66. linux,default-trigger = "heartbeat";
  67. };
  68. ds3 {
  69. label = "ds3";
  70. gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
  71. linux,default-trigger = "phy0tx"; /* WLAN tx */
  72. default-state = "off";
  73. };
  74. ds4 {
  75. label = "ds4";
  76. gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
  77. linux,default-trigger = "phy0rx"; /* WLAN rx */
  78. default-state = "off";
  79. };
  80. ds5 {
  81. label = "ds5";
  82. gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
  83. linux,default-trigger = "bluetooth-power";
  84. };
  85. vbus_det { /* U5 USB5744 VBUS detection via MIO25 */
  86. label = "vbus_det";
  87. gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
  88. default-state = "on";
  89. };
  90. };
  91. ltc2954: ltc2954 { /* U7 */
  92. compatible = "lltc,ltc2954", "lltc,ltc2952";
  93. trigger-gpios = <&gpio 26 GPIO_ACTIVE_LOW>; /* INT line - input */
  94. /* If there is HW watchdog on mezzanine this signal should be connected there */
  95. watchdog-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; /* MIO on PAD */
  96. kill-gpios = <&gpio 34 GPIO_ACTIVE_LOW>; /* KILL signal - output */
  97. };
  98. wmmcsdio_fixed: fixedregulator-mmcsdio {
  99. compatible = "regulator-fixed";
  100. regulator-name = "wmmcsdio_fixed";
  101. regulator-min-microvolt = <3300000>;
  102. regulator-max-microvolt = <3300000>;
  103. regulator-always-on;
  104. regulator-boot-on;
  105. };
  106. sdio_pwrseq: sdio_pwrseq {
  107. compatible = "mmc-pwrseq-simple";
  108. reset-gpios = <&gpio 7 GPIO_ACTIVE_LOW>; /* WIFI_EN */
  109. };
  110. };
  111. &dcc {
  112. status = "okay";
  113. };
  114. &gpio {
  115. status = "okay";
  116. gpio-line-names = "UART1_TX", "UART1_RX", "UART0_RX", "UART0_TX", "I2C1_SCL",
  117. "I2C1_SDA", "SPI1_SCLK", "WLAN_EN", "BT_EN", "SPI1_CS",
  118. "SPI1_MISO", "SPI1_MOSI", "I2C_MUX_RESET", "SD0_DAT0", "SD0_DAT1",
  119. "SD0_DAT2", "SD0_DAT3", "PS_LED3", "PS_LED2", "PS_LED1",
  120. "PS_LED0", "SD0_CMD", "SD0_CLK", "GPIO_PB", "SD0_DETECT",
  121. "VBUS_DET", "POWER_INT", "DP_AUX", "DP_HPD", "DP_OE",
  122. "DP_AUX_IN", "INA226_ALERT", "PS_FP_PWR_EN", "PL_PWR_EN", "POWER_KILL",
  123. "", "GPIO-A", "GPIO-B", "SPI0_SCLK", "GPIO-C",
  124. "GPIO-D", "SPI0_CS", "SPI0_MISO", "SPI_MOSI", "GPIO-E",
  125. "GPIO-F", "SD1_D0", "SD1_D1", "SD1_D2", "SD1_D3",
  126. "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2",
  127. "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3",
  128. "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK",
  129. "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1",
  130. "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6",
  131. "USB_DATA7", "WLAN_IRQ", "PMIC_IRQ", /* MIO end and EMIO start */
  132. "", "",
  133. "", "", "", "", "", "", "", "", "", "",
  134. "", "", "", "", "", "", "", "", "", "",
  135. "", "", "", "", "", "", "", "", "", "",
  136. "", "", "", "", "", "", "", "", "", "",
  137. "", "", "", "", "", "", "", "", "", "",
  138. "", "", "", "", "", "", "", "", "", "",
  139. "", "", "", "", "", "", "", "", "", "",
  140. "", "", "", "", "", "", "", "", "", "",
  141. "", "", "", "", "", "", "", "", "", "",
  142. "", "", "", "";
  143. };
  144. &gpu {
  145. status = "okay";
  146. };
  147. &i2c1 {
  148. status = "okay";
  149. clock-frequency = <100000>;
  150. i2c-mux@75 { /* u11 */
  151. compatible = "nxp,pca9548";
  152. #address-cells = <1>;
  153. #size-cells = <0>;
  154. reg = <0x75>;
  155. i2csw_0: i2c@0 {
  156. #address-cells = <1>;
  157. #size-cells = <0>;
  158. reg = <0>;
  159. label = "LS-I2C0";
  160. };
  161. i2csw_1: i2c@1 {
  162. #address-cells = <1>;
  163. #size-cells = <0>;
  164. reg = <1>;
  165. label = "LS-I2C1";
  166. };
  167. i2csw_2: i2c@2 {
  168. #address-cells = <1>;
  169. #size-cells = <0>;
  170. reg = <2>;
  171. label = "HS-I2C2";
  172. };
  173. i2csw_3: i2c@3 {
  174. #address-cells = <1>;
  175. #size-cells = <0>;
  176. reg = <3>;
  177. label = "HS-I2C3";
  178. };
  179. i2csw_4: i2c@4 {
  180. #address-cells = <1>;
  181. #size-cells = <0>;
  182. reg = <0x4>;
  183. pmic: pmic@5e { /* Custom TI PMIC u33 */
  184. compatible = "ti,tps65086";
  185. reg = <0x5e>;
  186. interrupt-parent = <&gpio>;
  187. interrupts = <77 GPIO_ACTIVE_LOW>;
  188. #gpio-cells = <2>;
  189. gpio-controller;
  190. };
  191. };
  192. i2csw_5: i2c@5 {
  193. #address-cells = <1>;
  194. #size-cells = <0>;
  195. reg = <5>;
  196. /* PS_PMBUS */
  197. ina226@40 { /* u35 */
  198. compatible = "ti,ina226";
  199. reg = <0x40>;
  200. shunt-resistor = <10000>;
  201. /* MIO31 is alert which should be routed to PMUFW */
  202. };
  203. };
  204. i2csw_6: i2c@6 {
  205. #address-cells = <1>;
  206. #size-cells = <0>;
  207. reg = <6>;
  208. /*
  209. * Not Connected
  210. */
  211. };
  212. i2csw_7: i2c@7 {
  213. #address-cells = <1>;
  214. #size-cells = <0>;
  215. reg = <7>;
  216. /*
  217. * usb5744 (DNP) - U5
  218. * 100kHz - this is default freq for us
  219. */
  220. };
  221. };
  222. };
  223. &rtc {
  224. status = "okay";
  225. };
  226. /* SD0 only supports 3.3V, no level shifter */
  227. &sdhci0 {
  228. status = "okay";
  229. no-1-8-v;
  230. disable-wp;
  231. xlnx,mio_bank = <0>;
  232. };
  233. &sdhci1 {
  234. status = "okay";
  235. bus-width = <0x4>;
  236. xlnx,mio_bank = <0>;
  237. non-removable;
  238. disable-wp;
  239. cap-power-off-card;
  240. mmc-pwrseq = <&sdio_pwrseq>;
  241. vqmmc-supply = <&wmmcsdio_fixed>;
  242. #address-cells = <1>;
  243. #size-cells = <0>;
  244. wlcore: wifi@2 {
  245. compatible = "ti,wl1831";
  246. reg = <2>;
  247. interrupt-parent = <&gpio>;
  248. interrupts = <76 IRQ_TYPE_EDGE_RISING>; /* MIO76 WLAN_IRQ 1V8 */
  249. };
  250. };
  251. &serdes {
  252. status = "okay";
  253. };
  254. &spi0 { /* Low Speed connector */
  255. status = "okay";
  256. label = "LS-SPI0";
  257. };
  258. &spi1 { /* High Speed connector */
  259. status = "okay";
  260. label = "HS-SPI1";
  261. };
  262. &uart0 {
  263. status = "okay";
  264. bluetooth {
  265. compatible = "ti,wl1831-st";
  266. enable-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
  267. };
  268. };
  269. &uart1 {
  270. status = "okay";
  271. };
  272. /* ULPI SMSC USB3320 */
  273. &usb0 {
  274. status = "okay";
  275. };
  276. &dwc3_0 {
  277. status = "okay";
  278. dr_mode = "peripheral";
  279. phy-names = "usb3-phy";
  280. phys = <&lane2 PHY_TYPE_USB3 0 0 26000000>;
  281. maximum-speed = "super-speed";
  282. };
  283. /* ULPI SMSC USB3320 */
  284. &usb1 {
  285. status = "okay";
  286. };
  287. &dwc3_1 {
  288. status = "okay";
  289. dr_mode = "host";
  290. phy-names = "usb3-phy";
  291. phys = <&lane3 PHY_TYPE_USB3 1 0 26000000>;
  292. maximum-speed = "super-speed";
  293. };
  294. &watchdog0 {
  295. status = "okay";
  296. reset-on-timeout;
  297. };
  298. &xilinx_ams {
  299. status = "okay";
  300. };
  301. &ams_ps {
  302. status = "okay";
  303. };