sbc_init.c 1.2 KB

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  1. /*
  2. * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <linux/io.h>
  8. #include <mach/sbc-regs.h>
  9. #include <mach/sg-regs.h>
  10. void sbc_init(void)
  11. {
  12. u32 tmp;
  13. /* system bus output enable */
  14. tmp = readl(PC0CTRL);
  15. tmp &= 0xfffffcff;
  16. writel(tmp, PC0CTRL);
  17. /*
  18. * Only CS1 is connected to support card.
  19. * BKSZ[1:0] should be set to "01".
  20. */
  21. writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
  22. writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
  23. writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
  24. writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
  25. if (boot_is_swapped()) {
  26. /*
  27. * Boot Swap On: boot from external NOR/SRAM
  28. * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
  29. *
  30. * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
  31. * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
  32. */
  33. writel(0x0000bc01, SBBASE0);
  34. } else {
  35. /*
  36. * Boot Swap Off: boot from mask ROM
  37. * 0x40000000-0x41ffffff: mask ROM
  38. * 0x42000000-0x43efffff: memory bank (31MB)
  39. * 0x43f00000-0x43ffffff: peripherals (1MB)
  40. */
  41. writel(0x0000be01, SBBASE0); /* dummy */
  42. writel(0x0200be01, SBBASE1);
  43. }
  44. }