board_f.c 24 KB

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  1. /*
  2. * Copyright (c) 2011 The Chromium OS Authors.
  3. * (C) Copyright 2002-2006
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. *
  6. * (C) Copyright 2002
  7. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  8. * Marius Groeger <mgroeger@sysgo.de>
  9. *
  10. * SPDX-License-Identifier: GPL-2.0+
  11. */
  12. #include <common.h>
  13. #include <linux/compiler.h>
  14. #include <version.h>
  15. #include <environment.h>
  16. #include <fdtdec.h>
  17. #include <fs.h>
  18. #if defined(CONFIG_CMD_IDE)
  19. #include <ide.h>
  20. #endif
  21. #include <i2c.h>
  22. #include <initcall.h>
  23. #include <logbuff.h>
  24. /* TODO: Can we move these into arch/ headers? */
  25. #ifdef CONFIG_8xx
  26. #include <mpc8xx.h>
  27. #endif
  28. #ifdef CONFIG_5xx
  29. #include <mpc5xx.h>
  30. #endif
  31. #ifdef CONFIG_MPC5xxx
  32. #include <mpc5xxx.h>
  33. #endif
  34. #include <os.h>
  35. #include <post.h>
  36. #include <spi.h>
  37. #include <status_led.h>
  38. #include <trace.h>
  39. #include <watchdog.h>
  40. #include <asm/errno.h>
  41. #include <asm/io.h>
  42. #ifdef CONFIG_MP
  43. #include <asm/mp.h>
  44. #endif
  45. #include <asm/sections.h>
  46. #ifdef CONFIG_X86
  47. #include <asm/init_helpers.h>
  48. #include <asm/relocate.h>
  49. #endif
  50. #ifdef CONFIG_SANDBOX
  51. #include <asm/state.h>
  52. #endif
  53. #include <linux/compiler.h>
  54. /*
  55. * Pointer to initial global data area
  56. *
  57. * Here we initialize it if needed.
  58. */
  59. #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  60. #undef XTRN_DECLARE_GLOBAL_DATA_PTR
  61. #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
  62. DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
  63. #else
  64. DECLARE_GLOBAL_DATA_PTR;
  65. #endif
  66. /*
  67. * sjg: IMO this code should be
  68. * refactored to a single function, something like:
  69. *
  70. * void led_set_state(enum led_colour_t colour, int on);
  71. */
  72. /************************************************************************
  73. * Coloured LED functionality
  74. ************************************************************************
  75. * May be supplied by boards if desired
  76. */
  77. __weak void coloured_LED_init(void) {}
  78. __weak void red_led_on(void) {}
  79. __weak void red_led_off(void) {}
  80. __weak void green_led_on(void) {}
  81. __weak void green_led_off(void) {}
  82. __weak void yellow_led_on(void) {}
  83. __weak void yellow_led_off(void) {}
  84. __weak void blue_led_on(void) {}
  85. __weak void blue_led_off(void) {}
  86. /*
  87. * Why is gd allocated a register? Prior to reloc it might be better to
  88. * just pass it around to each function in this file?
  89. *
  90. * After reloc one could argue that it is hardly used and doesn't need
  91. * to be in a register. Or if it is it should perhaps hold pointers to all
  92. * global data for all modules, so that post-reloc we can avoid the massive
  93. * literal pool we get on ARM. Or perhaps just encourage each module to use
  94. * a structure...
  95. */
  96. /*
  97. * Could the CONFIG_SPL_BUILD infection become a flag in gd?
  98. */
  99. #if defined(CONFIG_WATCHDOG)
  100. static int init_func_watchdog_init(void)
  101. {
  102. puts(" Watchdog enabled\n");
  103. WATCHDOG_RESET();
  104. return 0;
  105. }
  106. int init_func_watchdog_reset(void)
  107. {
  108. WATCHDOG_RESET();
  109. return 0;
  110. }
  111. #endif /* CONFIG_WATCHDOG */
  112. void __board_add_ram_info(int use_default)
  113. {
  114. /* please define platform specific board_add_ram_info() */
  115. }
  116. void board_add_ram_info(int)
  117. __attribute__ ((weak, alias("__board_add_ram_info")));
  118. static int init_baud_rate(void)
  119. {
  120. gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
  121. return 0;
  122. }
  123. static int display_text_info(void)
  124. {
  125. #ifndef CONFIG_SANDBOX
  126. ulong bss_start, bss_end;
  127. bss_start = (ulong)&__bss_start;
  128. bss_end = (ulong)&__bss_end;
  129. debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n",
  130. CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
  131. #endif
  132. #ifdef CONFIG_MODEM_SUPPORT
  133. debug("Modem Support enabled\n");
  134. #endif
  135. #ifdef CONFIG_USE_IRQ
  136. debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
  137. debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
  138. #endif
  139. return 0;
  140. }
  141. static int announce_dram_init(void)
  142. {
  143. puts("DRAM: ");
  144. return 0;
  145. }
  146. #if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
  147. static int init_func_ram(void)
  148. {
  149. #ifdef CONFIG_BOARD_TYPES
  150. int board_type = gd->board_type;
  151. #else
  152. int board_type = 0; /* use dummy arg */
  153. #endif
  154. gd->ram_size = initdram(board_type);
  155. if (gd->ram_size > 0)
  156. return 0;
  157. puts("*** failed ***\n");
  158. return 1;
  159. }
  160. #endif
  161. static int show_dram_config(void)
  162. {
  163. unsigned long long size;
  164. #ifdef CONFIG_NR_DRAM_BANKS
  165. int i;
  166. debug("\nRAM Configuration:\n");
  167. for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  168. size += gd->bd->bi_dram[i].size;
  169. debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
  170. #ifdef DEBUG
  171. print_size(gd->bd->bi_dram[i].size, "\n");
  172. #endif
  173. }
  174. debug("\nDRAM: ");
  175. #else
  176. size = gd->ram_size;
  177. #endif
  178. print_size(size, "");
  179. board_add_ram_info(0);
  180. putc('\n');
  181. return 0;
  182. }
  183. void __dram_init_banksize(void)
  184. {
  185. #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
  186. gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  187. gd->bd->bi_dram[0].size = get_effective_memsize();
  188. #endif
  189. }
  190. void dram_init_banksize(void)
  191. __attribute__((weak, alias("__dram_init_banksize")));
  192. #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
  193. static int init_func_i2c(void)
  194. {
  195. puts("I2C: ");
  196. #ifdef CONFIG_SYS_I2C
  197. i2c_init_all();
  198. #else
  199. i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  200. #endif
  201. puts("ready\n");
  202. return 0;
  203. }
  204. #endif
  205. #if defined(CONFIG_HARD_SPI)
  206. static int init_func_spi(void)
  207. {
  208. puts("SPI: ");
  209. spi_init();
  210. puts("ready\n");
  211. return 0;
  212. }
  213. #endif
  214. __maybe_unused
  215. static int zero_global_data(void)
  216. {
  217. memset((void *)gd, '\0', sizeof(gd_t));
  218. return 0;
  219. }
  220. static int setup_mon_len(void)
  221. {
  222. #ifdef __ARM__
  223. gd->mon_len = (ulong)&__bss_end - (ulong)_start;
  224. #elif defined(CONFIG_SANDBOX)
  225. gd->mon_len = (ulong)&_end - (ulong)_init;
  226. #else
  227. /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
  228. gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
  229. #endif
  230. return 0;
  231. }
  232. __weak int arch_cpu_init(void)
  233. {
  234. return 0;
  235. }
  236. #ifdef CONFIG_OF_HOSTFILE
  237. static int read_fdt_from_file(void)
  238. {
  239. struct sandbox_state *state = state_get_current();
  240. const char *fname = state->fdt_fname;
  241. void *blob;
  242. ssize_t size;
  243. int err;
  244. int fd;
  245. blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
  246. if (!state->fdt_fname) {
  247. err = fdt_create_empty_tree(blob, 256);
  248. if (!err)
  249. goto done;
  250. printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
  251. return -EINVAL;
  252. }
  253. size = os_get_filesize(fname);
  254. if (size < 0) {
  255. printf("Failed to file FDT file '%s'\n", fname);
  256. return -ENOENT;
  257. }
  258. fd = os_open(fname, OS_O_RDONLY);
  259. if (fd < 0) {
  260. printf("Failed to open FDT file '%s'\n", fname);
  261. return -EACCES;
  262. }
  263. if (os_read(fd, blob, size) != size) {
  264. os_close(fd);
  265. return -EIO;
  266. }
  267. os_close(fd);
  268. done:
  269. gd->fdt_blob = blob;
  270. return 0;
  271. }
  272. #endif
  273. #ifdef CONFIG_SANDBOX
  274. static int setup_ram_buf(void)
  275. {
  276. struct sandbox_state *state = state_get_current();
  277. gd->arch.ram_buf = state->ram_buf;
  278. gd->ram_size = state->ram_size;
  279. return 0;
  280. }
  281. #endif
  282. static int setup_fdt(void)
  283. {
  284. #ifdef CONFIG_OF_EMBED
  285. /* Get a pointer to the FDT */
  286. gd->fdt_blob = __dtb_dt_begin;
  287. #elif defined CONFIG_OF_SEPARATE
  288. /* FDT is at end of image */
  289. gd->fdt_blob = (ulong *)&_end;
  290. #elif defined(CONFIG_OF_HOSTFILE)
  291. if (read_fdt_from_file()) {
  292. puts("Failed to read control FDT\n");
  293. return -1;
  294. }
  295. #endif
  296. /* Allow the early environment to override the fdt address */
  297. gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
  298. (uintptr_t)gd->fdt_blob);
  299. return 0;
  300. }
  301. /* Get the top of usable RAM */
  302. __weak ulong board_get_usable_ram_top(ulong total_size)
  303. {
  304. return gd->ram_top;
  305. }
  306. static int setup_dest_addr(void)
  307. {
  308. debug("Monitor len: %08lX\n", gd->mon_len);
  309. /*
  310. * Ram is setup, size stored in gd !!
  311. */
  312. debug("Ram size: %08lX\n", (ulong)gd->ram_size);
  313. #if defined(CONFIG_SYS_MEM_TOP_HIDE)
  314. /*
  315. * Subtract specified amount of memory to hide so that it won't
  316. * get "touched" at all by U-Boot. By fixing up gd->ram_size
  317. * the Linux kernel should now get passed the now "corrected"
  318. * memory size and won't touch it either. This should work
  319. * for arch/ppc and arch/powerpc. Only Linux board ports in
  320. * arch/powerpc with bootwrapper support, that recalculate the
  321. * memory size from the SDRAM controller setup will have to
  322. * get fixed.
  323. */
  324. gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
  325. #endif
  326. #ifdef CONFIG_SYS_SDRAM_BASE
  327. gd->ram_top = CONFIG_SYS_SDRAM_BASE;
  328. #endif
  329. gd->ram_top += get_effective_memsize();
  330. gd->ram_top = board_get_usable_ram_top(gd->mon_len);
  331. gd->relocaddr = gd->ram_top;
  332. debug("Ram top: %08lX\n", (ulong)gd->ram_top);
  333. #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  334. /*
  335. * We need to make sure the location we intend to put secondary core
  336. * boot code is reserved and not used by any part of u-boot
  337. */
  338. if (gd->relocaddr > determine_mp_bootpg(NULL)) {
  339. gd->relocaddr = determine_mp_bootpg(NULL);
  340. debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
  341. }
  342. #endif
  343. return 0;
  344. }
  345. #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
  346. static int reserve_logbuffer(void)
  347. {
  348. /* reserve kernel log buffer */
  349. gd->relocaddr -= LOGBUFF_RESERVE;
  350. debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
  351. gd->relocaddr);
  352. return 0;
  353. }
  354. #endif
  355. #ifdef CONFIG_PRAM
  356. /* reserve protected RAM */
  357. static int reserve_pram(void)
  358. {
  359. ulong reg;
  360. reg = getenv_ulong("pram", 10, CONFIG_PRAM);
  361. gd->relocaddr -= (reg << 10); /* size is in kB */
  362. debug("Reserving %ldk for protected RAM at %08lx\n", reg,
  363. gd->relocaddr);
  364. return 0;
  365. }
  366. #endif /* CONFIG_PRAM */
  367. /* Round memory pointer down to next 4 kB limit */
  368. static int reserve_round_4k(void)
  369. {
  370. gd->relocaddr &= ~(4096 - 1);
  371. return 0;
  372. }
  373. #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
  374. defined(CONFIG_ARM)
  375. static int reserve_mmu(void)
  376. {
  377. /* reserve TLB table */
  378. gd->arch.tlb_size = PGTABLE_SIZE;
  379. gd->relocaddr -= gd->arch.tlb_size;
  380. /* round down to next 64 kB limit */
  381. gd->relocaddr &= ~(0x10000 - 1);
  382. gd->arch.tlb_addr = gd->relocaddr;
  383. debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
  384. gd->arch.tlb_addr + gd->arch.tlb_size);
  385. return 0;
  386. }
  387. #endif
  388. #ifdef CONFIG_LCD
  389. static int reserve_lcd(void)
  390. {
  391. #ifdef CONFIG_FB_ADDR
  392. gd->fb_base = CONFIG_FB_ADDR;
  393. #else
  394. /* reserve memory for LCD display (always full pages) */
  395. gd->relocaddr = lcd_setmem(gd->relocaddr);
  396. gd->fb_base = gd->relocaddr;
  397. #endif /* CONFIG_FB_ADDR */
  398. return 0;
  399. }
  400. #endif /* CONFIG_LCD */
  401. static int reserve_trace(void)
  402. {
  403. #ifdef CONFIG_TRACE
  404. gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
  405. gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
  406. debug("Reserving %dk for trace data at: %08lx\n",
  407. CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
  408. #endif
  409. return 0;
  410. }
  411. #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
  412. && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
  413. static int reserve_video(void)
  414. {
  415. /* reserve memory for video display (always full pages) */
  416. gd->relocaddr = video_setmem(gd->relocaddr);
  417. gd->fb_base = gd->relocaddr;
  418. return 0;
  419. }
  420. #endif
  421. static int reserve_uboot(void)
  422. {
  423. /*
  424. * reserve memory for U-Boot code, data & bss
  425. * round down to next 4 kB limit
  426. */
  427. gd->relocaddr -= gd->mon_len;
  428. gd->relocaddr &= ~(4096 - 1);
  429. #ifdef CONFIG_E500
  430. /* round down to next 64 kB limit so that IVPR stays aligned */
  431. gd->relocaddr &= ~(65536 - 1);
  432. #endif
  433. debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
  434. gd->relocaddr);
  435. gd->start_addr_sp = gd->relocaddr;
  436. return 0;
  437. }
  438. #ifndef CONFIG_SPL_BUILD
  439. /* reserve memory for malloc() area */
  440. static int reserve_malloc(void)
  441. {
  442. gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
  443. debug("Reserving %dk for malloc() at: %08lx\n",
  444. TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
  445. return 0;
  446. }
  447. /* (permanently) allocate a Board Info struct */
  448. static int reserve_board(void)
  449. {
  450. gd->start_addr_sp -= sizeof(bd_t);
  451. gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
  452. memset(gd->bd, '\0', sizeof(bd_t));
  453. debug("Reserving %zu Bytes for Board Info at: %08lx\n",
  454. sizeof(bd_t), gd->start_addr_sp);
  455. return 0;
  456. }
  457. #endif
  458. static int setup_machine(void)
  459. {
  460. #ifdef CONFIG_MACH_TYPE
  461. gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
  462. #endif
  463. return 0;
  464. }
  465. static int reserve_global_data(void)
  466. {
  467. gd->start_addr_sp -= sizeof(gd_t);
  468. gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
  469. debug("Reserving %zu Bytes for Global Data at: %08lx\n",
  470. sizeof(gd_t), gd->start_addr_sp);
  471. return 0;
  472. }
  473. static int reserve_fdt(void)
  474. {
  475. /*
  476. * If the device tree is sitting immediate above our image then we
  477. * must relocate it. If it is embedded in the data section, then it
  478. * will be relocated with other data.
  479. */
  480. if (gd->fdt_blob) {
  481. gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
  482. gd->start_addr_sp -= gd->fdt_size;
  483. gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
  484. debug("Reserving %lu Bytes for FDT at: %08lx\n",
  485. gd->fdt_size, gd->start_addr_sp);
  486. }
  487. return 0;
  488. }
  489. static int reserve_stacks(void)
  490. {
  491. #ifdef CONFIG_SPL_BUILD
  492. # ifdef CONFIG_ARM
  493. gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */
  494. gd->irq_sp = gd->start_addr_sp;
  495. # endif
  496. #else
  497. # ifdef CONFIG_PPC
  498. ulong *s;
  499. # endif
  500. /* setup stack pointer for exceptions */
  501. gd->start_addr_sp -= 16;
  502. gd->start_addr_sp &= ~0xf;
  503. gd->irq_sp = gd->start_addr_sp;
  504. /*
  505. * Handle architecture-specific things here
  506. * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
  507. * to handle this and put in arch/xxx/lib/stack.c
  508. */
  509. # if defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
  510. # ifdef CONFIG_USE_IRQ
  511. gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
  512. debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
  513. CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp);
  514. /* 8-byte alignment for ARM ABI compliance */
  515. gd->start_addr_sp &= ~0x07;
  516. # endif
  517. /* leave 3 words for abort-stack, plus 1 for alignment */
  518. gd->start_addr_sp -= 16;
  519. # elif defined(CONFIG_PPC)
  520. /* Clear initial stack frame */
  521. s = (ulong *) gd->start_addr_sp;
  522. *s = 0; /* Terminate back chain */
  523. *++s = 0; /* NULL return address */
  524. # endif /* Architecture specific code */
  525. return 0;
  526. #endif
  527. }
  528. static int display_new_sp(void)
  529. {
  530. debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
  531. return 0;
  532. }
  533. #ifdef CONFIG_PPC
  534. static int setup_board_part1(void)
  535. {
  536. bd_t *bd = gd->bd;
  537. /*
  538. * Save local variables to board info struct
  539. */
  540. bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
  541. bd->bi_memsize = gd->ram_size; /* size in bytes */
  542. #ifdef CONFIG_SYS_SRAM_BASE
  543. bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
  544. bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
  545. #endif
  546. #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
  547. defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
  548. bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
  549. #endif
  550. #if defined(CONFIG_MPC5xxx)
  551. bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
  552. #endif
  553. #if defined(CONFIG_MPC83xx)
  554. bd->bi_immrbar = CONFIG_SYS_IMMR;
  555. #endif
  556. return 0;
  557. }
  558. static int setup_board_part2(void)
  559. {
  560. bd_t *bd = gd->bd;
  561. bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
  562. bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
  563. #if defined(CONFIG_CPM2)
  564. bd->bi_cpmfreq = gd->arch.cpm_clk;
  565. bd->bi_brgfreq = gd->arch.brg_clk;
  566. bd->bi_sccfreq = gd->arch.scc_clk;
  567. bd->bi_vco = gd->arch.vco_out;
  568. #endif /* CONFIG_CPM2 */
  569. #if defined(CONFIG_MPC512X)
  570. bd->bi_ipsfreq = gd->arch.ips_clk;
  571. #endif /* CONFIG_MPC512X */
  572. #if defined(CONFIG_MPC5xxx)
  573. bd->bi_ipbfreq = gd->arch.ipb_clk;
  574. bd->bi_pcifreq = gd->pci_clk;
  575. #endif /* CONFIG_MPC5xxx */
  576. return 0;
  577. }
  578. #endif
  579. #ifdef CONFIG_SYS_EXTBDINFO
  580. static int setup_board_extra(void)
  581. {
  582. bd_t *bd = gd->bd;
  583. strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
  584. strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
  585. sizeof(bd->bi_r_version));
  586. bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
  587. bd->bi_plb_busfreq = gd->bus_clk;
  588. #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
  589. defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
  590. defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
  591. bd->bi_pci_busfreq = get_PCI_freq();
  592. bd->bi_opbfreq = get_OPB_freq();
  593. #elif defined(CONFIG_XILINX_405)
  594. bd->bi_pci_busfreq = get_PCI_freq();
  595. #endif
  596. return 0;
  597. }
  598. #endif
  599. #ifdef CONFIG_POST
  600. static int init_post(void)
  601. {
  602. post_bootmode_init();
  603. post_run(NULL, POST_ROM | post_bootmode_get(0));
  604. return 0;
  605. }
  606. #endif
  607. static int setup_dram_config(void)
  608. {
  609. /* Ram is board specific, so move it to board code ... */
  610. dram_init_banksize();
  611. return 0;
  612. }
  613. static int reloc_fdt(void)
  614. {
  615. if (gd->new_fdt) {
  616. memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
  617. gd->fdt_blob = gd->new_fdt;
  618. }
  619. return 0;
  620. }
  621. static int setup_reloc(void)
  622. {
  623. gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
  624. memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
  625. debug("Relocation Offset is: %08lx\n", gd->reloc_off);
  626. debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
  627. gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
  628. gd->start_addr_sp);
  629. return 0;
  630. }
  631. /* ARM calls relocate_code from its crt0.S */
  632. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
  633. static int jump_to_copy(void)
  634. {
  635. /*
  636. * x86 is special, but in a nice way. It uses a trampoline which
  637. * enables the dcache if possible.
  638. *
  639. * For now, other archs use relocate_code(), which is implemented
  640. * similarly for all archs. When we do generic relocation, hopefully
  641. * we can make all archs enable the dcache prior to relocation.
  642. */
  643. #ifdef CONFIG_X86
  644. /*
  645. * SDRAM and console are now initialised. The final stack can now
  646. * be setup in SDRAM. Code execution will continue in Flash, but
  647. * with the stack in SDRAM and Global Data in temporary memory
  648. * (CPU cache)
  649. */
  650. board_init_f_r_trampoline(gd->start_addr_sp);
  651. #else
  652. relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
  653. #endif
  654. return 0;
  655. }
  656. #endif
  657. /* Record the board_init_f() bootstage (after arch_cpu_init()) */
  658. static int mark_bootstage(void)
  659. {
  660. bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
  661. return 0;
  662. }
  663. static int initf_malloc(void)
  664. {
  665. #ifdef CONFIG_SYS_MALLOC_F_LEN
  666. assert(gd->malloc_base); /* Set up by crt0.S */
  667. gd->malloc_limit = gd->malloc_base + CONFIG_SYS_MALLOC_F_LEN;
  668. gd->malloc_ptr = 0;
  669. #endif
  670. return 0;
  671. }
  672. static init_fnc_t init_sequence_f[] = {
  673. #ifdef CONFIG_SANDBOX
  674. setup_ram_buf,
  675. #endif
  676. setup_mon_len,
  677. setup_fdt,
  678. trace_early_init,
  679. #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
  680. /* TODO: can this go into arch_cpu_init()? */
  681. probecpu,
  682. #endif
  683. arch_cpu_init, /* basic arch cpu dependent setup */
  684. #ifdef CONFIG_X86
  685. cpu_init_f, /* TODO(sjg@chromium.org): remove */
  686. # ifdef CONFIG_OF_CONTROL
  687. find_fdt, /* TODO(sjg@chromium.org): remove */
  688. # endif
  689. #endif
  690. mark_bootstage,
  691. #ifdef CONFIG_OF_CONTROL
  692. fdtdec_check_fdt,
  693. #endif
  694. #if defined(CONFIG_BOARD_EARLY_INIT_F)
  695. board_early_init_f,
  696. #endif
  697. /* TODO: can any of this go into arch_cpu_init()? */
  698. #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
  699. get_clocks, /* get CPU and bus clocks (etc.) */
  700. #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
  701. && !defined(CONFIG_TQM885D)
  702. adjust_sdram_tbs_8xx,
  703. #endif
  704. /* TODO: can we rename this to timer_init()? */
  705. init_timebase,
  706. #endif
  707. #if defined(CONFIG_ARM) || defined(CONFIG_MIPS)
  708. timer_init, /* initialize timer */
  709. #endif
  710. #ifdef CONFIG_SYS_ALLOC_DPRAM
  711. #if !defined(CONFIG_CPM2)
  712. dpram_init,
  713. #endif
  714. #endif
  715. #if defined(CONFIG_BOARD_POSTCLK_INIT)
  716. board_postclk_init,
  717. #endif
  718. #ifdef CONFIG_FSL_ESDHC
  719. get_clocks,
  720. #endif
  721. env_init, /* initialize environment */
  722. #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
  723. /* get CPU and bus clocks according to the environment variable */
  724. get_clocks_866,
  725. /* adjust sdram refresh rate according to the new clock */
  726. sdram_adjust_866,
  727. init_timebase,
  728. #endif
  729. initf_malloc,
  730. init_baud_rate, /* initialze baudrate settings */
  731. serial_init, /* serial communications setup */
  732. console_init_f, /* stage 1 init of console */
  733. #ifdef CONFIG_SANDBOX
  734. sandbox_early_getopt_check,
  735. #endif
  736. #ifdef CONFIG_OF_CONTROL
  737. fdtdec_prepare_fdt,
  738. #endif
  739. display_options, /* say that we are here */
  740. display_text_info, /* show debugging info if required */
  741. #if defined(CONFIG_MPC8260)
  742. prt_8260_rsr,
  743. prt_8260_clks,
  744. #endif /* CONFIG_MPC8260 */
  745. #if defined(CONFIG_MPC83xx)
  746. prt_83xx_rsr,
  747. #endif
  748. #ifdef CONFIG_PPC
  749. checkcpu,
  750. #endif
  751. print_cpuinfo, /* display cpu info (and speed) */
  752. #if defined(CONFIG_MPC5xxx)
  753. prt_mpc5xxx_clks,
  754. #endif /* CONFIG_MPC5xxx */
  755. #if defined(CONFIG_DISPLAY_BOARDINFO)
  756. checkboard, /* display board info */
  757. #endif
  758. INIT_FUNC_WATCHDOG_INIT
  759. #if defined(CONFIG_MISC_INIT_F)
  760. misc_init_f,
  761. #endif
  762. INIT_FUNC_WATCHDOG_RESET
  763. #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
  764. init_func_i2c,
  765. #endif
  766. #if defined(CONFIG_HARD_SPI)
  767. init_func_spi,
  768. #endif
  769. #ifdef CONFIG_X86
  770. dram_init_f, /* configure available RAM banks */
  771. calculate_relocation_address,
  772. #endif
  773. announce_dram_init,
  774. /* TODO: unify all these dram functions? */
  775. #ifdef CONFIG_ARM
  776. dram_init, /* configure available RAM banks */
  777. #endif
  778. #if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
  779. init_func_ram,
  780. #endif
  781. #ifdef CONFIG_POST
  782. post_init_f,
  783. #endif
  784. INIT_FUNC_WATCHDOG_RESET
  785. #if defined(CONFIG_SYS_DRAM_TEST)
  786. testdram,
  787. #endif /* CONFIG_SYS_DRAM_TEST */
  788. INIT_FUNC_WATCHDOG_RESET
  789. #ifdef CONFIG_POST
  790. init_post,
  791. #endif
  792. INIT_FUNC_WATCHDOG_RESET
  793. /*
  794. * Now that we have DRAM mapped and working, we can
  795. * relocate the code and continue running from DRAM.
  796. *
  797. * Reserve memory at end of RAM for (top down in that order):
  798. * - area that won't get touched by U-Boot and Linux (optional)
  799. * - kernel log buffer
  800. * - protected RAM
  801. * - LCD framebuffer
  802. * - monitor code
  803. * - board info struct
  804. */
  805. setup_dest_addr,
  806. #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
  807. reserve_logbuffer,
  808. #endif
  809. #ifdef CONFIG_PRAM
  810. reserve_pram,
  811. #endif
  812. reserve_round_4k,
  813. #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
  814. defined(CONFIG_ARM)
  815. reserve_mmu,
  816. #endif
  817. #ifdef CONFIG_LCD
  818. reserve_lcd,
  819. #endif
  820. reserve_trace,
  821. /* TODO: Why the dependency on CONFIG_8xx? */
  822. #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
  823. && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
  824. reserve_video,
  825. #endif
  826. reserve_uboot,
  827. #ifndef CONFIG_SPL_BUILD
  828. reserve_malloc,
  829. reserve_board,
  830. #endif
  831. setup_machine,
  832. reserve_global_data,
  833. reserve_fdt,
  834. reserve_stacks,
  835. setup_dram_config,
  836. show_dram_config,
  837. #ifdef CONFIG_PPC
  838. setup_board_part1,
  839. INIT_FUNC_WATCHDOG_RESET
  840. setup_board_part2,
  841. #endif
  842. display_new_sp,
  843. #ifdef CONFIG_SYS_EXTBDINFO
  844. setup_board_extra,
  845. #endif
  846. INIT_FUNC_WATCHDOG_RESET
  847. reloc_fdt,
  848. setup_reloc,
  849. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
  850. jump_to_copy,
  851. #endif
  852. NULL,
  853. };
  854. void board_init_f(ulong boot_flags)
  855. {
  856. #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
  857. /*
  858. * For some archtectures, global data is initialized and used before
  859. * calling this function. The data should be preserved. For others,
  860. * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
  861. * here to host global data until relocation.
  862. */
  863. gd_t data;
  864. gd = &data;
  865. /*
  866. * Clear global data before it is accessed at debug print
  867. * in initcall_run_list. Otherwise the debug print probably
  868. * get the wrong vaule of gd->have_console.
  869. */
  870. zero_global_data();
  871. #endif
  872. gd->flags = boot_flags;
  873. gd->have_console = 0;
  874. if (initcall_run_list(init_sequence_f))
  875. hang();
  876. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
  877. /* NOTREACHED - jump_to_copy() does not return */
  878. hang();
  879. #endif
  880. }
  881. #ifdef CONFIG_X86
  882. /*
  883. * For now this code is only used on x86.
  884. *
  885. * init_sequence_f_r is the list of init functions which are run when
  886. * U-Boot is executing from Flash with a semi-limited 'C' environment.
  887. * The following limitations must be considered when implementing an
  888. * '_f_r' function:
  889. * - 'static' variables are read-only
  890. * - Global Data (gd->xxx) is read/write
  891. *
  892. * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
  893. * supported). It _should_, if possible, copy global data to RAM and
  894. * initialise the CPU caches (to speed up the relocation process)
  895. *
  896. * NOTE: At present only x86 uses this route, but it is intended that
  897. * all archs will move to this when generic relocation is implemented.
  898. */
  899. static init_fnc_t init_sequence_f_r[] = {
  900. init_cache_f_r,
  901. copy_uboot_to_ram,
  902. clear_bss,
  903. do_elf_reloc_fixups,
  904. NULL,
  905. };
  906. void board_init_f_r(void)
  907. {
  908. if (initcall_run_list(init_sequence_f_r))
  909. hang();
  910. /*
  911. * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
  912. * Transfer execution from Flash to RAM by calculating the address
  913. * of the in-RAM copy of board_init_r() and calling it
  914. */
  915. (board_init_r + gd->reloc_off)(gd, gd->relocaddr);
  916. /* NOTREACHED - board_init_r() does not return */
  917. hang();
  918. }
  919. #endif /* CONFIG_X86 */