cmd_eeprom.c 11 KB

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  1. /*
  2. * (C) Copyright 2000, 2001
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. */
  24. /*
  25. * Support for read and write access to EEPROM like memory devices. This
  26. * includes regular EEPROM as well as FRAM (ferroelectic nonvolaile RAM).
  27. * FRAM devices read and write data at bus speed. In particular, there is no
  28. * write delay. Also, there is no limit imposed on the numer of bytes that can
  29. * be transferred with a single read or write.
  30. *
  31. * Use the following configuration options to ensure no unneeded performance
  32. * degradation (typical for EEPROM) is incured for FRAM memory:
  33. *
  34. * #define CFG_I2C_FRAM
  35. * #undef CFG_EEPROM_PAGE_WRITE_DELAY_MS
  36. *
  37. */
  38. #include <common.h>
  39. #include <config.h>
  40. #include <command.h>
  41. #include <i2c.h>
  42. #if (CONFIG_COMMANDS & CFG_CMD_EEPROM) || defined(CFG_ENV_IS_IN_EEPROM)
  43. extern void eeprom_init (void);
  44. extern int eeprom_read (unsigned dev_addr, unsigned offset,
  45. uchar *buffer, unsigned cnt);
  46. extern int eeprom_write (unsigned dev_addr, unsigned offset,
  47. uchar *buffer, unsigned cnt);
  48. #endif
  49. #if defined(CFG_EEPROM_X40430)
  50. /* Maximum number of times to poll for acknowledge after write */
  51. #define MAX_ACKNOWLEDGE_POLLS 10
  52. #endif
  53. /* ------------------------------------------------------------------------- */
  54. #if (CONFIG_COMMANDS & CFG_CMD_EEPROM)
  55. int do_eeprom ( cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
  56. {
  57. const char *const fmt =
  58. "\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... ";
  59. #if defined(CFG_I2C_MULTI_EEPROMS)
  60. if (argc == 6) {
  61. ulong dev_addr = simple_strtoul (argv[2], NULL, 16);
  62. ulong addr = simple_strtoul (argv[3], NULL, 16);
  63. ulong off = simple_strtoul (argv[4], NULL, 16);
  64. ulong cnt = simple_strtoul (argv[5], NULL, 16);
  65. #else
  66. if (argc == 5) {
  67. ulong dev_addr = CFG_DEF_EEPROM_ADDR;
  68. ulong addr = simple_strtoul (argv[2], NULL, 16);
  69. ulong off = simple_strtoul (argv[3], NULL, 16);
  70. ulong cnt = simple_strtoul (argv[4], NULL, 16);
  71. #endif /* CFG_I2C_MULTI_EEPROMS */
  72. # ifndef CONFIG_SPI
  73. eeprom_init ();
  74. # endif /* !CONFIG_SPI */
  75. if (strcmp (argv[1], "read") == 0) {
  76. int rcode;
  77. printf (fmt, dev_addr, argv[1], addr, off, cnt);
  78. rcode = eeprom_read (dev_addr, off, (uchar *) addr, cnt);
  79. puts ("done\n");
  80. return rcode;
  81. } else if (strcmp (argv[1], "write") == 0) {
  82. int rcode;
  83. printf (fmt, dev_addr, argv[1], addr, off, cnt);
  84. rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt);
  85. puts ("done\n");
  86. return rcode;
  87. }
  88. }
  89. printf ("Usage:\n%s\n", cmdtp->usage);
  90. return 1;
  91. }
  92. #endif /* CFG_CMD_EEPROM */
  93. /*-----------------------------------------------------------------------
  94. *
  95. * for CFG_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
  96. * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
  97. *
  98. * for CFG_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
  99. * 0x00000nxx for EEPROM address selectors and page number at n.
  100. */
  101. #if (CONFIG_COMMANDS & CFG_CMD_EEPROM) || defined(CFG_ENV_IS_IN_EEPROM)
  102. #ifndef CONFIG_SPI
  103. #if !defined(CFG_I2C_EEPROM_ADDR_LEN) || CFG_I2C_EEPROM_ADDR_LEN < 1 || CFG_I2C_EEPROM_ADDR_LEN > 2
  104. #error CFG_I2C_EEPROM_ADDR_LEN must be 1 or 2
  105. #endif
  106. #endif
  107. int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
  108. {
  109. unsigned end = offset + cnt;
  110. unsigned blk_off;
  111. int rcode = 0;
  112. /* Read data until done or would cross a page boundary.
  113. * We must write the address again when changing pages
  114. * because the next page may be in a different device.
  115. */
  116. while (offset < end) {
  117. unsigned alen, len;
  118. #if !defined(CFG_I2C_FRAM)
  119. unsigned maxlen;
  120. #endif
  121. #if CFG_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
  122. uchar addr[2];
  123. blk_off = offset & 0xFF; /* block offset */
  124. addr[0] = offset >> 8; /* block number */
  125. addr[1] = blk_off; /* block offset */
  126. alen = 2;
  127. #else
  128. uchar addr[3];
  129. blk_off = offset & 0xFF; /* block offset */
  130. addr[0] = offset >> 16; /* block number */
  131. addr[1] = offset >> 8; /* upper address octet */
  132. addr[2] = blk_off; /* lower address octet */
  133. alen = 3;
  134. #endif /* CFG_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
  135. addr[0] |= dev_addr; /* insert device address */
  136. len = end - offset;
  137. /*
  138. * For a FRAM device there is no limit on the number of the
  139. * bytes that can be ccessed with the single read or write
  140. * operation.
  141. */
  142. #if !defined(CFG_I2C_FRAM)
  143. maxlen = 0x100 - blk_off;
  144. if (maxlen > I2C_RXTX_LEN)
  145. maxlen = I2C_RXTX_LEN;
  146. if (len > maxlen)
  147. len = maxlen;
  148. #endif
  149. #ifdef CONFIG_SPI
  150. spi_read (addr, alen, buffer, len);
  151. #else
  152. if (i2c_read (addr[0], offset, alen-1, buffer, len) != 0)
  153. rcode = 1;
  154. #endif
  155. buffer += len;
  156. offset += len;
  157. }
  158. return rcode;
  159. }
  160. /*-----------------------------------------------------------------------
  161. *
  162. * for CFG_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
  163. * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
  164. *
  165. * for CFG_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
  166. * 0x00000nxx for EEPROM address selectors and page number at n.
  167. */
  168. int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
  169. {
  170. unsigned end = offset + cnt;
  171. unsigned blk_off;
  172. int rcode = 0;
  173. #if defined(CFG_EEPROM_X40430)
  174. uchar contr_r_addr[2];
  175. uchar addr_void[2];
  176. uchar contr_reg[2];
  177. uchar ctrl_reg_v;
  178. int i;
  179. #endif
  180. /* Write data until done or would cross a write page boundary.
  181. * We must write the address again when changing pages
  182. * because the address counter only increments within a page.
  183. */
  184. while (offset < end) {
  185. unsigned alen, len;
  186. #if !defined(CFG_I2C_FRAM)
  187. unsigned maxlen;
  188. #endif
  189. #if CFG_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
  190. uchar addr[2];
  191. blk_off = offset & 0xFF; /* block offset */
  192. addr[0] = offset >> 8; /* block number */
  193. addr[1] = blk_off; /* block offset */
  194. alen = 2;
  195. #else
  196. uchar addr[3];
  197. blk_off = offset & 0xFF; /* block offset */
  198. addr[0] = offset >> 16; /* block number */
  199. addr[1] = offset >> 8; /* upper address octet */
  200. addr[2] = blk_off; /* lower address octet */
  201. alen = 3;
  202. #endif /* CFG_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
  203. addr[0] |= dev_addr; /* insert device address */
  204. len = end - offset;
  205. /*
  206. * For a FRAM device there is no limit on the number of the
  207. * bytes that can be ccessed with the single read or write
  208. * operation.
  209. */
  210. #if !defined(CFG_I2C_FRAM)
  211. #if defined(CFG_EEPROM_PAGE_WRITE_BITS)
  212. #define EEPROM_PAGE_SIZE (1 << CFG_EEPROM_PAGE_WRITE_BITS)
  213. #define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1))
  214. maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
  215. #else
  216. maxlen = 0x100 - blk_off;
  217. #endif
  218. if (maxlen > I2C_RXTX_LEN)
  219. maxlen = I2C_RXTX_LEN;
  220. if (len > maxlen)
  221. len = maxlen;
  222. #endif
  223. #ifdef CONFIG_SPI
  224. spi_write (addr, alen, buffer, len);
  225. #else
  226. #if defined(CFG_EEPROM_X40430)
  227. /* Get the value of the control register.
  228. * Set current address (internal pointer in the x40430)
  229. * to 0x1ff.
  230. */
  231. contr_r_addr[0] = 9;
  232. contr_r_addr[1] = 0xff;
  233. addr_void[0] = 0;
  234. addr_void[1] = addr[1];
  235. #ifdef CFG_I2C_EEPROM_ADDR
  236. contr_r_addr[0] |= CFG_I2C_EEPROM_ADDR;
  237. addr_void[0] |= CFG_I2C_EEPROM_ADDR;
  238. #endif
  239. contr_reg[0] = 0xff;
  240. if (i2c_read (contr_r_addr[0], contr_r_addr[1], 1, contr_reg, 1) != 0) {
  241. rcode = 1;
  242. }
  243. ctrl_reg_v = contr_reg[0];
  244. /* Are any of the eeprom blocks write protected?
  245. */
  246. if (ctrl_reg_v & 0x18) {
  247. ctrl_reg_v &= ~0x18; /* reset block protect bits */
  248. ctrl_reg_v |= 0x02; /* set write enable latch */
  249. ctrl_reg_v &= ~0x04; /* clear RWEL */
  250. /* Set write enable latch.
  251. */
  252. contr_reg[0] = 0x02;
  253. if (i2c_write (contr_r_addr[0], 0xff, 1, contr_reg, 1) != 0) {
  254. rcode = 1;
  255. }
  256. /* Set register write enable latch.
  257. */
  258. contr_reg[0] = 0x06;
  259. if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
  260. rcode = 1;
  261. }
  262. /* Modify ctrl register.
  263. */
  264. contr_reg[0] = ctrl_reg_v;
  265. if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
  266. rcode = 1;
  267. }
  268. /* The write (above) is an operation on NV memory.
  269. * These can take some time (~5ms), and the device
  270. * will not respond to further I2C messages till
  271. * it's completed the write.
  272. * So poll device for an I2C acknowledge.
  273. * When we get one we know we can continue with other
  274. * operations.
  275. */
  276. contr_reg[0] = 0;
  277. for (i = 0; i < MAX_ACKNOWLEDGE_POLLS; i++) {
  278. if (i2c_read (addr_void[0], addr_void[1], 1, contr_reg, 1) == 0)
  279. break; /* got ack */
  280. #if defined(CFG_EEPROM_PAGE_WRITE_DELAY_MS)
  281. udelay(CFG_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
  282. #endif
  283. }
  284. if (i == MAX_ACKNOWLEDGE_POLLS) {
  285. puts ("EEPROM poll acknowledge failed\n");
  286. rcode = 1;
  287. }
  288. }
  289. /* Is the write enable latch on?.
  290. */
  291. else if (!(ctrl_reg_v & 0x02)) {
  292. /* Set write enable latch.
  293. */
  294. contr_reg[0] = 0x02;
  295. if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
  296. rcode = 1;
  297. }
  298. }
  299. /* Write is enabled ... now write eeprom value.
  300. */
  301. #endif
  302. if (i2c_write (addr[0], offset, alen-1, buffer, len) != 0)
  303. rcode = 1;
  304. #endif
  305. buffer += len;
  306. offset += len;
  307. #if defined(CFG_EEPROM_PAGE_WRITE_DELAY_MS)
  308. udelay(CFG_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
  309. #endif
  310. }
  311. return rcode;
  312. }
  313. #ifndef CONFIG_SPI
  314. int
  315. eeprom_probe (unsigned dev_addr, unsigned offset)
  316. {
  317. unsigned char chip;
  318. /* Probe the chip address
  319. */
  320. #if CFG_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
  321. chip = offset >> 8; /* block number */
  322. #else
  323. chip = offset >> 16; /* block number */
  324. #endif /* CFG_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
  325. chip |= dev_addr; /* insert device address */
  326. return (i2c_probe (chip));
  327. }
  328. #endif
  329. /*-----------------------------------------------------------------------
  330. * Set default values
  331. */
  332. #ifndef CFG_I2C_SPEED
  333. #define CFG_I2C_SPEED 50000
  334. #endif
  335. #ifndef CFG_I2C_SLAVE
  336. #define CFG_I2C_SLAVE 0xFE
  337. #endif
  338. void eeprom_init (void)
  339. {
  340. #if defined(CONFIG_SPI)
  341. spi_init_f ();
  342. #endif
  343. #if defined(CONFIG_HARD_I2C) || \
  344. defined(CONFIG_SOFT_I2C)
  345. i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
  346. #endif
  347. }
  348. /*-----------------------------------------------------------------------
  349. */
  350. #endif /* CFG_CMD_EEPROM */
  351. /***************************************************/
  352. #if (CONFIG_COMMANDS & CFG_CMD_EEPROM)
  353. #ifdef CFG_I2C_MULTI_EEPROMS
  354. U_BOOT_CMD(
  355. eeprom, 6, 1, do_eeprom,
  356. "eeprom - EEPROM sub-system\n",
  357. "read devaddr addr off cnt\n"
  358. "eeprom write devaddr addr off cnt\n"
  359. " - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'\n"
  360. );
  361. #else /* One EEPROM */
  362. U_BOOT_CMD(
  363. eeprom, 5, 1, do_eeprom,
  364. "eeprom - EEPROM sub-system\n",
  365. "read addr off cnt\n"
  366. "eeprom write addr off cnt\n"
  367. " - read/write `cnt' bytes at EEPROM offset `off'\n"
  368. );
  369. #endif /* CFG_I2C_MULTI_EEPROMS */
  370. #endif /* CFG_CMD_EEPROM */