board.c 3.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
  4. */
  5. #include <common.h>
  6. #include <linux/libfdt.h>
  7. #include <linux/err.h>
  8. #include <asm/arch/gx.h>
  9. #include <asm/arch/sm.h>
  10. #include <asm/armv8/mmu.h>
  11. #include <asm/unaligned.h>
  12. #include <linux/sizes.h>
  13. #include <efi_loader.h>
  14. #include <asm/io.h>
  15. DECLARE_GLOBAL_DATA_PTR;
  16. int dram_init(void)
  17. {
  18. const fdt64_t *val;
  19. int offset;
  20. int len;
  21. offset = fdt_path_offset(gd->fdt_blob, "/memory");
  22. if (offset < 0)
  23. return -EINVAL;
  24. val = fdt_getprop(gd->fdt_blob, offset, "reg", &len);
  25. if (len < sizeof(*val) * 2)
  26. return -EINVAL;
  27. /* Use unaligned access since cache is still disabled */
  28. gd->ram_size = get_unaligned_be64(&val[1]);
  29. return 0;
  30. }
  31. phys_size_t get_effective_memsize(void)
  32. {
  33. /* Size is reported in MiB, convert it in bytes */
  34. return ((readl(GX_AO_SEC_GP_CFG0) & GX_AO_MEM_SIZE_MASK)
  35. >> GX_AO_MEM_SIZE_SHIFT) * SZ_1M;
  36. }
  37. static void meson_board_add_reserved_memory(void *fdt, u64 start, u64 size)
  38. {
  39. int ret;
  40. ret = fdt_add_mem_rsv(fdt, start, size);
  41. if (ret)
  42. printf("Could not reserve zone @ 0x%llx\n", start);
  43. if (IS_ENABLED(CONFIG_EFI_LOADER)) {
  44. efi_add_memory_map(start,
  45. ALIGN(size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT,
  46. EFI_RESERVED_MEMORY_TYPE, false);
  47. }
  48. }
  49. void meson_gx_init_reserved_memory(void *fdt)
  50. {
  51. u64 bl31_size, bl31_start;
  52. u64 bl32_size, bl32_start;
  53. u32 reg;
  54. /*
  55. * Get ARM Trusted Firmware reserved memory zones in :
  56. * - AO_SEC_GP_CFG3: bl32 & bl31 size in KiB, can be 0
  57. * - AO_SEC_GP_CFG5: bl31 physical start address, can be NULL
  58. * - AO_SEC_GP_CFG4: bl32 physical start address, can be NULL
  59. */
  60. reg = readl(GX_AO_SEC_GP_CFG3);
  61. bl31_size = ((reg & GX_AO_BL31_RSVMEM_SIZE_MASK)
  62. >> GX_AO_BL31_RSVMEM_SIZE_SHIFT) * SZ_1K;
  63. bl32_size = (reg & GX_AO_BL32_RSVMEM_SIZE_MASK) * SZ_1K;
  64. bl31_start = readl(GX_AO_SEC_GP_CFG5);
  65. bl32_start = readl(GX_AO_SEC_GP_CFG4);
  66. /*
  67. * Early Meson GX Firmware revisions did not provide the reserved
  68. * memory zones in the registers, keep fixed memory zone handling.
  69. */
  70. if (IS_ENABLED(CONFIG_MESON_GX) &&
  71. !reg && !bl31_start && !bl32_start) {
  72. bl31_start = 0x10000000;
  73. bl31_size = 0x200000;
  74. }
  75. /* Add first 16MiB reserved zone */
  76. meson_board_add_reserved_memory(fdt, 0, GX_FIRMWARE_MEM_SIZE);
  77. /* Add BL31 reserved zone */
  78. if (bl31_start && bl31_size)
  79. meson_board_add_reserved_memory(fdt, bl31_start, bl31_size);
  80. /* Add BL32 reserved zone */
  81. if (bl32_start && bl32_size)
  82. meson_board_add_reserved_memory(fdt, bl32_start, bl32_size);
  83. }
  84. void reset_cpu(ulong addr)
  85. {
  86. psci_system_reset();
  87. }
  88. static struct mm_region gx_mem_map[] = {
  89. {
  90. .virt = 0x0UL,
  91. .phys = 0x0UL,
  92. .size = 0xc0000000UL,
  93. .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  94. PTE_BLOCK_INNER_SHARE
  95. }, {
  96. .virt = 0xc0000000UL,
  97. .phys = 0xc0000000UL,
  98. .size = 0x30000000UL,
  99. .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  100. PTE_BLOCK_NON_SHARE |
  101. PTE_BLOCK_PXN | PTE_BLOCK_UXN
  102. }, {
  103. /* List terminator */
  104. 0,
  105. }
  106. };
  107. struct mm_region *mem_map = gx_mem_map;