sys_proto.h 3.0 KB

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  1. /*
  2. * (C) Copyright 2010
  3. * Texas Instruments, <www.ti.com>
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #ifndef _SYS_PROTO_H_
  8. #define _SYS_PROTO_H_
  9. #include <asm/arch/omap.h>
  10. #include <asm/arch/clock.h>
  11. #include <asm/io.h>
  12. #include <asm/omap_common.h>
  13. #include <asm/arch/mux_omap4.h>
  14. DECLARE_GLOBAL_DATA_PTR;
  15. extern const struct emif_regs emif_regs_elpida_200_mhz_2cs;
  16. extern const struct emif_regs emif_regs_elpida_380_mhz_1cs;
  17. extern const struct emif_regs emif_regs_elpida_400_mhz_1cs;
  18. extern const struct emif_regs emif_regs_elpida_400_mhz_2cs;
  19. struct omap_sysinfo {
  20. char *board_string;
  21. };
  22. extern const struct omap_sysinfo sysinfo;
  23. void gpmc_init(void);
  24. void watchdog_init(void);
  25. u32 get_device_type(void);
  26. void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
  27. void set_muxconf_regs_essential(void);
  28. void set_muxconf_regs_non_essential(void);
  29. void sr32(void *, u32, u32, u32);
  30. u32 wait_on_value(u32, u32, void *, u32);
  31. void sdelay(unsigned long);
  32. void set_pl310_ctrl_reg(u32 val);
  33. void setup_clocks_for_console(void);
  34. void prcm_init(void);
  35. void bypass_dpll(u32 const base);
  36. void freq_update_core(void);
  37. u32 get_sys_clk_freq(void);
  38. u32 omap4_ddr_clk(void);
  39. void cancel_out(u32 *num, u32 *den, u32 den_limit);
  40. void sdram_init(void);
  41. u32 omap_sdram_size(void);
  42. u32 cortex_rev(void);
  43. void save_omap_boot_params(void);
  44. void init_omap_revision(void);
  45. void do_io_settings(void);
  46. void sri2c_init(void);
  47. void gpi2c_init(void);
  48. int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
  49. u32 warm_reset(void);
  50. void force_emif_self_refresh(void);
  51. void setup_warmreset_time(void);
  52. static inline u32 running_from_sdram(void)
  53. {
  54. u32 pc;
  55. asm volatile ("mov %0, pc" : "=r" (pc));
  56. return ((pc >= OMAP44XX_DRAM_ADDR_SPACE_START) &&
  57. (pc < OMAP44XX_DRAM_ADDR_SPACE_END));
  58. }
  59. static inline u8 uboot_loaded_by_spl(void)
  60. {
  61. /*
  62. * u-boot can be running from sdram either because of configuration
  63. * Header or by SPL. If because of CH, then the romcode sets the
  64. * CHSETTINGS executed bit to true in the boot parameter structure that
  65. * it passes to the bootloader.This parameter is stored in the ch_flags
  66. * variable by both SPL and u-boot.Check out for CHSETTINGS, which is a
  67. * mandatory section if CH is present.
  68. */
  69. if ((gd->arch.omap_boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS))
  70. return 0;
  71. else
  72. return running_from_sdram();
  73. }
  74. /*
  75. * The basic hardware init of OMAP(s_init()) can happen in 4
  76. * different contexts:
  77. * 1. SPL running from SRAM
  78. * 2. U-Boot running from FLASH
  79. * 3. Non-XIP U-Boot loaded to SDRAM by SPL
  80. * 4. Non-XIP U-Boot loaded to SDRAM by ROM code using the
  81. * Configuration Header feature
  82. *
  83. * This function finds this context.
  84. * Defining as inline may help in compiling out unused functions in SPL
  85. */
  86. static inline u32 omap_hw_init_context(void)
  87. {
  88. #ifdef CONFIG_SPL_BUILD
  89. return OMAP_INIT_CONTEXT_SPL;
  90. #else
  91. if (uboot_loaded_by_spl())
  92. return OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL;
  93. else if (running_from_sdram())
  94. return OMAP_INIT_CONTEXT_UBOOT_AFTER_CH;
  95. else
  96. return OMAP_INIT_CONTEXT_UBOOT_FROM_NOR;
  97. #endif
  98. }
  99. #endif