dw_mmc.c 8.7 KB

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  1. /*
  2. * (C) Copyright 2012 SAMSUNG Electronics
  3. * Jaehoon Chung <jh80.chung@samsung.com>
  4. * Rajeshawari Shinde <rajeshwari.s@samsung.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation; either version 2 of
  9. * the License, or (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. #include <common.h>
  22. #include <malloc.h>
  23. #include <mmc.h>
  24. #include <dwmmc.h>
  25. #include <asm/arch/clk.h>
  26. #include <asm-generic/errno.h>
  27. #define PAGE_SIZE 4096
  28. static int dwmci_wait_reset(struct dwmci_host *host, u32 value)
  29. {
  30. unsigned long timeout = 1000;
  31. u32 ctrl;
  32. dwmci_writel(host, DWMCI_CTRL, value);
  33. while (timeout--) {
  34. ctrl = dwmci_readl(host, DWMCI_CTRL);
  35. if (!(ctrl & DWMCI_RESET_ALL))
  36. return 1;
  37. }
  38. return 0;
  39. }
  40. static void dwmci_set_idma_desc(struct dwmci_idmac *idmac,
  41. u32 desc0, u32 desc1, u32 desc2)
  42. {
  43. struct dwmci_idmac *desc = idmac;
  44. desc->flags = desc0;
  45. desc->cnt = desc1;
  46. desc->addr = desc2;
  47. desc->next_addr = (unsigned int)desc + sizeof(struct dwmci_idmac);
  48. }
  49. static void dwmci_prepare_data(struct dwmci_host *host,
  50. struct mmc_data *data)
  51. {
  52. unsigned long ctrl;
  53. unsigned int i = 0, flags, cnt, blk_cnt;
  54. ulong data_start, data_end, start_addr;
  55. ALLOC_CACHE_ALIGN_BUFFER(struct dwmci_idmac, cur_idmac, data->blocks);
  56. blk_cnt = data->blocks;
  57. dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET);
  58. data_start = (ulong)cur_idmac;
  59. dwmci_writel(host, DWMCI_DBADDR, (unsigned int)cur_idmac);
  60. if (data->flags == MMC_DATA_READ)
  61. start_addr = (unsigned int)data->dest;
  62. else
  63. start_addr = (unsigned int)data->src;
  64. do {
  65. flags = DWMCI_IDMAC_OWN | DWMCI_IDMAC_CH ;
  66. flags |= (i == 0) ? DWMCI_IDMAC_FS : 0;
  67. if (blk_cnt <= 8) {
  68. flags |= DWMCI_IDMAC_LD;
  69. cnt = data->blocksize * blk_cnt;
  70. } else
  71. cnt = data->blocksize * 8;
  72. dwmci_set_idma_desc(cur_idmac, flags, cnt,
  73. start_addr + (i * PAGE_SIZE));
  74. if(blk_cnt < 8)
  75. break;
  76. blk_cnt -= 8;
  77. cur_idmac++;
  78. i++;
  79. } while(1);
  80. data_end = (ulong)cur_idmac;
  81. flush_dcache_range(data_start, data_end + ARCH_DMA_MINALIGN);
  82. ctrl = dwmci_readl(host, DWMCI_CTRL);
  83. ctrl |= DWMCI_IDMAC_EN | DWMCI_DMA_EN;
  84. dwmci_writel(host, DWMCI_CTRL, ctrl);
  85. ctrl = dwmci_readl(host, DWMCI_BMOD);
  86. ctrl |= DWMCI_BMOD_IDMAC_FB | DWMCI_BMOD_IDMAC_EN;
  87. dwmci_writel(host, DWMCI_BMOD, ctrl);
  88. dwmci_writel(host, DWMCI_BLKSIZ, data->blocksize);
  89. dwmci_writel(host, DWMCI_BYTCNT, data->blocksize * data->blocks);
  90. }
  91. static int dwmci_set_transfer_mode(struct dwmci_host *host,
  92. struct mmc_data *data)
  93. {
  94. unsigned long mode;
  95. mode = DWMCI_CMD_DATA_EXP;
  96. if (data->flags & MMC_DATA_WRITE)
  97. mode |= DWMCI_CMD_RW;
  98. return mode;
  99. }
  100. static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
  101. struct mmc_data *data)
  102. {
  103. struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
  104. int flags = 0, i;
  105. unsigned int timeout = 100000;
  106. u32 retry = 10000;
  107. u32 mask, ctrl;
  108. while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) {
  109. if (timeout == 0) {
  110. printf("Timeout on data busy\n");
  111. return TIMEOUT;
  112. }
  113. timeout--;
  114. }
  115. dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL);
  116. if (data)
  117. dwmci_prepare_data(host, data);
  118. dwmci_writel(host, DWMCI_CMDARG, cmd->cmdarg);
  119. if (data)
  120. flags = dwmci_set_transfer_mode(host, data);
  121. if ((cmd->resp_type & MMC_RSP_136) && (cmd->resp_type & MMC_RSP_BUSY))
  122. return -1;
  123. if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION)
  124. flags |= DWMCI_CMD_ABORT_STOP;
  125. else
  126. flags |= DWMCI_CMD_PRV_DAT_WAIT;
  127. if (cmd->resp_type & MMC_RSP_PRESENT) {
  128. flags |= DWMCI_CMD_RESP_EXP;
  129. if (cmd->resp_type & MMC_RSP_136)
  130. flags |= DWMCI_CMD_RESP_LENGTH;
  131. }
  132. if (cmd->resp_type & MMC_RSP_CRC)
  133. flags |= DWMCI_CMD_CHECK_CRC;
  134. flags |= (cmd->cmdidx | DWMCI_CMD_START | DWMCI_CMD_USE_HOLD_REG);
  135. debug("Sending CMD%d\n",cmd->cmdidx);
  136. dwmci_writel(host, DWMCI_CMD, flags);
  137. for (i = 0; i < retry; i++) {
  138. mask = dwmci_readl(host, DWMCI_RINTSTS);
  139. if (mask & DWMCI_INTMSK_CDONE) {
  140. if (!data)
  141. dwmci_writel(host, DWMCI_RINTSTS, mask);
  142. break;
  143. }
  144. }
  145. if (i == retry)
  146. return TIMEOUT;
  147. if (mask & DWMCI_INTMSK_RTO) {
  148. debug("Response Timeout..\n");
  149. return TIMEOUT;
  150. } else if (mask & DWMCI_INTMSK_RE) {
  151. debug("Response Error..\n");
  152. return -1;
  153. }
  154. if (cmd->resp_type & MMC_RSP_PRESENT) {
  155. if (cmd->resp_type & MMC_RSP_136) {
  156. cmd->response[0] = dwmci_readl(host, DWMCI_RESP3);
  157. cmd->response[1] = dwmci_readl(host, DWMCI_RESP2);
  158. cmd->response[2] = dwmci_readl(host, DWMCI_RESP1);
  159. cmd->response[3] = dwmci_readl(host, DWMCI_RESP0);
  160. } else {
  161. cmd->response[0] = dwmci_readl(host, DWMCI_RESP0);
  162. }
  163. }
  164. if (data) {
  165. do {
  166. mask = dwmci_readl(host, DWMCI_RINTSTS);
  167. if (mask & (DWMCI_DATA_ERR | DWMCI_DATA_TOUT)) {
  168. debug("DATA ERROR!\n");
  169. return -1;
  170. }
  171. } while (!(mask & DWMCI_INTMSK_DTO));
  172. dwmci_writel(host, DWMCI_RINTSTS, mask);
  173. ctrl = dwmci_readl(host, DWMCI_CTRL);
  174. ctrl &= ~(DWMCI_DMA_EN);
  175. dwmci_writel(host, DWMCI_CTRL, ctrl);
  176. }
  177. udelay(100);
  178. return 0;
  179. }
  180. static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
  181. {
  182. u32 div, status;
  183. int timeout = 10000;
  184. unsigned long sclk;
  185. if (freq == host->clock)
  186. return 0;
  187. /*
  188. * If host->mmc_clk didn't define,
  189. * then assume that host->bus_hz is source clock value.
  190. * host->bus_hz should be set from user.
  191. */
  192. if (host->mmc_clk)
  193. sclk = host->mmc_clk(host->dev_index);
  194. else if (host->bus_hz)
  195. sclk = host->bus_hz;
  196. else {
  197. printf("Didn't get source clock value..\n");
  198. return -EINVAL;
  199. }
  200. div = DIV_ROUND_UP(sclk, 2 * freq);
  201. dwmci_writel(host, DWMCI_CLKENA, 0);
  202. dwmci_writel(host, DWMCI_CLKSRC, 0);
  203. dwmci_writel(host, DWMCI_CLKDIV, div);
  204. dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT |
  205. DWMCI_CMD_UPD_CLK | DWMCI_CMD_START);
  206. do {
  207. status = dwmci_readl(host, DWMCI_CMD);
  208. if (timeout-- < 0) {
  209. printf("TIMEOUT error!!\n");
  210. return -ETIMEDOUT;
  211. }
  212. } while (status & DWMCI_CMD_START);
  213. dwmci_writel(host, DWMCI_CLKENA, DWMCI_CLKEN_ENABLE |
  214. DWMCI_CLKEN_LOW_PWR);
  215. dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT |
  216. DWMCI_CMD_UPD_CLK | DWMCI_CMD_START);
  217. timeout = 10000;
  218. do {
  219. status = dwmci_readl(host, DWMCI_CMD);
  220. if (timeout-- < 0) {
  221. printf("TIMEOUT error!!\n");
  222. return -ETIMEDOUT;
  223. }
  224. } while (status & DWMCI_CMD_START);
  225. host->clock = freq;
  226. return 0;
  227. }
  228. static void dwmci_set_ios(struct mmc *mmc)
  229. {
  230. struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
  231. u32 ctype;
  232. debug("Buswidth = %d, clock: %d\n",mmc->bus_width, mmc->clock);
  233. dwmci_setup_bus(host, mmc->clock);
  234. switch (mmc->bus_width) {
  235. case 8:
  236. ctype = DWMCI_CTYPE_8BIT;
  237. break;
  238. case 4:
  239. ctype = DWMCI_CTYPE_4BIT;
  240. break;
  241. default:
  242. ctype = DWMCI_CTYPE_1BIT;
  243. break;
  244. }
  245. dwmci_writel(host, DWMCI_CTYPE, ctype);
  246. if (host->clksel)
  247. host->clksel(host);
  248. }
  249. static int dwmci_init(struct mmc *mmc)
  250. {
  251. struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
  252. u32 fifo_size, fifoth_val;
  253. dwmci_writel(host, DWMCI_PWREN, 1);
  254. if (!dwmci_wait_reset(host, DWMCI_RESET_ALL)) {
  255. debug("%s[%d] Fail-reset!!\n",__func__,__LINE__);
  256. return -1;
  257. }
  258. dwmci_writel(host, DWMCI_RINTSTS, 0xFFFFFFFF);
  259. dwmci_writel(host, DWMCI_INTMASK, 0);
  260. dwmci_writel(host, DWMCI_TMOUT, 0xFFFFFFFF);
  261. dwmci_writel(host, DWMCI_IDINTEN, 0);
  262. dwmci_writel(host, DWMCI_BMOD, 1);
  263. fifo_size = dwmci_readl(host, DWMCI_FIFOTH);
  264. if (host->fifoth_val)
  265. fifoth_val = host->fifoth_val;
  266. else
  267. fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 -1) |
  268. TX_WMARK(fifo_size/2);
  269. dwmci_writel(host, DWMCI_FIFOTH, fifoth_val);
  270. dwmci_writel(host, DWMCI_CLKENA, 0);
  271. dwmci_writel(host, DWMCI_CLKSRC, 0);
  272. return 0;
  273. }
  274. int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk)
  275. {
  276. struct mmc *mmc;
  277. int err = 0;
  278. mmc = malloc(sizeof(struct mmc));
  279. if (!mmc) {
  280. printf("mmc malloc fail!\n");
  281. return -1;
  282. }
  283. mmc->priv = host;
  284. host->mmc = mmc;
  285. sprintf(mmc->name, "%s", host->name);
  286. mmc->send_cmd = dwmci_send_cmd;
  287. mmc->set_ios = dwmci_set_ios;
  288. mmc->init = dwmci_init;
  289. mmc->f_min = min_clk;
  290. mmc->f_max = max_clk;
  291. mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
  292. mmc->host_caps = host->caps;
  293. if (host->buswidth == 8) {
  294. mmc->host_caps |= MMC_MODE_8BIT;
  295. mmc->host_caps &= ~MMC_MODE_4BIT;
  296. } else {
  297. mmc->host_caps |= MMC_MODE_4BIT;
  298. mmc->host_caps &= ~MMC_MODE_8BIT;
  299. }
  300. mmc->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_HC;
  301. err = mmc_register(mmc);
  302. return err;
  303. }