flash.c 20 KB

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  1. /*
  2. * (C) Copyright 2000
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include <common.h>
  8. #include <mpc8xx.h>
  9. /* environment.h defines the various CONFIG_ENV_... values in terms
  10. * of whichever ones are given in the configuration file.
  11. */
  12. #include <environment.h>
  13. flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
  14. /* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
  15. * has nothing to do with the flash chip being 8-bit or 16-bit.
  16. */
  17. #ifdef CONFIG_FLASH_16BIT
  18. typedef unsigned short FLASH_PORT_WIDTH;
  19. typedef volatile unsigned short FLASH_PORT_WIDTHV;
  20. #define FLASH_ID_MASK 0xFFFF
  21. #else
  22. typedef unsigned long FLASH_PORT_WIDTH;
  23. typedef volatile unsigned long FLASH_PORT_WIDTHV;
  24. #define FLASH_ID_MASK 0xFFFFFFFF
  25. #endif
  26. #define FPW FLASH_PORT_WIDTH
  27. #define FPWV FLASH_PORT_WIDTHV
  28. #define ORMASK(size) ((-size) & OR_AM_MSK)
  29. /*-----------------------------------------------------------------------
  30. * Functions
  31. */
  32. static ulong flash_get_size(FPWV *addr, flash_info_t *info);
  33. static void flash_reset(flash_info_t *info);
  34. static int write_word_intel(flash_info_t *info, FPWV *dest, FPW data);
  35. static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
  36. static void flash_get_offsets(ulong base, flash_info_t *info);
  37. #ifdef CONFIG_SYS_FLASH_PROTECTION
  38. static void flash_sync_real_protect(flash_info_t *info);
  39. #endif
  40. /*-----------------------------------------------------------------------
  41. * flash_init()
  42. *
  43. * sets up flash_info and returns size of FLASH (bytes)
  44. */
  45. unsigned long flash_init (void)
  46. {
  47. volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
  48. volatile memctl8xx_t *memctl = &immap->im_memctl;
  49. unsigned long size_b;
  50. int i;
  51. /* Init: no FLASHes known */
  52. for (i=0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
  53. flash_info[i].flash_id = FLASH_UNKNOWN;
  54. }
  55. size_b = flash_get_size((FPW *)CONFIG_SYS_FLASH_BASE, &flash_info[0]);
  56. flash_info[0].size = size_b;
  57. if (flash_info[0].flash_id == FLASH_UNKNOWN) {
  58. printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx\n",size_b);
  59. }
  60. /* Remap FLASH according to real size, so only at proper address */
  61. memctl->memc_or0 = (memctl->memc_or0 & ~OR_AM_MSK) | ORMASK(size_b);
  62. /* Do this again (was done already in flast_get_size), just
  63. * in case we move it when remap the FLASH.
  64. */
  65. flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
  66. #ifdef CONFIG_SYS_FLASH_PROTECTION
  67. /* read the hardware protection status (if any) into the
  68. * protection array in flash_info.
  69. */
  70. flash_sync_real_protect(&flash_info[0]);
  71. #endif
  72. #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
  73. /* monitor protection ON by default */
  74. flash_protect(FLAG_PROTECT_SET,
  75. CONFIG_SYS_MONITOR_BASE,
  76. CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
  77. &flash_info[0]);
  78. #endif
  79. #ifdef CONFIG_ENV_ADDR
  80. flash_protect ( FLAG_PROTECT_SET,
  81. CONFIG_ENV_ADDR,
  82. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, &flash_info[0]);
  83. #endif
  84. #ifdef CONFIG_ENV_ADDR_REDUND
  85. flash_protect ( FLAG_PROTECT_SET,
  86. CONFIG_ENV_ADDR_REDUND,
  87. CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
  88. &flash_info[0]);
  89. #endif
  90. return (size_b);
  91. }
  92. /*-----------------------------------------------------------------------
  93. */
  94. static void flash_reset(flash_info_t *info)
  95. {
  96. FPWV *base = (FPWV *)(info->start[0]);
  97. /* Put FLASH back in read mode */
  98. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
  99. *base = (FPW)0x00FF00FF; /* Intel Read Mode */
  100. else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
  101. *base = (FPW)0x00F000F0; /* AMD Read Mode */
  102. }
  103. /*-----------------------------------------------------------------------
  104. */
  105. static void flash_get_offsets (ulong base, flash_info_t *info)
  106. {
  107. int i;
  108. /* set up sector start address table */
  109. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL
  110. && (info->flash_id & FLASH_BTYPE)) {
  111. int bootsect_size; /* number of bytes/boot sector */
  112. int sect_size; /* number of bytes/regular sector */
  113. bootsect_size = 0x00002000 * (sizeof(FPW)/2);
  114. sect_size = 0x00010000 * (sizeof(FPW)/2);
  115. /* set sector offsets for bottom boot block type */
  116. for (i = 0; i < 8; ++i) {
  117. info->start[i] = base + (i * bootsect_size);
  118. }
  119. for (i = 8; i < info->sector_count; i++) {
  120. info->start[i] = base + ((i - 7) * sect_size);
  121. }
  122. }
  123. else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
  124. && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U) {
  125. int sect_size; /* number of bytes/sector */
  126. sect_size = 0x00010000 * (sizeof(FPW)/2);
  127. /* set up sector start address table (uniform sector type) */
  128. for( i = 0; i < info->sector_count; i++ )
  129. info->start[i] = base + (i * sect_size);
  130. }
  131. else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
  132. && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM800T) {
  133. int sect_size; /* number of bytes/sector */
  134. sect_size = 0x00010000 * (sizeof(FPW)/2);
  135. /* set up sector start address table (top boot sector type) */
  136. for (i = 0; i < info->sector_count - 3; i++)
  137. info->start[i] = base + (i * sect_size);
  138. i = info->sector_count - 1;
  139. info->start[i--] = base + (info->size - 0x00004000) * (sizeof(FPW)/2);
  140. info->start[i--] = base + (info->size - 0x00006000) * (sizeof(FPW)/2);
  141. info->start[i--] = base + (info->size - 0x00008000) * (sizeof(FPW)/2);
  142. }
  143. }
  144. /*-----------------------------------------------------------------------
  145. */
  146. void flash_print_info (flash_info_t *info)
  147. {
  148. int i;
  149. uchar *boottype;
  150. uchar *bootletter;
  151. char *fmt;
  152. uchar botbootletter[] = "B";
  153. uchar topbootletter[] = "T";
  154. uchar botboottype[] = "bottom boot sector";
  155. uchar topboottype[] = "top boot sector";
  156. if (info->flash_id == FLASH_UNKNOWN) {
  157. printf ("missing or unknown FLASH type\n");
  158. return;
  159. }
  160. switch (info->flash_id & FLASH_VENDMASK) {
  161. case FLASH_MAN_AMD: printf ("AMD "); break;
  162. case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
  163. case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
  164. case FLASH_MAN_SST: printf ("SST "); break;
  165. case FLASH_MAN_STM: printf ("STM "); break;
  166. case FLASH_MAN_INTEL: printf ("INTEL "); break;
  167. default: printf ("Unknown Vendor "); break;
  168. }
  169. /* check for top or bottom boot, if it applies */
  170. if (info->flash_id & FLASH_BTYPE) {
  171. boottype = botboottype;
  172. bootletter = botbootletter;
  173. }
  174. else {
  175. boottype = topboottype;
  176. bootletter = topbootletter;
  177. }
  178. switch (info->flash_id & FLASH_TYPEMASK) {
  179. case FLASH_AM800T:
  180. fmt = "29LV800B%s (8 Mbit, %s)\n";
  181. break;
  182. case FLASH_AM640U:
  183. fmt = "29LV641D (64 Mbit, uniform sectors)\n";
  184. break;
  185. case FLASH_28F800C3B:
  186. case FLASH_28F800C3T:
  187. fmt = "28F800C3%s (8 Mbit, %s)\n";
  188. break;
  189. case FLASH_INTEL800B:
  190. case FLASH_INTEL800T:
  191. fmt = "28F800B3%s (8 Mbit, %s)\n";
  192. break;
  193. case FLASH_28F160C3B:
  194. case FLASH_28F160C3T:
  195. fmt = "28F160C3%s (16 Mbit, %s)\n";
  196. break;
  197. case FLASH_INTEL160B:
  198. case FLASH_INTEL160T:
  199. fmt = "28F160B3%s (16 Mbit, %s)\n";
  200. break;
  201. case FLASH_28F320C3B:
  202. case FLASH_28F320C3T:
  203. fmt = "28F320C3%s (32 Mbit, %s)\n";
  204. break;
  205. case FLASH_INTEL320B:
  206. case FLASH_INTEL320T:
  207. fmt = "28F320B3%s (32 Mbit, %s)\n";
  208. break;
  209. case FLASH_28F640C3B:
  210. case FLASH_28F640C3T:
  211. fmt = "28F640C3%s (64 Mbit, %s)\n";
  212. break;
  213. case FLASH_INTEL640B:
  214. case FLASH_INTEL640T:
  215. fmt = "28F640B3%s (64 Mbit, %s)\n";
  216. break;
  217. default:
  218. fmt = "Unknown Chip Type\n";
  219. break;
  220. }
  221. printf (fmt, bootletter, boottype);
  222. printf (" Size: %ld MB in %d Sectors\n",
  223. info->size >> 20,
  224. info->sector_count);
  225. printf (" Sector Start Addresses:");
  226. for (i=0; i<info->sector_count; ++i) {
  227. if ((i % 5) == 0) {
  228. printf ("\n ");
  229. }
  230. printf (" %08lX%s", info->start[i],
  231. info->protect[i] ? " (RO)" : " ");
  232. }
  233. printf ("\n");
  234. }
  235. /*-----------------------------------------------------------------------
  236. */
  237. /*
  238. * The following code cannot be run from FLASH!
  239. */
  240. ulong flash_get_size (FPWV *addr, flash_info_t *info)
  241. {
  242. /* Write auto select command: read Manufacturer ID */
  243. /* Write auto select command sequence and test FLASH answer */
  244. addr[0x0555] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
  245. addr[0x02AA] = (FPW)0x00550055; /* for AMD, Intel ignores this */
  246. addr[0x0555] = (FPW)0x00900090; /* selects Intel or AMD */
  247. /* The manufacturer codes are only 1 byte, so just use 1 byte.
  248. * This works for any bus width and any FLASH device width.
  249. */
  250. switch (addr[0] & 0xff) {
  251. case (uchar)AMD_MANUFACT:
  252. info->flash_id = FLASH_MAN_AMD;
  253. break;
  254. case (uchar)INTEL_MANUFACT:
  255. info->flash_id = FLASH_MAN_INTEL;
  256. break;
  257. default:
  258. info->flash_id = FLASH_UNKNOWN;
  259. info->sector_count = 0;
  260. info->size = 0;
  261. break;
  262. }
  263. /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
  264. if (info->flash_id != FLASH_UNKNOWN) switch (addr[1]) {
  265. case (FPW)AMD_ID_LV800T:
  266. info->flash_id += FLASH_AM800T;
  267. info->sector_count = 19;
  268. info->size = 0x00100000 * (sizeof(FPW)/2);
  269. break; /* => 1 or 2 MiB */
  270. case (FPW)AMD_ID_LV640U: /* 29LV640 and 29LV641 have same ID */
  271. info->flash_id += FLASH_AM640U;
  272. info->sector_count = 128;
  273. info->size = 0x00800000 * (sizeof(FPW)/2);
  274. break; /* => 8 or 16 MB */
  275. case (FPW)INTEL_ID_28F800C3B:
  276. info->flash_id += FLASH_28F800C3B;
  277. info->sector_count = 23;
  278. info->size = 0x00100000 * (sizeof(FPW)/2);
  279. break; /* => 1 or 2 MB */
  280. case (FPW)INTEL_ID_28F800B3B:
  281. info->flash_id += FLASH_INTEL800B;
  282. info->sector_count = 23;
  283. info->size = 0x00100000 * (sizeof(FPW)/2);
  284. break; /* => 1 or 2 MB */
  285. case (FPW)INTEL_ID_28F160C3B:
  286. info->flash_id += FLASH_28F160C3B;
  287. info->sector_count = 39;
  288. info->size = 0x00200000 * (sizeof(FPW)/2);
  289. break; /* => 2 or 4 MB */
  290. case (FPW)INTEL_ID_28F160B3B:
  291. info->flash_id += FLASH_INTEL160B;
  292. info->sector_count = 39;
  293. info->size = 0x00200000 * (sizeof(FPW)/2);
  294. break; /* => 2 or 4 MB */
  295. case (FPW)INTEL_ID_28F320C3B:
  296. info->flash_id += FLASH_28F320C3B;
  297. info->sector_count = 71;
  298. info->size = 0x00400000 * (sizeof(FPW)/2);
  299. break; /* => 4 or 8 MB */
  300. case (FPW)INTEL_ID_28F320B3B:
  301. info->flash_id += FLASH_INTEL320B;
  302. info->sector_count = 71;
  303. info->size = 0x00400000 * (sizeof(FPW)/2);
  304. break; /* => 4 or 8 MB */
  305. case (FPW)INTEL_ID_28F640C3B:
  306. info->flash_id += FLASH_28F640C3B;
  307. info->sector_count = 135;
  308. info->size = 0x00800000 * (sizeof(FPW)/2);
  309. break; /* => 8 or 16 MB */
  310. case (FPW)INTEL_ID_28F640B3B:
  311. info->flash_id += FLASH_INTEL640B;
  312. info->sector_count = 135;
  313. info->size = 0x00800000 * (sizeof(FPW)/2);
  314. break; /* => 8 or 16 MB */
  315. default:
  316. info->flash_id = FLASH_UNKNOWN;
  317. info->sector_count = 0;
  318. info->size = 0;
  319. return (0); /* => no or unknown flash */
  320. }
  321. flash_get_offsets((ulong)addr, info);
  322. /* Put FLASH back in read mode */
  323. flash_reset(info);
  324. return (info->size);
  325. }
  326. #ifdef CONFIG_SYS_FLASH_PROTECTION
  327. /*-----------------------------------------------------------------------
  328. */
  329. static void flash_sync_real_protect(flash_info_t *info)
  330. {
  331. FPWV *addr = (FPWV *)(info->start[0]);
  332. FPWV *sect;
  333. int i;
  334. switch (info->flash_id & FLASH_TYPEMASK) {
  335. case FLASH_28F800C3B:
  336. case FLASH_28F800C3T:
  337. case FLASH_28F160C3B:
  338. case FLASH_28F160C3T:
  339. case FLASH_28F320C3B:
  340. case FLASH_28F320C3T:
  341. case FLASH_28F640C3B:
  342. case FLASH_28F640C3T:
  343. /* check for protected sectors */
  344. *addr = (FPW)0x00900090;
  345. for (i = 0; i < info->sector_count; i++) {
  346. /* read sector protection at sector address, (A7 .. A0) = 0x02.
  347. * D0 = 1 for each device if protected.
  348. * If at least one device is protected the sector is marked
  349. * protected, but mixed protected and unprotected devices
  350. * within a sector should never happen.
  351. */
  352. sect = (FPWV *)(info->start[i]);
  353. info->protect[i] = (sect[2] & (FPW)(0x00010001)) ? 1 : 0;
  354. }
  355. /* Put FLASH back in read mode */
  356. flash_reset(info);
  357. break;
  358. case FLASH_AM640U:
  359. case FLASH_AM800T:
  360. default:
  361. /* no hardware protect that we support */
  362. break;
  363. }
  364. }
  365. #endif
  366. /*-----------------------------------------------------------------------
  367. */
  368. int flash_erase (flash_info_t *info, int s_first, int s_last)
  369. {
  370. FPWV *addr;
  371. int flag, prot, sect;
  372. int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
  373. ulong start, now, last;
  374. int rcode = 0;
  375. if ((s_first < 0) || (s_first > s_last)) {
  376. if (info->flash_id == FLASH_UNKNOWN) {
  377. printf ("- missing\n");
  378. } else {
  379. printf ("- no sectors to erase\n");
  380. }
  381. return 1;
  382. }
  383. switch (info->flash_id & FLASH_TYPEMASK) {
  384. case FLASH_INTEL800B:
  385. case FLASH_INTEL160B:
  386. case FLASH_INTEL320B:
  387. case FLASH_INTEL640B:
  388. case FLASH_28F800C3B:
  389. case FLASH_28F160C3B:
  390. case FLASH_28F320C3B:
  391. case FLASH_28F640C3B:
  392. case FLASH_AM640U:
  393. case FLASH_AM800T:
  394. break;
  395. case FLASH_UNKNOWN:
  396. default:
  397. printf ("Can't erase unknown flash type %08lx - aborted\n",
  398. info->flash_id);
  399. return 1;
  400. }
  401. prot = 0;
  402. for (sect=s_first; sect<=s_last; ++sect) {
  403. if (info->protect[sect]) {
  404. prot++;
  405. }
  406. }
  407. if (prot) {
  408. printf ("- Warning: %d protected sectors will not be erased!\n",
  409. prot);
  410. } else {
  411. printf ("\n");
  412. }
  413. start = get_timer(0);
  414. last = start;
  415. /* Start erase on unprotected sectors */
  416. for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
  417. if (info->protect[sect] != 0) /* protected, skip it */
  418. continue;
  419. /* Disable interrupts which might cause a timeout here */
  420. flag = disable_interrupts();
  421. addr = (FPWV *)(info->start[sect]);
  422. if (intel) {
  423. *addr = (FPW)0x00500050; /* clear status register */
  424. *addr = (FPW)0x00200020; /* erase setup */
  425. *addr = (FPW)0x00D000D0; /* erase confirm */
  426. }
  427. else {
  428. /* must be AMD style if not Intel */
  429. FPWV *base; /* first address in bank */
  430. base = (FPWV *)(info->start[0]);
  431. base[0x0555] = (FPW)0x00AA00AA; /* unlock */
  432. base[0x02AA] = (FPW)0x00550055; /* unlock */
  433. base[0x0555] = (FPW)0x00800080; /* erase mode */
  434. base[0x0555] = (FPW)0x00AA00AA; /* unlock */
  435. base[0x02AA] = (FPW)0x00550055; /* unlock */
  436. *addr = (FPW)0x00300030; /* erase sector */
  437. }
  438. /* re-enable interrupts if necessary */
  439. if (flag)
  440. enable_interrupts();
  441. /* wait at least 50us for AMD, 80us for Intel.
  442. * Let's wait 1 ms.
  443. */
  444. udelay (1000);
  445. while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
  446. if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
  447. printf ("Timeout\n");
  448. if (intel) {
  449. /* suspend erase */
  450. *addr = (FPW)0x00B000B0;
  451. }
  452. flash_reset(info); /* reset to read mode */
  453. rcode = 1; /* failed */
  454. break;
  455. }
  456. /* show that we're waiting */
  457. if ((now - last) > 1000) { /* every second */
  458. putc ('.');
  459. last = now;
  460. }
  461. }
  462. flash_reset(info); /* reset to read mode */
  463. }
  464. printf (" done\n");
  465. return rcode;
  466. }
  467. /*-----------------------------------------------------------------------
  468. * Copy memory to flash, returns:
  469. * 0 - OK
  470. * 1 - write timeout
  471. * 2 - Flash not erased
  472. */
  473. int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  474. {
  475. FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
  476. int bytes; /* number of bytes to program in current word */
  477. int left; /* number of bytes left to program */
  478. int i, res;
  479. for (left = cnt, res = 0;
  480. left > 0 && res == 0;
  481. addr += sizeof(data), left -= sizeof(data) - bytes) {
  482. bytes = addr & (sizeof(data) - 1);
  483. addr &= ~(sizeof(data) - 1);
  484. /* combine source and destination data so can program
  485. * an entire word of 16 or 32 bits
  486. */
  487. for (i = 0; i < sizeof(data); i++) {
  488. data <<= 8;
  489. if (i < bytes || i - bytes >= left )
  490. data += *((uchar *)addr + i);
  491. else
  492. data += *src++;
  493. }
  494. /* write one word to the flash */
  495. switch (info->flash_id & FLASH_VENDMASK) {
  496. case FLASH_MAN_AMD:
  497. res = write_word_amd(info, (FPWV *)addr, data);
  498. break;
  499. case FLASH_MAN_INTEL:
  500. res = write_word_intel(info, (FPWV *)addr, data);
  501. break;
  502. default:
  503. /* unknown flash type, error! */
  504. printf ("missing or unknown FLASH type\n");
  505. res = 1; /* not really a timeout, but gives error */
  506. break;
  507. }
  508. }
  509. return (res);
  510. }
  511. /*-----------------------------------------------------------------------
  512. * Write a word to Flash for AMD FLASH
  513. * A word is 16 or 32 bits, whichever the bus width of the flash bank
  514. * (not an individual chip) is.
  515. *
  516. * returns:
  517. * 0 - OK
  518. * 1 - write timeout
  519. * 2 - Flash not erased
  520. */
  521. static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
  522. {
  523. ulong start;
  524. int flag;
  525. int res = 0; /* result, assume success */
  526. FPWV *base; /* first address in flash bank */
  527. /* Check if Flash is (sufficiently) erased */
  528. if ((*dest & data) != data) {
  529. return (2);
  530. }
  531. base = (FPWV *)(info->start[0]);
  532. /* Disable interrupts which might cause a timeout here */
  533. flag = disable_interrupts();
  534. base[0x0555] = (FPW)0x00AA00AA; /* unlock */
  535. base[0x02AA] = (FPW)0x00550055; /* unlock */
  536. base[0x0555] = (FPW)0x00A000A0; /* selects program mode */
  537. *dest = data; /* start programming the data */
  538. /* re-enable interrupts if necessary */
  539. if (flag)
  540. enable_interrupts();
  541. start = get_timer (0);
  542. /* data polling for D7 */
  543. while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
  544. if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
  545. *dest = (FPW)0x00F000F0; /* reset bank */
  546. res = 1;
  547. }
  548. }
  549. return (res);
  550. }
  551. /*-----------------------------------------------------------------------
  552. * Write a word to Flash for Intel FLASH
  553. * A word is 16 or 32 bits, whichever the bus width of the flash bank
  554. * (not an individual chip) is.
  555. *
  556. * returns:
  557. * 0 - OK
  558. * 1 - write timeout
  559. * 2 - Flash not erased
  560. */
  561. static int write_word_intel (flash_info_t *info, FPWV *dest, FPW data)
  562. {
  563. ulong start;
  564. int flag;
  565. int res = 0; /* result, assume success */
  566. /* Check if Flash is (sufficiently) erased */
  567. if ((*dest & data) != data) {
  568. return (2);
  569. }
  570. /* Disable interrupts which might cause a timeout here */
  571. flag = disable_interrupts();
  572. *dest = (FPW)0x00500050; /* clear status register */
  573. *dest = (FPW)0x00FF00FF; /* make sure in read mode */
  574. *dest = (FPW)0x00400040; /* program setup */
  575. *dest = data; /* start programming the data */
  576. /* re-enable interrupts if necessary */
  577. if (flag)
  578. enable_interrupts();
  579. start = get_timer (0);
  580. while (res == 0 && (*dest & (FPW)0x00800080) != (FPW)0x00800080) {
  581. if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
  582. *dest = (FPW)0x00B000B0; /* Suspend program */
  583. res = 1;
  584. }
  585. }
  586. if (res == 0 && (*dest & (FPW)0x00100010))
  587. res = 1; /* write failed, time out error is close enough */
  588. *dest = (FPW)0x00500050; /* clear status register */
  589. *dest = (FPW)0x00FF00FF; /* make sure in read mode */
  590. return (res);
  591. }
  592. #ifdef CONFIG_SYS_FLASH_PROTECTION
  593. /*-----------------------------------------------------------------------
  594. */
  595. int flash_real_protect (flash_info_t * info, long sector, int prot)
  596. {
  597. int rcode = 0; /* assume success */
  598. FPWV *addr; /* address of sector */
  599. FPW value;
  600. addr = (FPWV *) (info->start[sector]);
  601. switch (info->flash_id & FLASH_TYPEMASK) {
  602. case FLASH_28F800C3B:
  603. case FLASH_28F800C3T:
  604. case FLASH_28F160C3B:
  605. case FLASH_28F160C3T:
  606. case FLASH_28F320C3B:
  607. case FLASH_28F320C3T:
  608. case FLASH_28F640C3B:
  609. case FLASH_28F640C3T:
  610. flash_reset (info); /* make sure in read mode */
  611. *addr = (FPW) 0x00600060L; /* lock command setup */
  612. if (prot)
  613. *addr = (FPW) 0x00010001L; /* lock sector */
  614. else
  615. *addr = (FPW) 0x00D000D0L; /* unlock sector */
  616. flash_reset (info); /* reset to read mode */
  617. /* now see if it really is locked/unlocked as requested */
  618. *addr = (FPW) 0x00900090;
  619. /* read sector protection at sector address, (A7 .. A0) = 0x02.
  620. * D0 = 1 for each device if protected.
  621. * If at least one device is protected the sector is marked
  622. * protected, but return failure. Mixed protected and
  623. * unprotected devices within a sector should never happen.
  624. */
  625. value = addr[2] & (FPW) 0x00010001;
  626. if (value == 0)
  627. info->protect[sector] = 0;
  628. else if (value == (FPW) 0x00010001)
  629. info->protect[sector] = 1;
  630. else {
  631. /* error, mixed protected and unprotected */
  632. rcode = 1;
  633. info->protect[sector] = 1;
  634. }
  635. if (info->protect[sector] != prot)
  636. rcode = 1; /* failed to protect/unprotect as requested */
  637. /* reload all protection bits from hardware for now */
  638. flash_sync_real_protect (info);
  639. break;
  640. case FLASH_AM640U:
  641. case FLASH_AM800T:
  642. default:
  643. /* no hardware protect that we support */
  644. info->protect[sector] = prot;
  645. break;
  646. }
  647. return rcode;
  648. }
  649. #endif