omap_gpmc.h 2.2 KB

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  1. /*
  2. * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com>
  3. * Rohit Choraria <rohitkc@ti.com>
  4. *
  5. * (C) Copyright 2013 Andreas Bießmann <andreas.devel@googlemail.com>
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. #ifndef __ASM_OMAP_GPMC_H
  10. #define __ASM_OMAP_GPMC_H
  11. #include <asm/arch/omap_gpmc.h>
  12. #define GPMC_BUF_EMPTY 0
  13. #define GPMC_BUF_FULL 1
  14. #define ECCCLEAR (0x1 << 8)
  15. #define ECCRESULTREG1 (0x1 << 0)
  16. #define ECCSIZE512BYTE 0xFF
  17. #define ECCSIZE1 (ECCSIZE512BYTE << 22)
  18. #define ECCSIZE0 (ECCSIZE512BYTE << 12)
  19. #define ECCSIZE0SEL (0x000 << 0)
  20. /* Generic ECC Layouts */
  21. /* Large Page x8 NAND device Layout */
  22. #ifdef GPMC_NAND_ECC_LP_x8_LAYOUT
  23. #define GPMC_NAND_HW_ECC_LAYOUT {\
  24. .eccbytes = 12,\
  25. .eccpos = {1, 2, 3, 4, 5, 6, 7, 8,\
  26. 9, 10, 11, 12},\
  27. .oobfree = {\
  28. {.offset = 13,\
  29. .length = 51 } } \
  30. }
  31. #endif
  32. /* Large Page x16 NAND device Layout */
  33. #ifdef GPMC_NAND_ECC_LP_x16_LAYOUT
  34. #define GPMC_NAND_HW_ECC_LAYOUT {\
  35. .eccbytes = 12,\
  36. .eccpos = {2, 3, 4, 5, 6, 7, 8, 9,\
  37. 10, 11, 12, 13},\
  38. .oobfree = {\
  39. {.offset = 14,\
  40. .length = 50 } } \
  41. }
  42. #endif
  43. /* Small Page x8 NAND device Layout */
  44. #ifdef GPMC_NAND_ECC_SP_x8_LAYOUT
  45. #define GPMC_NAND_HW_ECC_LAYOUT {\
  46. .eccbytes = 3,\
  47. .eccpos = {1, 2, 3},\
  48. .oobfree = {\
  49. {.offset = 4,\
  50. .length = 12 } } \
  51. }
  52. #endif
  53. /* Small Page x16 NAND device Layout */
  54. #ifdef GPMC_NAND_ECC_SP_x16_LAYOUT
  55. #define GPMC_NAND_HW_ECC_LAYOUT {\
  56. .eccbytes = 3,\
  57. .eccpos = {2, 3, 4},\
  58. .oobfree = {\
  59. {.offset = 5,\
  60. .length = 11 } } \
  61. }
  62. #endif
  63. enum omap_ecc {
  64. /* 1-bit ECC calculation by Software, Error detection by Software */
  65. OMAP_ECC_HAM1_CODE_SW = 1, /* avoid un-initialized int can be 0x0 */
  66. /* 1-bit ECC calculation by GPMC, Error detection by Software */
  67. /* ECC layout compatible to legacy ROMCODE. */
  68. OMAP_ECC_HAM1_CODE_HW,
  69. /* 4-bit ECC calculation by GPMC, Error detection by Software */
  70. OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,
  71. /* 4-bit ECC calculation by GPMC, Error detection by ELM */
  72. OMAP_ECC_BCH4_CODE_HW,
  73. /* 8-bit ECC calculation by GPMC, Error detection by Software */
  74. OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
  75. /* 8-bit ECC calculation by GPMC, Error detection by ELM */
  76. OMAP_ECC_BCH8_CODE_HW,
  77. };
  78. #endif /* __ASM_OMAP_GPMC_H */