ehci-fsl.c 3.0 KB

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  1. /*
  2. * (C) Copyright 2009, 2011 Freescale Semiconductor, Inc.
  3. *
  4. * (C) Copyright 2008, Excito Elektronik i Sk=E5ne AB
  5. *
  6. * Author: Tor Krill tor@excito.com
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <pci.h>
  25. #include <usb.h>
  26. #include <asm/io.h>
  27. #include <usb/ehci-fsl.h>
  28. #include <hwconfig.h>
  29. #include "ehci.h"
  30. #include "ehci-core.h"
  31. /*
  32. * Create the appropriate control structures to manage
  33. * a new EHCI host controller.
  34. *
  35. * Excerpts from linux ehci fsl driver.
  36. */
  37. int ehci_hcd_init(void)
  38. {
  39. struct usb_ehci *ehci;
  40. const char *phy_type = NULL;
  41. size_t len;
  42. #ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
  43. char usb_phy[5];
  44. usb_phy[0] = '\0';
  45. #endif
  46. ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
  47. hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
  48. hcor = (struct ehci_hcor *)((uint32_t) hccr +
  49. HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
  50. /* Set to Host mode */
  51. setbits_le32(&ehci->usbmode, CM_HOST);
  52. out_be32(&ehci->snoop1, SNOOP_SIZE_2GB);
  53. out_be32(&ehci->snoop2, 0x80000000 | SNOOP_SIZE_2GB);
  54. /* Init phy */
  55. if (hwconfig_sub("usb1", "phy_type"))
  56. phy_type = hwconfig_subarg("usb1", "phy_type", &len);
  57. else
  58. phy_type = getenv("usb_phy_type");
  59. if (!phy_type) {
  60. #ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
  61. /* if none specified assume internal UTMI */
  62. strcpy(usb_phy, "utmi");
  63. phy_type = usb_phy;
  64. #else
  65. printf("WARNING: USB phy type not defined !!\n");
  66. return -1;
  67. #endif
  68. }
  69. if (!strcmp(phy_type, "utmi")) {
  70. #if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
  71. setbits_be32(&ehci->control, PHY_CLK_SEL_UTMI);
  72. setbits_be32(&ehci->control, UTMI_PHY_EN);
  73. udelay(1000); /* delay required for PHY Clk to appear */
  74. #endif
  75. out_le32(&(hcor->or_portsc[0]), PORT_PTS_UTMI);
  76. } else {
  77. #if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
  78. clrbits_be32(&ehci->control, UTMI_PHY_EN);
  79. setbits_be32(&ehci->control, PHY_CLK_SEL_ULPI);
  80. udelay(1000); /* delay required for PHY Clk to appear */
  81. #endif
  82. out_le32(&(hcor->or_portsc[0]), PORT_PTS_ULPI);
  83. }
  84. /* Enable interface. */
  85. setbits_be32(&ehci->control, USB_EN);
  86. out_be32(&ehci->prictrl, 0x0000000c);
  87. out_be32(&ehci->age_cnt_limit, 0x00000040);
  88. out_be32(&ehci->sictrl, 0x00000001);
  89. in_le32(&ehci->usbmode);
  90. return 0;
  91. }
  92. /*
  93. * Destroy the appropriate control structures corresponding
  94. * the the EHCI host controller.
  95. */
  96. int ehci_hcd_stop(void)
  97. {
  98. return 0;
  99. }