fsl_serdes.h 1003 B

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  1. /*
  2. * Copyright 2015 Freescale Semiconductor, Inc.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #ifndef __FSL_SERDES_H
  7. #define __FSL_SERDES_H
  8. #include <config.h>
  9. #define SRDS_MAX_LANES 8
  10. enum srds_prtcl {
  11. NONE = 0,
  12. PCIE1,
  13. PCIE2,
  14. PCIE3,
  15. PCIE4,
  16. SATA1,
  17. SATA2,
  18. XAUI1,
  19. XAUI2,
  20. XFI1,
  21. XFI2,
  22. XFI3,
  23. XFI4,
  24. XFI5,
  25. XFI6,
  26. XFI7,
  27. XFI8,
  28. SGMII1,
  29. SGMII2,
  30. SGMII3,
  31. SGMII4,
  32. SGMII5,
  33. SGMII6,
  34. SGMII7,
  35. SGMII8,
  36. SGMII9,
  37. SGMII10,
  38. SGMII11,
  39. SGMII12,
  40. SGMII13,
  41. SGMII14,
  42. SGMII15,
  43. SGMII16,
  44. QSGMII_A, /* A indicates MACs 1-4 */
  45. QSGMII_B, /* B indicates MACs 5-8 */
  46. QSGMII_C, /* C indicates MACs 9-12 */
  47. QSGMII_D, /* D indicates MACs 12-16 */
  48. SERDES_PRCTL_COUNT
  49. };
  50. enum srds {
  51. FSL_SRDS_1 = 0,
  52. FSL_SRDS_2 = 1,
  53. };
  54. int is_serdes_configured(enum srds_prtcl device);
  55. void fsl_serdes_init(void);
  56. int serdes_get_first_lane(u32 sd, enum srds_prtcl device);
  57. enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane);
  58. int is_serdes_prtcl_valid(int serdes, u32 prtcl);
  59. #endif /* __FSL_SERDES_H */