fsl_chain_of_trust.c 1.7 KB

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  1. /*
  2. * Copyright 2015 Freescale Semiconductor, Inc.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <fsl_validate.h>
  8. #include <fsl_sfp.h>
  9. #ifdef CONFIG_LS102XA
  10. #include <asm/arch/immap_ls102xa.h>
  11. #endif
  12. #if defined(CONFIG_MPC85xx)
  13. #define CONFIG_DCFG_ADDR CONFIG_SYS_MPC85xx_GUTS_ADDR
  14. #else
  15. #define CONFIG_DCFG_ADDR CONFIG_SYS_FSL_GUTS_ADDR
  16. #endif
  17. #ifdef CONFIG_SYS_FSL_CCSR_GUR_LE
  18. #define gur_in32(a) in_le32(a)
  19. #else
  20. #define gur_in32(a) in_be32(a)
  21. #endif
  22. /* Check the Boot Mode. If Secure, return 1 else return 0 */
  23. int fsl_check_boot_mode_secure(void)
  24. {
  25. uint32_t val;
  26. struct ccsr_sfp_regs *sfp_regs = (void *)(CONFIG_SYS_SFP_ADDR);
  27. struct ccsr_gur __iomem *gur = (void *)(CONFIG_DCFG_ADDR);
  28. val = sfp_in32(&sfp_regs->ospr) & ITS_MASK;
  29. if (val == ITS_MASK)
  30. return 1;
  31. #if defined(CONFIG_FSL_CORENET) || !defined(CONFIG_MPC85xx)
  32. /* For PBL based platforms check the SB_EN bit in RCWSR */
  33. val = gur_in32(&gur->rcwsr[RCW_SB_EN_REG_INDEX - 1]) & RCW_SB_EN_MASK;
  34. if (val == RCW_SB_EN_MASK)
  35. return 1;
  36. #endif
  37. #if defined(CONFIG_MPC85xx) && !defined(CONFIG_FSL_CORENET)
  38. /* For Non-PBL Platforms, check the Device Status register 2*/
  39. val = gur_in32(&gur->pordevsr2) & MPC85xx_PORDEVSR2_SBC_MASK;
  40. if (val != MPC85xx_PORDEVSR2_SBC_MASK)
  41. return 1;
  42. #endif
  43. return 0;
  44. }
  45. int fsl_setenv_chain_of_trust(void)
  46. {
  47. /* Check Boot Mode
  48. * If Boot Mode is Non-Secure, no changes are required
  49. */
  50. if (fsl_check_boot_mode_secure() == 0)
  51. return 0;
  52. /* If Boot mode is Secure, set the environment variables
  53. * bootdelay = 0 (To disable Boot Prompt)
  54. * bootcmd = CONFIG_CHAIN_BOOT_CMD (Validate and execute Boot script)
  55. */
  56. setenv("bootdelay", "0");
  57. setenv("bootcmd", CONFIG_CHAIN_BOOT_CMD);
  58. return 0;
  59. }