cpu.c 3.3 KB

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  1. /*
  2. * (C) Copyright 2003
  3. * Josef Baumgartner <josef.baumgartner@telex.de>
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <watchdog.h>
  25. #include <command.h>
  26. #ifdef CONFIG_M5272
  27. #include <asm/immap_5272.h>
  28. #include <asm/m5272.h>
  29. #endif
  30. #ifdef CONFIG_M5282
  31. #endif
  32. #ifdef CONFIG_M5249
  33. #include <asm/m5249.h>
  34. #endif
  35. #ifdef CONFIG_M5272
  36. int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
  37. volatile wdog_t * wdp = (wdog_t *)(CFG_MBAR + MCFSIM_WRRR);
  38. wdp->wdog_wrrr = 0;
  39. udelay (1000);
  40. /* enable watchdog, set timeout to 0 and wait */
  41. wdp->wdog_wrrr = 1;
  42. while (1);
  43. /* we don't return! */
  44. return 0;
  45. };
  46. int checkcpu(void) {
  47. ulong *dirp = (ulong *)(CFG_MBAR + MCFSIM_DIR);
  48. uchar msk;
  49. char *suf;
  50. puts ("CPU: ");
  51. msk = (*dirp > 28) & 0xf;
  52. switch (msk) {
  53. case 0x2: suf = "1K75N"; break;
  54. case 0x4: suf = "3K75N"; break;
  55. default:
  56. suf = NULL;
  57. printf ("MOTOROLA MCF5272 (Mask:%01x)\n", msk);
  58. break;
  59. }
  60. if (suf)
  61. printf ("MOTOROLA MCF5272 %s\n", suf);
  62. return 0;
  63. };
  64. #if defined(CONFIG_WATCHDOG)
  65. /* Called by macro WATCHDOG_RESET */
  66. void watchdog_reset (void)
  67. {
  68. volatile immap_t * regp = (volatile immap_t *)CFG_MBAR;
  69. regp->wdog_reg.wdog_wcr = 0;
  70. }
  71. int watchdog_disable (void)
  72. {
  73. volatile immap_t *regp = (volatile immap_t *)CFG_MBAR;
  74. regp->wdog_reg.wdog_wcr = 0; /* reset watchdog counter */
  75. regp->wdog_reg.wdog_wirr = 0; /* disable watchdog interrupt */
  76. regp->wdog_reg.wdog_wrrr = 0; /* disable watchdog timer */
  77. puts ("WATCHDOG:disabled\n");
  78. return (0);
  79. }
  80. int watchdog_init (void)
  81. {
  82. volatile immap_t *regp = (volatile immap_t *)CFG_MBAR;
  83. regp->wdog_reg.wdog_wirr = 0; /* disable watchdog interrupt */
  84. /* set timeout and enable watchdog */
  85. regp->wdog_reg.wdog_wrrr = ((CONFIG_WATCHDOG_TIMEOUT * CFG_HZ) / (32768 * 1000)) - 1;
  86. regp->wdog_reg.wdog_wcr = 0; /* reset watchdog counter */
  87. puts ("WATCHDOG:enabled\n");
  88. return (0);
  89. }
  90. #endif /* #ifdef CONFIG_WATCHDOG */
  91. #endif /* #ifdef CONFIG_M5272 */
  92. #ifdef CONFIG_M5282
  93. int checkcpu (void)
  94. {
  95. puts ("CPU: MOTOROLA Coldfire MCF5282\n");
  96. return 0;
  97. }
  98. int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
  99. return 0;
  100. };
  101. #endif
  102. #ifdef CONFIG_M5249 /* test-only: todo... */
  103. int checkcpu (void)
  104. {
  105. char buf[32];
  106. printf ("CPU: MOTOROLA Coldfire MCF5249 at %s MHz\n", strmhz(buf, CFG_CLK));
  107. return 0;
  108. }
  109. int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
  110. /* enable watchdog, set timeout to 0 and wait */
  111. mbar_writeByte(MCFSIM_SYPCR, 0xc0);
  112. while (1);
  113. /* we don't return! */
  114. return 0;
  115. };
  116. #endif