rockchip_timer.c 4.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169
  1. /*
  2. * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <dm.h>
  8. #include <dm/ofnode.h>
  9. #include <mapmem.h>
  10. #include <asm/arch/timer.h>
  11. #include <dt-structs.h>
  12. #include <timer.h>
  13. #include <asm/io.h>
  14. DECLARE_GLOBAL_DATA_PTR;
  15. #if CONFIG_IS_ENABLED(OF_PLATDATA)
  16. struct rockchip_timer_plat {
  17. struct dtd_rockchip_rk3368_timer dtd;
  18. };
  19. #endif
  20. /* Driver private data. Contains timer id. Could be either 0 or 1. */
  21. struct rockchip_timer_priv {
  22. struct rk_timer *timer;
  23. };
  24. static inline int64_t rockchip_timer_get_curr_value(struct rk_timer *timer)
  25. {
  26. uint64_t timebase_h, timebase_l;
  27. uint64_t cntr;
  28. timebase_l = readl(&timer->timer_curr_value0);
  29. timebase_h = readl(&timer->timer_curr_value1);
  30. cntr = timebase_h << 32 | timebase_l;
  31. return cntr;
  32. }
  33. #if CONFIG_IS_ENABLED(BOOTSTAGE)
  34. ulong timer_get_boot_us(void)
  35. {
  36. uint64_t ticks = 0;
  37. uint32_t rate;
  38. uint64_t us;
  39. int ret;
  40. ret = dm_timer_init();
  41. if (!ret) {
  42. /* The timer is available */
  43. rate = timer_get_rate(gd->timer);
  44. timer_get_count(gd->timer, &ticks);
  45. #if !CONFIG_IS_ENABLED(OF_PLATDATA)
  46. } else if (ret == -EAGAIN) {
  47. /* We have been called so early that the DM is not ready,... */
  48. ofnode node = offset_to_ofnode(-1);
  49. struct rk_timer *timer = NULL;
  50. /*
  51. * ... so we try to access the raw timer, if it is specified
  52. * via the tick-timer property in /chosen.
  53. */
  54. node = ofnode_get_chosen_node("tick-timer");
  55. if (!ofnode_valid(node)) {
  56. debug("%s: no /chosen/tick-timer\n", __func__);
  57. return 0;
  58. }
  59. timer = (struct rk_timer *)ofnode_get_addr(node);
  60. /* This timer is down-counting */
  61. ticks = ~0uLL - rockchip_timer_get_curr_value(timer);
  62. if (ofnode_read_u32(node, "clock-frequency", &rate)) {
  63. debug("%s: could not read clock-frequency\n", __func__);
  64. return 0;
  65. }
  66. #endif
  67. } else {
  68. return 0;
  69. }
  70. us = (ticks * 1000) / rate;
  71. return us;
  72. }
  73. #endif
  74. static int rockchip_timer_get_count(struct udevice *dev, u64 *count)
  75. {
  76. struct rockchip_timer_priv *priv = dev_get_priv(dev);
  77. uint64_t cntr = rockchip_timer_get_curr_value(priv->timer);
  78. /* timers are down-counting */
  79. *count = ~0ull - cntr;
  80. return 0;
  81. }
  82. static int rockchip_clk_ofdata_to_platdata(struct udevice *dev)
  83. {
  84. #if !CONFIG_IS_ENABLED(OF_PLATDATA)
  85. struct rockchip_timer_priv *priv = dev_get_priv(dev);
  86. priv->timer = (struct rk_timer *)devfdt_get_addr(dev);
  87. #endif
  88. return 0;
  89. }
  90. static int rockchip_timer_start(struct udevice *dev)
  91. {
  92. struct rockchip_timer_priv *priv = dev_get_priv(dev);
  93. const uint64_t reload_val = ~0uLL;
  94. const uint32_t reload_val_l = reload_val & 0xffffffff;
  95. const uint32_t reload_val_h = reload_val >> 32;
  96. /* don't reinit, if the timer is already running and set up */
  97. if ((readl(&priv->timer->timer_ctrl_reg) & 1) == 1 &&
  98. (readl(&priv->timer->timer_load_count0) == reload_val_l) &&
  99. (readl(&priv->timer->timer_load_count1) == reload_val_h))
  100. return 0;
  101. /* disable timer and reset all control */
  102. writel(0, &priv->timer->timer_ctrl_reg);
  103. /* write reload value */
  104. writel(reload_val_l, &priv->timer->timer_load_count0);
  105. writel(reload_val_h, &priv->timer->timer_load_count1);
  106. /* enable timer */
  107. writel(1, &priv->timer->timer_ctrl_reg);
  108. return 0;
  109. }
  110. static int rockchip_timer_probe(struct udevice *dev)
  111. {
  112. #if CONFIG_IS_ENABLED(OF_PLATDATA)
  113. struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
  114. struct rockchip_timer_priv *priv = dev_get_priv(dev);
  115. struct rockchip_timer_plat *plat = dev_get_platdata(dev);
  116. priv->timer = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);
  117. uc_priv->clock_rate = plat->dtd.clock_frequency;
  118. #endif
  119. return rockchip_timer_start(dev);
  120. }
  121. static const struct timer_ops rockchip_timer_ops = {
  122. .get_count = rockchip_timer_get_count,
  123. };
  124. static const struct udevice_id rockchip_timer_ids[] = {
  125. { .compatible = "rockchip,rk3368-timer" },
  126. {}
  127. };
  128. U_BOOT_DRIVER(rockchip_rk3368_timer) = {
  129. .name = "rockchip_rk3368_timer",
  130. .id = UCLASS_TIMER,
  131. .of_match = rockchip_timer_ids,
  132. .probe = rockchip_timer_probe,
  133. .ops = &rockchip_timer_ops,
  134. .flags = DM_FLAG_PRE_RELOC,
  135. .priv_auto_alloc_size = sizeof(struct rockchip_timer_priv),
  136. #if CONFIG_IS_ENABLED(OF_PLATDATA)
  137. .platdata_auto_alloc_size = sizeof(struct rockchip_timer_plat),
  138. #endif
  139. .ofdata_to_platdata = rockchip_clk_ofdata_to_platdata,
  140. };